Add CPU LTR

Change-Id: I91c494b2d085abc6bea10bda0bc13fb31eec2cff

src/mainboard/system76/galp5/ramstage.c

@@ -6,6 +6,7 @@
 void mainboard_silicon_init_params(FSP_S_CONFIG *params) {
 	// CPU RP Config
 	params->CpuPcieRpAdvancedErrorReporting[0] = 0;
+	params->CpuPcieRpLtrEnable[0] = 1;
 	params->CpuPcieRpPtmEnabled[0] = 0;
 
 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));