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Add CPU LTR

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Change-Id: I91c494b2d085abc6bea10bda0bc13fb31eec2cff
This commit is contained in:
Jeremy Soller
2020-11-19 15:49:37 -07:00
parent 953ceb040b
commit dafe9d6fe0
1 changed files with 1 additions and 0 deletions
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src/mainboard/system76/galp5/ramstage.c
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@@ -6,6 +6,7 @@
void mainboard_silicon_init_params(FSP_S_CONFIG *params) { void mainboard_silicon_init_params(FSP_S_CONFIG *params) {
// CPU RP Config // CPU RP Config
params->CpuPcieRpAdvancedErrorReporting[0] = 0; params->CpuPcieRpAdvancedErrorReporting[0] = 0;
params->CpuPcieRpLtrEnable[0] = 1;
params->CpuPcieRpPtmEnabled[0] = 0; params->CpuPcieRpPtmEnabled[0] = 0;
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));