mb/system76/whl-u: Fix USB-C/TBT
Partially revert37c69a0123
to restore USB-C and likely TBT functionality on galp3-c. Fixes:37c69a0123
("Update whl-u to match cml-u") Change-Id: I6fc189b3185d51cd8e67ae2d1eedef65a6049a12
This commit is contained in:
committed by
Tim Crawford
parent
9ca667855e
commit
ee224859e1
@@ -219,7 +219,7 @@ static const struct pad_config gpio_table[] = {
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// TBCIO_PLUG_EVENT
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_PAD_CFG_STRUCT(GPP_C9, 0x82880100, 0x3000),
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// TBT_FRC_PWR
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PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, PLTRST),
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PAD_CFG_TERM_GPO(GPP_C10, 1, NONE, PLTRST),
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// NC
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PAD_CFG_NC(GPP_C11),
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@@ -524,7 +524,7 @@ static const struct pad_config gpio_table[] = {
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// GPPC_H21
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PAD_CFG_NC(GPP_H21),
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// TBT_RTD3_PWR_EN_R
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PAD_NC(GPP_H22, NONE),
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PAD_CFG_TERM_GPO(GPP_H22, 1, NONE, PLTRST),
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// NC, WIGIG_PEWAKE
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PAD_CFG_NC(GPP_H23),
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};
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@@ -1,8 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <string.h>
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#include <acpi/acpi.h>
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#include <acpi/acpigen.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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@@ -66,128 +63,8 @@ static void mainboard_init(struct device *dev) {
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}
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}
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static bool mainboard_pcie_hotplug(int port_number) {
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printk(BIOS_DEBUG, "system76: pcie_hotplug(%d)\n", port_number);
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/* RP01 */
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return port_number == 0;
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}
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static void pcie_hotplug_generator(int port_number)
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{
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int port;
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int have_hotplug = 0;
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for (port = 0; port < port_number; port++) {
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if (mainboard_pcie_hotplug(port)) {
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have_hotplug = 1;
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}
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}
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if (!have_hotplug) {
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return;
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}
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for (port = 0; port < port_number; port++) {
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if (mainboard_pcie_hotplug(port)) {
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char scope_name[] = "\\_SB.PCI0.RP0x";
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scope_name[sizeof("\\_SB.PCI0.RP0x") - 2] = '1' + port;
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acpigen_write_scope(scope_name);
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/*
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Device (SLOT)
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{
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Name (_ADR, 0x00)
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Method (_RMV, 0, NotSerialized)
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{
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Return (0x01)
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}
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}
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*/
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acpigen_write_device("SLOT");
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acpigen_write_name_byte("_ADR", 0x00);
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acpigen_write_method("_RMV", 0);
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/* ReturnOp */
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acpigen_emit_byte (0xa4);
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/* One */
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acpigen_emit_byte (0x01);
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acpigen_pop_len();
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acpigen_pop_len();
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acpigen_pop_len();
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}
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}
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/* Method (_L01, 0, NotSerialized)
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{
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If (\_SB.PCI0.RP04.HPCS)
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{
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Sleep (100)
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Store (0x01, \_SB.PCI0.RP04.HPCS)
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If (\_SB.PCI0.RP04.PDC)
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{
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Store (0x01, \_SB.PCI0.RP04.PDC)
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Notify (\_SB.PCI0.RP04, 0x00)
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}
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}
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}
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*/
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acpigen_write_scope("\\_GPE");
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acpigen_write_method("_L01", 0);
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for (port = 0; port < port_number; port++) {
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if (mainboard_pcie_hotplug(port)) {
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char reg_name[] = "\\_SB.PCI0.RP0x.HPCS";
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reg_name[sizeof("\\_SB.PCI0.RP0x") - 2] = '1' + port;
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acpigen_emit_byte(0xa0); /* IfOp. */
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acpigen_write_len_f();
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acpigen_emit_namestring(reg_name);
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/* Sleep (100) */
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acpigen_emit_byte(0x5b); /* SleepOp. */
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acpigen_emit_byte(0x22);
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acpigen_write_byte(100);
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/* Store (0x01, \_SB.PCI0.RP04.HPCS) */
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acpigen_emit_byte(0x70);
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acpigen_emit_byte(0x01);
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acpigen_emit_namestring(reg_name);
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memcpy(reg_name + sizeof("\\_SB.PCI0.RP0x.") - 1, "PDC", 4);
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/* If (\_SB.PCI0.RP04.PDC) */
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acpigen_emit_byte(0xa0); /* IfOp. */
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acpigen_write_len_f();
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acpigen_emit_namestring(reg_name);
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/* Store (0x01, \_SB.PCI0.RP04.PDC) */
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acpigen_emit_byte(0x70);
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acpigen_emit_byte(0x01);
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acpigen_emit_namestring(reg_name);
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reg_name[sizeof("\\_SB.PCI0.RP0x") - 1] = '\0';
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/* Notify(\_SB.PCI0.RP04, 0x00) */
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acpigen_emit_byte(0x86);
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acpigen_emit_namestring(reg_name);
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acpigen_emit_byte(0x00);
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acpigen_pop_len();
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acpigen_pop_len();
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}
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}
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acpigen_pop_len();
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acpigen_pop_len();
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}
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static void fill_ssdt(const struct device *device) {
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printk(BIOS_INFO, "system76: fill_ssdt\n");
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pcie_hotplug_generator(CONFIG_MAX_ROOT_PORTS);
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}
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static void mainboard_enable(struct device *dev) {
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dev->ops->init = mainboard_init;
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dev->ops->acpi_fill_ssdt = fill_ssdt;
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// Configure pad for DisplayPort
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uint32_t config = 0x44000200;
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