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34174 Commits

Author SHA1 Message Date
Eric Biederman
dfde9bb649 - Actually enable the Pentium-M cpus 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 01:18:47 +00:00
Eric Biederman
3566b3d545 - Bug fixes to the P-III support 
- Initial Pentium-M support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 01:18:16 +00:00
Yinghai Lu
eefdb03898 S2885 winbond Superio all resource set 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-27 00:37:30 +00:00
Yinghai Lu
fb198640d8 ops and tsc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 19:55:30 +00:00
Yinghai Lu
9cf950ca5a s2735 minor changes 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 19:49:50 +00:00
Ronald G. Minnich
3f637906c4 added file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1714 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 16:01:30 +00:00
Ronald G. Minnich
7ae74b40bf from Mark Wilkinson, some fixes. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-25 14:57:24 +00:00
Eric Biederman
8e2847c28e - For now use port 0x80 based delays in for the e7501 memory initialization. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 03:00:02 +00:00
Eric Biederman
60216355d2 - With Xeon cpus it seems best to use the tsc calibrated with timer2 as 
the time source.  The apic timer also has a variable time base.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 02:47:13 +00:00
Eric Biederman
720a8f57ef - Update e7501 northbridge.c to work in the new structure. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1710 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 02:32:23 +00:00
Yinghai Lu
8abb054c0e *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-23 00:05:22 +00:00
Yinghai Lu
2560dbdd50 for S2735 support 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 21:33:08 +00:00
Yinghai Lu
e99433157b *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1707 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 21:03:26 +00:00
Yinghai Lu
79cf1be9e4 *** empty log message *** 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 18:49:09 +00:00
Yinghai Lu
ccf0bc01aa s2735 half update 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1705 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 18:45:36 +00:00
Eric Biederman
a1653cfea5 - Better memory I/O space distinguishing in amd_mtrr.c 
This is way to much code duplication but for now things work.
- Fix the typo in amd8111_lpc.c
- Remove an unused macro, use continue instead of break in mtrr.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1704 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 04:41:53 +00:00
Eric Biederman
4f9265fdc6 - kill typo so resources are not mixed up in amdk8/northbridge.c 
- Enable resources on the lpc bus.  PCI now longer do this by
  default for their children unless they are bridges.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-22 02:33:51 +00:00
Stefan Reinauer
584e078231 adapt config files 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 20:52:53 +00:00
Stefan Reinauer
800a55bb5c get solo building after last infrastructure changes 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1700 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 18:51:13 +00:00
Stefan Reinauer
a49f4161f5 update failover handling of some amd64 boards 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 17:06:49 +00:00
Eric Biederman
dbec2d4090 - Bump the LinuxBIOS major version 
- Rename chip_config chip_operations throughout the tree
- Fix Config.lb on most of the Opteron Ports
- Fix the amd 8000 chipset support for setting the subsystem vendor and device ids
- Add detection of devices that are on the motherboard (i.e. In Config.lb)
- Baby step in getting the resource limit handling correct, Ignore fixed resources
- Only call enable_childrens_resources on devices we know will have children
  For some busses like i2c it is non-sense and we don't want it.
- Set the resource limits for pnp devices resources.
- Improve the resource size detection for pnp devices.
- Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels
- Added a header file to hold the prototype of isa_dma_init
- Fixed most of the superio chips so the should work now, the via superio pci device is the exception.
- The code compiles and runs so it is time for me to go to bed.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 10:44:08 +00:00
Eric Biederman
f3aa4707d3 - Explicitly disable the fixed dram extensions bits. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 02:53:25 +00:00
Eric Biederman
29490a17ce - We already know the cache is disabled so don't bother disabling it. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 02:43:15 +00:00
Yinghai Lu
f19e2c766a better support enable_dev for amd8111 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1695 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-21 01:52:21 +00:00
Yinghai Lu
6014983bab add Option.lb 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 17:54:01 +00:00
Yinghai Lu
6a61d6a4ae Tyan update to work with new CPU Config 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-20 05:07:16 +00:00
Eric Biederman
abed01d81d - Fix typo with reversing memory resources. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1692 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-19 23:35:53 +00:00
Li-Ta Lo
812688bf3c change struct chip* to struct device* 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-19 17:49:32 +00:00
Stefan Reinauer
de24e61df7 - add support for socket 754 
- fix configuration creation for amd solo (doesn't compile yet)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-19 10:30:32 +00:00
Eric Biederman
a172d98233 - Fix bug with > 4GB of memory where PAE was left enabled. 
Why didn't this show up until I had > 4GB on one cpu?


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-19 05:07:18 +00:00
Eric Biederman
04da1d35d1 - Bump MAX_LINKS to 4 I have actually found an i2c bridge that needs this 
- Fix the hdama Config.lb to not longer use the link keywords oops,
  and instead to have it nest everything properly.
- Update config.g to not support the link keyword
- update config.g to not support northbridge/southbridge/cpu/pmc noise words
  we can just use chip now.
- Remove old link handling from the code
- Detect and handle duplicate paths so we generate one device with multiple links


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 19:58:35 +00:00
Eric Biederman
858ac5c5cd - Make all ports use config.h for if they have chip_config or chip_info structures. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1684 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 09:13:23 +00:00
Eric Biederman
92986807bb - Cleanup the bugfix in elfboot.c 
- Add forgotten amd8111 chip.h


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1683 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 08:45:29 +00:00
Eric Biederman
f3ed1cfad7 - HDAMA boots! 
- Set the bootstrap processor flag in the mptable.
- Implement 64bit support in our print statements
- Fix the reporting of how many cpus we are waiting to stop.
  It is the 1 less than the actual number of cpus running.
- Actually enable cpu_initialization.
- Fix firstsiblingdevice in config.g
- Add IORESOURCE_FIXED to all of the resources set by config.g
- Fix the apic_cluster rule to add an apic_cluster path not an apic path.
- Add a div64.h to assist in the 64bit printf.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 08:38:58 +00:00
Eric Biederman
7003ba4a88 - First stab at running linuxbios without the old static device tree. 
Things are close but not quite there yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 06:20:29 +00:00
Eric Biederman
216525d1fd - Fix config.g and the hdama config so everthing builds again. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-16 02:48:37 +00:00
Li-Ta Lo
e2ad5ce697 fixed function prototype for die() 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 23:05:08 +00:00
Eric Biederman
3287f0b9a1 - Change broken usage of get_resource to find_resource. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1674 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 23:02:00 +00:00
Eric Biederman
448bd635c0 - Finish interrupted merge 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 22:52:15 +00:00
Ronald G. Minnich
e5ac2959bb oops. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 22:44:26 +00:00
Eric Biederman
119e00e2e1 - Fix fat fingered merge 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 22:35:23 +00:00
Eric Biederman
3614eebc13 - Update so we no longer require console.inc 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 22:29:26 +00:00
Eric Biederman
1944680bfd - Sync up northbridge/amd/amdk8 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 22:06:29 +00:00
Eric Biederman
297b06e6f9 - Update the header files in reset_test.c 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1667 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 21:55:53 +00:00
Eric Biederman
73f2282ea1 - Add a generic device that does nothing 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 21:43:24 +00:00
Ronald G. Minnich
4b93394872 more breakage, thanks to Ron 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 21:40:58 +00:00
Eric Biederman
03acab694b - Updates for 64bit resource support, handling missing devices and cpus in the config file 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1664 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 21:25:53 +00:00
Eric Biederman
992cd008f1 - Update the device header files 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1663 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 21:10:23 +00:00
Eric Biederman
b78c1972fe - First pass through with with device tree enhancement merge. Most of the mechanisms should 
be in place but don't expect anything to quite work yet.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 20:54:17 +00:00
Eric Biederman
cadfd4c462 - Add arch/cpu.h 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2004-10-14 20:52:22 +00:00