Arthur Heymans b65f609bfd soc/amd/cezanne: Use devicetree ops over pci driver ...

Cezanne is a SoC so it makes sense to statically use ops instead of
matching them to PCI DID/VID at runtime.

Change-Id: If535221335217cee53bca956747e7f17f0a5fd8d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

2022-10-13 19:40:36 +00:00

..

acpi

acpi/soc: Conditionally include dptc.asl

2022-09-14 22:12:10 +00:00

include/soc

soc/amd/cezanne,common: factor out CPPC code to common AMD SoC code

2022-08-12 21:52:12 +00:00

psp_verstage

soc/amd/*/psp_verstage/svc: Make svc.h macros common

2022-10-13 15:44:15 +00:00

acpi.c

treewide: Use 'fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk'

2022-10-12 14:18:44 +00:00

agesa_acpi.c

payloads,src: Replace ALIGN(x, a) by ALIGN_UP(x, a) for clarity

2022-10-13 19:14:57 +00:00

aoac.c

soc/amd/cezanne: factor out AOAC offset defines

2021-06-16 16:38:25 +00:00

bootblock.c

soc/amd/cezanne,picasso: factor out common early non-car cache setup

2022-01-20 22:28:50 +00:00

chip.c

soc/amd/*: Hook up device_operations in chipset.cb

2022-10-13 19:40:01 +00:00

chip.h

amd/cezanne: Control DPTC with only Kconfig

2022-09-15 17:58:31 +00:00

chipset.cb

soc/amd/cezanne: Use devicetree ops over pci driver

2022-10-13 19:40:36 +00:00

config.c

src: Add missing 'void' in function definition

2022-01-26 23:57:12 +00:00

cpu.c

cpu/amd/smm: Move MP & SMM init in a common place

2022-09-14 20:29:17 +00:00

data_fabric.c

soc/amd/cezanne: Use devicetree ops over pci driver

2022-10-13 19:40:36 +00:00

early_fch.c

soc/amd/cezanne: enable LPC decodes if platform uses LPC

2022-10-13 14:50:16 +00:00

emmc.c

soc/amd/*: Move emmc disabling to device ops

2022-10-13 19:39:20 +00:00

espi_util.c

soc/amd/cezanne: factor out eSPI SPI2 pads configuration functions

2022-01-14 00:29:52 +00:00

fch.c

soc/amd/cezanne: Turn off gpp clock request for disabled devices

2022-03-23 19:37:36 +00:00

fsp_m_params.c

soc/amd/cezanne/fsp_m_params: fix modification of constant

2022-05-16 15:22:04 +00:00

fsp_s_params.c

soc/amd/{common,cezanne}: Implement HAVE_PAYLOAD_PRELOAD_CACHE

2021-07-19 14:58:53 +00:00

fw.cfg

soc/amd/cezanne/fw.cfg: provide default SPL table binary

2022-04-03 17:07:08 +00:00

gpio.c

soc/amd/common/blocks/include: rename gpio_banks.h to gpio.h

2021-09-23 18:33:00 +00:00

graphics.c

soc/amd/cezanne/graphics: add VBIOS ID remapping for Barcelo

2021-07-17 21:32:59 +00:00

i2c.c

treewide: Remove "ERROR: "/"WARN: " prefixes from log messages

2022-02-07 23:29:09 +00:00

Kconfig

soc/amd/{CZN,MDN,PCO}: Fix building with only single RW region

2022-10-07 21:15:55 +00:00

Makefile.inc

soc/amd/*: Move emmc disabling to device ops

2022-10-13 19:39:20 +00:00

mca.c

soc/amd/cezanne/mca: add and use mca_bank_name[]

2021-07-21 22:38:11 +00:00

preload.c

soc/amd/cezanne: Preload FSP-S

2021-11-12 14:55:45 +00:00

reset.c

soc/amd/cezanne: remove warm reset flag code

2021-06-11 21:48:28 +00:00

romstage.c

lib/program_loaders.c: Mark run_ramstage with __noreturn

2022-07-14 23:10:17 +00:00

root_complex.c

soc/amd/cezanne: Use devicetree ops over pci driver

2022-10-13 19:40:36 +00:00

smihandler.c

soc/amd/cezanne,picasso,sabrina/smihandler: add comment about SMN access

2022-08-17 14:08:52 +00:00

smu.c

soc/amd/cezanne: add SMU support

2021-03-04 19:55:27 +00:00

uart.c

soc/amd/cezanne,mendocino,picasso/uart: use write16p to avoid typecasts

2022-09-30 14:49:25 +00:00

xhci.c

soc/amd/common/blocks/include: rename gpio_banks.h to gpio.h

2021-09-23 18:33:00 +00:00