ArmPlatformPkg: Remove PcdStandalone from Sec module and Introduce ArmPlatformSecExtraAction()

The PcdStandalone is a PCD ARM Ltd uses to make the difference between a standalone UEFI (boot
from cold boot to Boot Manager without user intervention) and a Debug UEFI firmware (the firmware
engineer has to copy the Normale World image into the DRAM to enable his/her firmware).

By coping the firmware into DRAM in the non standalone version it is much faster than reflashing
the NOR Flash after each build.

ArmPlatformSecExtraAction() function is called just before the Sec module jump to normal world.
The platform firmware can run extra actions at this stage.
The 'ARM Standalone' concept has moved to the implementation of ArmPlatformSecExtraAction() for
the ARM development boards (in ArmPlatformPkg/Library/DebugSecExtraActionLib).


ArmPlatformPkg: Enable DebugAgentLib in Sec and PrePeiCore


ArmPlatformPkg: Fix line endings in some source files

Use CR+LF line endings as defined by the EDK2 coding convention




git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11991 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/ArmPkg.dec

@@ -57,7 +57,6 @@
   gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032
   
   gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025
-  gArmTokenSpaceGuid.PcdSkipPeiCore|FALSE|BOOLEAN|0x00000026
 
 [PcdsFixedAtBuild.common]
   # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.

ArmPlatformPkg/ArmPlatformPkg.dec

@@ -42,10 +42,14 @@
   # Set this PCD to TRUE to map NORFlash at 0x0. FALSE means the DRAM is mapped at 0x0.
   gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping|FALSE|BOOLEAN|0x00000012
   
+  gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE|BOOLEAN|0x00000001
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|FALSE|BOOLEAN|0x00000002
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|FALSE|BOOLEAN|0x00000004
+  
+
 [PcdsFixedAtBuild.common]
   # These PCDs should be FeaturePcds. But we used these PCDs as an '#if' in an ASM file.
   # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
-  gArmPlatformTokenSpaceGuid.PcdStandalone|0|UINT32|0x00000001
   gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|0|UINT32|0x00000003
   
   # Stack for CPU Cores in Secure Mode

ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc

@@ -123,6 +123,8 @@
 [LibraryClasses.common.SEC]
   ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
   ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf
+  DebugSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
+  
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   
   # 1/123 faster than Stm or Vstm version
@@ -261,7 +263,8 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
 
 !if $(EDK2_SKIP_PEICORE) == 1
-  gArmTokenSpaceGuid.PcdSkipPeiCore|TRUE
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
 !endif
 
   ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
@@ -341,8 +344,6 @@
 #
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
   
-  gArmPlatformTokenSpaceGuid.PcdStandalone|1
-  
   # Stack for CPU Cores in Secure Mode
   gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000     # Top of SEC Stack for Secure World
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0x2000          # Size of SEC Stack for Secure World
@@ -445,7 +446,10 @@
       ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
   }
 !else
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf {
+    <LibraryClasses>
+      PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
+  }
   MdeModulePkg/Core/Pei/PeiMain.inf
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {
     <LibraryClasses>

ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc

@@ -114,6 +114,8 @@
   
   # ARM PL011 UART Driver
   PL011UartLib|ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
+  # ARM PL390 General Interrupt Driver in Secure and Non-secure
+  PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
 
   BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
   
@@ -124,6 +126,8 @@
 [LibraryClasses.common.SEC]
   ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLibSec.inf
   ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf
+  DebugSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
+  
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   
   # 1/123 faster than Stm or Vstm version
@@ -134,9 +138,8 @@
   
   # L2 Cache Driver
   L2X0CacheLib|ArmPlatformPkg/Library/L2X0CacheLibNull/L2X0CacheLibNull.inf
-  # ARM PL390 General Interrupt Driver in Secure and Non-secure
+  # ARM PL390 General Interrupt Driver in Secure
   PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
-  PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
 
 !if $(EDK2_SKIP_PEICORE) == 1
   PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
@@ -263,7 +266,8 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
 
 !if $(EDK2_SKIP_PEICORE) == 1
-  gArmTokenSpaceGuid.PcdSkipPeiCore|TRUE
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
 !endif
 
   ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
@@ -343,7 +347,6 @@
 #
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
   
-  gArmPlatformTokenSpaceGuid.PcdStandalone|1
   gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
   
   # Stacks for MPCores in Secure World
@@ -452,7 +455,10 @@
       ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
   }
 !else
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
+    <LibraryClasses>
+      PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
+  }
   MdeModulePkg/Core/Pei/PeiMain.inf
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {
     <LibraryClasses>

ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf

@@ -37,10 +37,5 @@
   ArmRealViewEbHelper.asm   | RVCT
   ArmRealViewEbHelper.S     | GCC
 
-[Protocols]
-
 [FeaturePcd]
   gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone

ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf

@@ -13,7 +13,7 @@
 
 [Defines]
   INF_VERSION                    = 0x00010005
-  BASE_NAME                      = ArmRealViewEbLib
+  BASE_NAME                      = ArmRealViewEbSecLib
   FILE_GUID                      = 6e02ebe0-1d96-11e0-b9cb-0002a5d5c51b
   MODULE_TYPE                    = BASE
   VERSION_STRING                 = 1.0
@@ -37,10 +37,5 @@
   ArmRealViewEbBoot.asm     | RVCT
   ArmRealViewEbBoot.S       | GCC
 
-[Protocols]
-
 [FeaturePcd]
   gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone

ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc

@@ -136,6 +136,7 @@
 [LibraryClasses.common.SEC]
   ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLibSec.inf
   ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
+  DebugSecExtraActionLib|ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf
   
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   
@@ -284,10 +285,18 @@
 
   gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
 
-!if $(EDK2_SKIP_PEICORE) == 1
+!if $(EDK2_ARMVE_STANDALONE) == 1
-  gArmTokenSpaceGuid.PcdSkipPeiCore|TRUE
+  gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE
+!else
+  gArmPlatformTokenSpaceGuid.PcdStandalone|FALSE
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
 !endif
 
+!if $(EDK2_SKIP_PEICORE) == 1
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
+!endif
   
   ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
   #  It could be set FALSE to save size.
@@ -377,10 +386,6 @@
   gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
   gArmTokenSpaceGuid.PcdVFPEnabled|1
   
-!if $(EDK2_ARMVE_STANDALONE) == 1
-  gArmPlatformTokenSpaceGuid.PcdStandalone|1
-!endif
-
   # Stacks for MPCores in Secure World
   gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x49E00000	    # Top of SEC Stack for Secure World
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0x2000		      # Stack for each of the 4 CPU cores
@@ -493,7 +498,10 @@
       ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
   }
 !else
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
+    <LibraryClasses>
+      PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
+  }
   MdeModulePkg/Core/Pei/PeiMain.inf
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {
     <LibraryClasses>

ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf

@@ -42,15 +42,11 @@
   CTA9x4Helper.asm   | RVCT
   CTA9x4Helper.S     | GCC
 
-[Protocols]
-
 [FeaturePcd]
   gEmbeddedTokenSpaceGuid.PcdCacheEnable
   gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
 
 [FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
-
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
 

ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf

@@ -30,6 +30,7 @@
   ArmLib
   ArmTrustZoneLib
   ArmPlatformSysConfigLib
+  DebugSecExtraActionLib
   IoLib
   L2X0CacheLib
   PL301AxiLib
@@ -45,13 +46,9 @@
   CTA9x4Boot.asm     | RVCT
   CTA9x4Boot.S       | GCC
 
-[Protocols]
-
 [FeaturePcd]
   gEmbeddedTokenSpaceGuid.PcdCacheEnable
   gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
 
 [FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
-
   gArmTokenSpaceGuid.PcdL2x0ControllerBase

ArmPlatformPkg/Include/Library/ArmPlatformLib.h

@@ -94,6 +94,19 @@ ArmPlatformSecInitialize (
   VOID
   );
 
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         CoreId,
+  OUT UINTN*        JumpAddress
+  );
+
 /**
   Initialize controllers that must setup in the normal world
 

ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c

@@ -0,0 +1,103 @@
+/** @file
+*
+*  Copyright (c) 2011, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <PiPei.h>
+
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PrintLib.h>
+#include <Library/SerialPortLib.h>
+
+#include <Drivers/PL390Gic.h>
+
+#define ARM_PRIMARY_CORE    0
+
+// When the firmware is built as not Standalone, the secondary cores need to wait the firmware
+// entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
+VOID
+NonSecureWaitForFirmware (
+  VOID
+  )
+{
+  VOID (*secondary_start)(VOID);
+
+  // The secondary cores will execute the firmware once wake from WFI.
+  secondary_start = (VOID (*)())PcdGet32(PcdNormalFvBaseAddress);
+
+  ArmCallWFI();
+
+  // Acknowledge the interrupt and send End of Interrupt signal.
+  PL390GicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), ARM_PRIMARY_CORE);
+
+  // Jump to secondary core entry point.
+  secondary_start ();
+
+  // PEI Core should always load and never return
+  ASSERT (FALSE);
+}
+
+/**
+  Call before jumping to Normal World
+
+  This function allows the firmware platform to do extra actions before
+  jumping to the Normal World
+
+**/
+VOID
+ArmPlatformSecExtraAction (
+  IN  UINTN         CoreId,
+  OUT UINTN*        JumpAddress
+  )
+{
+  CHAR8           Buffer[100];
+  UINTN           CharCount;
+
+  if (FeaturePcdGet (PcdStandalone) == FALSE) {
+    if (CoreId == ARM_PRIMARY_CORE) {
+      UINTN*   StartAddress = (UINTN*)PcdGet32(PcdNormalFvBaseAddress);
+
+      // Patch the DRAM to make an infinite loop at the start address
+      *StartAddress = 0xEAFFFFFE; // opcode for while(1)
+
+      CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
+      SerialPortWrite ((UINT8 *) Buffer, CharCount);
+
+      *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);
+    } else {
+      // When the primary core is stopped by the hardware debugger to copy the firmware
+      // into DRAM. The secondary cores are still running. As soon as the first bytes of
+      // the firmware are written into DRAM, the secondary cores will start to execute the
+      // code even if the firmware is not entirely written into the memory.
+      // That's why the secondary cores need to be parked in WFI and wake up once the
+      // firmware is ready.
+
+      *JumpAddress = (UINTN)NonSecureWaitForFirmware;
+    }
+  } else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
+    if (CoreId == ARM_PRIMARY_CORE) {
+      // Signal the secondary cores they can jump to PEI phase
+      PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
+
+      // To enter into Non Secure state, we need to make a return from exception
+      *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);
+    } else {
+      // We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
+      // cores would make crash the system by setting their stacks in DRAM before the primary core has not
+      // finished to initialize the system memory.
+      *JumpAddress = (UINTN)NonSecureWaitForFirmware;
+    }
+  } else {
+    *JumpAddress = PcdGet32(PcdNormalFvBaseAddress);
+  }
+}

ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf

@@ -0,0 +1,51 @@
+#/* @file
+#  Copyright (c) 2011, ARM Limited. All rights reserved.
+#  
+#  This program and the accompanying materials                          
+#  are licensed and made available under the terms and conditions of the BSD License         
+#  which accompanies this distribution.  The full text of the license may be found at        
+#  http://opensource.org/licenses/bsd-license.php                                            
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
+#
+#*/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = DebugSecExtraActionLib
+  FILE_GUID                      = 8fff7a60-a6f8-11e0-990a-0002a5d5c51b
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = DebugSecExtraActionLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = ARM
+#
+
+[Sources.common]
+  DebugSecExtraActionLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  ArmPkg/ArmPkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
+
+[LibraryClasses]
+  DebugLib
+  PcdLib
+  PL390GicSecLib
+  PrintLib
+  SerialPortLib
+
+[FeaturePcd]
+  gArmPlatformTokenSpaceGuid.PcdStandalone
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
+
+[FixedPcd]
+  gArmTokenSpaceGuid.PcdNormalFvBaseAddress
+  
+  gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase

ArmPlatformPkg/PrePeiCore/MainMPCore.c

@@ -69,7 +69,7 @@ PrimaryMain (
   PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));
 
   // If ArmVe has not been built as Standalone then we need to wake up the secondary cores
-  if (!PcdGet32(PcdStandalone)) {
+  if (FeaturePcdGet(PcdSendSgiToBringUpSecondaryCores)) {
     // Sending SGI to all the Secondary CPU interfaces
     PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
   }

ArmPlatformPkg/PrePeiCore/PrePeiCore.c

@@ -16,6 +16,7 @@
 #include <Library/IoLib.h>
 #include <Library/BaseLib.h>
 #include <Library/BaseMemoryLib.h>
+#include <Library/DebugAgentLib.h>
 #include <Library/PrintLib.h>
 #include <Library/ArmLib.h>
 #include <Library/SerialPortLib.h>
@@ -62,6 +63,10 @@ CEntryPoint (
 
   //If not primary Jump to Secondary Main
   if(0 == CoreId) {
+    // Initialize the Debug Agent for Source Level Debugging
+    InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
+    SaveAndSetDebugTimerInterrupt (TRUE);
+
     // Goto primary Main.
     PrimaryMain (PeiCoreEntryPoint);
   } else {

ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf

@@ -42,6 +42,7 @@
   ArmMPCoreMailBoxLib
   BaseLib
   DebugLib
+  DebugAgentLib
   IoLib
   PL390GicNonSecLib
   PrintLib
@@ -50,9 +51,10 @@
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid
 
-[FixedPcd]
+[FeaturePcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
 
+[FixedPcd]
   gArmTokenSpaceGuid.PcdNormalFvBaseAddress
   gArmTokenSpaceGuid.PcdNormalFvSize
 

ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf

@@ -41,16 +41,17 @@
   ArmPlatformLib
   BaseLib
   DebugLib
+  DebugAgentLib
   IoLib
   PrintLib
-  SerialPortLib
 
 [Ppis]
   gEfiTemporaryRamSupportPpiGuid
 
-[FixedPcd]
+[FeaturePcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
 
+[FixedPcd]
   gArmTokenSpaceGuid.PcdNormalFvBaseAddress
   gArmTokenSpaceGuid.PcdNormalFvSize
 

ArmPlatformPkg/PrePi/PeiMPCore.inf

@@ -59,9 +59,9 @@
 [FeaturePcd]  
   gEmbeddedTokenSpaceGuid.PcdCacheEnable
   gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
 
 [FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
   gArmTokenSpaceGuid.PcdVFPEnabled
 
   gArmTokenSpaceGuid.PcdNormalFdBaseAddress

ArmPlatformPkg/PrePi/PeiUniCore.inf

@@ -57,9 +57,9 @@
 [FeaturePcd]  
   gEmbeddedTokenSpaceGuid.PcdCacheEnable
   gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob
+  gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores
 
 [FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
   gArmTokenSpaceGuid.PcdVFPEnabled
 
   gArmTokenSpaceGuid.PcdNormalFdBaseAddress

ArmPlatformPkg/Sec/Sec.c

@@ -14,6 +14,7 @@
 **/
 
 #include <Library/DebugLib.h>
+#include <Library/DebugAgentLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PrintLib.h>
 #include <Library/BaseLib.h>
@@ -70,6 +71,7 @@ CEntryPoint (
 {
   CHAR8           Buffer[100];
   UINTN           CharCount;
+  UINTN           JumpAddress;
 
   // Primary CPU clears out the SCU tag RAMs, secondaries wait
   if (CoreId == ARM_PRIMARY_CORE) {
@@ -85,6 +87,10 @@ CEntryPoint (
     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);
     SerialPortWrite ((UINT8 *) Buffer, CharCount);
 
+    // Initialize the Debug Agent for Source Level Debugging
+    InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
+    SaveAndSetDebugTimerInterrupt (TRUE);
+
     // Now we've got UART, make the check:
     // - The Vector table must be 32-byte aligned
     ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0);
@@ -119,7 +125,7 @@ CEntryPoint (
 
     // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
     // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
-    if (FeaturePcdGet(PcdSkipPeiCore) || !PcdGet32(PcdStandalone)) {
+    if (FeaturePcdGet(PcdSystemMemoryInitializeInSec)) {
       // Initialize system memory (DRAM)
       ArmPlatformInitializeSystemMemory ();
     }
@@ -203,76 +209,16 @@ CEntryPoint (
     copy_cpsr_into_spsr ();
   }
 
-  // If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
+  JumpAddress = PcdGet32 (PcdNormalFvBaseAddress);
-  if (!PcdGet32(PcdStandalone)) {
+  ArmPlatformSecExtraAction (CoreId, &JumpAddress);
-    if (CoreId == ARM_PRIMARY_CORE) {
-      UINTN*   StartAddress = (UINTN*)PcdGet32(PcdNormalFvBaseAddress);
 
-      // Patch the DRAM to make an infinite loop at the start address
+  return_from_exception (JumpAddress);
-      *StartAddress = 0xEAFFFFFE; // opcode for while(1)
-
-      CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
-      SerialPortWrite ((UINT8 *) Buffer, CharCount);
-
-      // To enter into Non Secure state, we need to make a return from exception
-      return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
-    } else {
-      // When the primary core is stopped by the hardware debugger to copy the firmware
-      // into DRAM. The secondary cores are still running. As soon as the first bytes of
-      // the firmware are written into DRAM, the secondary cores will start to execute the
-      // code even if the firmware is not entirely written into the memory.
-      // That's why the secondary cores need to be parked in WFI and wake up once the
-      // firmware is ready.
-
-      // Enter Secondary Cores into non Secure State. To enter into Non Secure state, we need to make a return from exception
-      return_from_exception((UINTN)NonSecureWaitForFirmware);
-    }
-  } else if (FeaturePcdGet(PcdSkipPeiCore)) {
-    if (CoreId == ARM_PRIMARY_CORE) {
-      // Signal the secondary cores they can jump to PEI phase
-      PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
-
-      // To enter into Non Secure state, we need to make a return from exception
-      return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
-    } else {
-      // We wait for the primary core to finish to initialize the System Memory. When we skip PEI Core, we could set the stack in DRAM
-      // Without this synchronization the secondary cores will complete the SEC before the primary core has finished to intitialize the DRAM.
-      return_from_exception((UINTN)NonSecureWaitForFirmware);
-    }
-  } else {
-    // To enter into Non Secure state, we need to make a return from exception
-    return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
-  }
   //-------------------- Non Secure Mode ---------------------
 
   // PEI Core should always load and never return
   ASSERT (FALSE);
 }
 
-// When the firmware is built as not Standalone, the secondary cores need to wait the firmware
-// entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
-VOID
-NonSecureWaitForFirmware (
-  VOID
-  )
-{
-  VOID (*secondary_start)(VOID);
-
-  // The secondary cores will execute the firmware once wake from WFI.
-  secondary_start = (VOID (*)())PcdGet32(PcdNormalFvBaseAddress);
-
-  ArmCallWFI();
-
-  // Acknowledge the interrupt and send End of Interrupt signal.
-  PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase),ARM_PRIMARY_CORE);
-
-  // Jump to secondary core entry point.
-  secondary_start();
-
-  // PEI Core should always load and never return
-  ASSERT (FALSE);
-}
-
 VOID
 SecCommonExceptionEntry (
   IN UINT32 Entry,

ArmPlatformPkg/Sec/Sec.inf

@@ -40,16 +40,16 @@
   ArmPlatformLib
   BaseLib
   DebugLib
+  DebugAgentLib
   IoLib
   PL390GicSecLib
   PrintLib
   SerialPortLib
   
 [FeaturePcd]
-  gArmTokenSpaceGuid.PcdSkipPeiCore
+  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec
   
 [FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdStandalone
   gArmTokenSpaceGuid.PcdVFPEnabled
   gArmPlatformTokenSpaceGuid.PcdMPCoreSupport