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305 Commits
edk2-stabl ... edk2-stabl

Author SHA1 Message Date
Ard Biesheuvel
3e722403cd ArmVirtPkg/ArmVirtQemu: Add RngDxe driver 
Add the RngDxe driver to the build, backed by either RNDR or TRNG, one
of which is expected to be available in most cases:
- RNDR is implemented by the 'max' CPU that QEMU implements in TCG mode
- TRNG is implemented by the KVM hypervisor, which backs QEMU's 'host'
  CPU

Other TCG modes (e.g., the 'cortex-a*' CPUs) implement neither, which
should prevent the RngDxe driver from dispatching entirely, resulting
in the same situation as before.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Ard Biesheuvel
66c69871e7 ArmVirtPkg: Reverse inclusion order of MdeLibs.inc and ArmVirt.dsc.inc 
MdeLibs.inc sets default library class resolutions which are much more
general than the ones that might be specified in ArmVirt.dsc.inc. So the
latter should be included *after* MdeLibs.inc to ensure that its
definitions take precedence.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Ard Biesheuvel
c98f7f7550 ArmVirtPkg: Use dynamic PCD to set the SMCCC conduit 
On ARM systems, whether SMC or HVC instructions need to be used to issue
monitor calls is typically dependent on the exception level, but there
are also cases where EL1 might use SMC instructions, so there is no hard
and fast rule.

For ArmVirtQemu, this does depend strictly on the exception level, so
set the default to HVC (for EL1 execution) and override it to SMC when
booted at EL2.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Ard Biesheuvel
865229bcc8 ArmVirtPkg/ArmVirtQemu: Permit the use of dynamic PCDs in PEI 
Currently, only TPM2 builds enable the PCD PEIM, which is a prerequisite
for being able to use dynamic PCDs already at the PEI stage. This
facility will be used for other reasons too so move those pieces out of
code block that are conditional on TPM2_ENABLE

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Ard Biesheuvel
4ddf2448ed MdePkg/BaseRngLib AARCH64: Remove overzealous ASSERT() 
BaseRngLib on AARCH64 will discover whether or not RNDR instructions are
supported, by inspecting the ISAR0 identification register, and setting
a global boolean accordingly. This boolean is used in subsequent
execution to decide whether or not to issue the instruction.

The same discovery code also ASSERT()s that RNDR instructions are
implemented, which is unnecessary, and breaks execution on systems that
incorporate the library but don't implement the instruction (or fail to
expose it to the exception level that the firmware executes at).

So drop the ASSERT().

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-24 15:48:52 +00:00
Flickdm
9440986d4e ArmVirtPkg: Move PcdMonitorConduitHvc 
This moves the PcdMonitorConduitHvc from PcdsFeatureFlag.Common to
PcdsFixedAtBuild.Common

This is a follow on to the previous commit:
ArmPkg: Allow SMC/HVC monitor conduit to be specified at runtime

ArmVirtQemu may execute at EL2, in which case monitor calls are
generally made using SMC instructions instead of HVC instructions.

Whether or not this is the case can only be decided at runtime, and so
the associated PCD needs to be settable at runtime, if the platform
definition chooses so. This implies a boolean PCD, given that a feature
PCD is build-time configurable only.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Ard Biesheuvel
32460bb5b1 ArmPkg: Allow SMC/HVC monitor conduit to be specified at runtime 
ArmVirtQemu may execute at EL2, in which case monitor calls are
generally made using SMC instructions instead of HVC instructions.

Whether or not this is the case can only be decided at runtime, and so
the associated PCD needs to be settable at runtime, if the platform
definition chooses so. This implies a boolean PCD, given that a feature
PCD is build-time configurable only.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>

Committed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Doug Flick
207b6d68a0 NetworkPkg: Update the PxeBcDhcp6GoogleTest due to underlying changes 
This patch updates the PxeBcDhcp6GoogleTest due to the changes in the
underlying code. The changes are as follows:
 - Random now comes from the RngLib Protocol
 - The TCP ISN is now generated by the hash function

Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Zachary Clark-williams <zachary.clark-williams@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
 2024-05-24 15:48:52 +00:00
Doug Flick
dff3d3811f MdePkg: Add MockHash2 Protocol for testing 
This commit adds a new MockHash2 protocol to the MdePkg. This allows
the unit tests to pick up the new protocol and use it for testing.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-24 15:48:52 +00:00
Doug Flick
4afb939531 MdePkg: Adds Protocol for MockRng 
This patch adds a protocol for MockRng. This protocol is used to
mock the Rng protocol for testing purposes.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-24 15:48:52 +00:00
Doug Flick
72a9ef1c8a MdePkg: Add MockUefiBootServicesTableLib 
This commit adds a mock library for UefiBootServicesTableLib.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-24 15:48:52 +00:00
Doug Flick
1904a64bcc NetworkPkg TcpDxe: SECURITY PATCH CVE-2023-45236 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4541
REF: https://www.rfc-editor.org/rfc/rfc1948.txt
REF: https://www.rfc-editor.org/rfc/rfc6528.txt
REF: https://www.rfc-editor.org/rfc/rfc9293.txt

Bug Overview:
PixieFail Bug #8
CVE-2023-45236
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:C/C:L/I:N/A:N
CWE-200 Exposure of Sensitive Information to an Unauthorized Actor

Updates TCP ISN generation to use a cryptographic hash of the
connection's identifying parameters and a secret key.
This prevents an attacker from guessing the ISN used for some other
connection.

This is follows the guidance in RFC 1948, RFC 6528, and RFC 9293.

RFC: 9293 Section 3.4.1.  Initial Sequence Number Selection

   A TCP implementation MUST use the above type of "clock" for clock-
   driven selection of initial sequence numbers (MUST-8), and SHOULD
   generate its initial sequence numbers with the expression:

   ISN = M + F(localip, localport, remoteip, remoteport, secretkey)

   where M is the 4 microsecond timer, and F() is a pseudorandom
   function (PRF) of the connection's identifying parameters ("localip,
   localport, remoteip, remoteport") and a secret key ("secretkey")
   (SHLD-1).  F() MUST NOT be computable from the outside (MUST-9), or
   an attacker could still guess at sequence numbers from the ISN used
   for some other connection.  The PRF could be implemented as a
   cryptographic hash of the concatenation of the TCP connection
   parameters and some secret data.  For discussion of the selection of
   a specific hash algorithm and management of the secret key data,
   please see Section 3 of [42].

   For each connection there is a send sequence number and a receive
   sequence number.  The initial send sequence number (ISS) is chosen by
   the data sending TCP peer, and the initial receive sequence number
   (IRS) is learned during the connection-establishing procedure.

   For a connection to be established or initialized, the two TCP peers
   must synchronize on each other's initial sequence numbers.  This is
   done in an exchange of connection-establishing segments carrying a
   control bit called "SYN" (for synchronize) and the initial sequence
   numbers.  As a shorthand, segments carrying the SYN bit are also
   called "SYNs".  Hence, the solution requires a suitable mechanism for
   picking an initial sequence number and a slightly involved handshake
   to exchange the ISNs.

Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Zachary Clark-williams <zachary.clark-williams@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
 2024-05-24 15:48:52 +00:00
Doug Flick
4c4ceb2ceb NetworkPkg: SECURITY PATCH CVE-2023-45237 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4542

Bug Overview:
PixieFail Bug #9
CVE-2023-45237
CVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:N/A:N
CWE-338 Use of Cryptographically Weak Pseudo-Random Number Generator (PRNG)

Use of a Weak PseudoRandom Number Generator

Change Overview:

Updates all Instances of NET_RANDOM (NetRandomInitSeed ()) to either

>
> EFI_STATUS
> EFIAPI
> PseudoRandomU32 (
>  OUT UINT32  *Output
>  );
>

or (depending on the use case)

>
> EFI_STATUS
> EFIAPI
> PseudoRandom (
>  OUT  VOID   *Output,
>  IN   UINTN  OutputLength
>  );
>

This is because the use of

Example:

The following code snippet PseudoRandomU32 () function is used:

>
> UINT32         Random;
>
> Status = PseudoRandomU32 (&Random);
> if (EFI_ERROR (Status)) {
>   DEBUG ((DEBUG_ERROR, "%a failed to generate random number: %r\n",
__func__, Status));
>   return Status;
> }
>

This also introduces a new PCD to enable/disable the use of the
secure implementation of algorithms for PseudoRandom () and
instead depend on the default implementation. This may be required for
some platforms where the UEFI Spec defined algorithms are not available.

>
> PcdEnforceSecureRngAlgorithms
>

If the platform does not have any one of the UEFI defined
secure RNG algorithms then the driver will assert.

Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Zachary Clark-williams <zachary.clark-williams@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
 2024-05-24 15:48:52 +00:00
Flickdm
a85336531c SecurityPkg RngDxe: Remove incorrect limitation on GetRng 
Removed from gEfiRngAlgorithmRaw an incorrect assumption that
Raw cannot return less than 256 bits. The DRNG Algorithms
should always use a 256 bit seed as per nist standards
however a caller is free to request less than 256 bits.
>
>     //
>    // When a DRBG is used on the output of a entropy source,
>    // its security level must be at least 256 bits according to UEFI
Spec.
>    //
>    if (RNGValueLength < 32) {
>      return EFI_INVALID_PARAMETER;
>    }
>

AARCH64 platforms do not have this limitation and this brings both
implementations into alignment with each other and the spec.

Cc: Jiewen Yao <jiewen.yao@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Acked-by: Jiewe Yao <Jiewen.yao@intel.com>
 2024-05-24 15:48:52 +00:00
Flickdm
e10d83234c ArmVirtPkg: Add Hash2DxeCrypto to ArmVirtPkg 
This patch adds Hash2DxeCrypto to ArmVirtPkg. The Hash2DxeCrypto is
used to provide the hashing protocol services.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Flickdm
677204f941 ArmVirtPkg PlatformCI: Support virtio-rng-pci 
This patch adds "virtio-rng-pci" to the PlatformBuildLib.py
This adds Rng services to the guest VM

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Doug Flick
cb9d711891 OvmfPkg: Add Hash2DxeCrypto to OvmfPkg 
This patch adds Hash2DxeCrypto to OvmfPkg. The Hash2DxeCrypto is
used to provide the hashing protocol services.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Flickdm
4f58e0cf99 OvmfPkg PlatformCI: Support virtio-rng-pci 
This patch adds "virtio-rng-pci" to the PlatformBuildLib.py
This adds Rng services to the guest VM

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-05-24 15:48:52 +00:00
Doug Flick
024a291b3e EmulatorPkg: Add Hash2DxeCrypto to EmulatorPkg 
This patch adds Hash2DxeCrypto to EmulatorPkg. The Hash2DxeCrypto is
used to provide the hashing protocol services.

Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ray Ni <ray.ni@Intel.com>
 2024-05-24 15:48:52 +00:00
Flickdm
319bb7223a EmulatorPkg: Add RngDxe to EmulatorPkg 
This patch adds RngDxe to EmulatorPkg. The RngDxe is used to provide
random number generation services to the UEFI firmware.

Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>

Signed-off-by: Doug Flick [MSFT] <doug.edk2@gmail.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-24 15:48:52 +00:00
Michael Kubacki
7142e64841 CodeQL: Update from 2.16.1 to 2.17.3 
This fixes an issue where the CodeQL queries currently fetched in the
pipeline are incompatible with the current executable used.

Update to pick up functional and security fixes. See the following
comparison for detailed differences:

https://github.com/github/codeql-cli-binaries/compare/v2.16.1...v2.17.3

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Joey Vagedes <joey.vagedes@gmail.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-05-21 02:24:08 +00:00
Shanmugavel Pakkirisamy
284dbac43d MdeModulePkg: Potential UINT32 overflow in S3 ResumeCount 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4677

Attacker able to modify physical memory and ResumeCount.
System will crash/DoS when ResumeCount reaches its MAX_UINT32.

Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Pakkirisamy ShanmugavelX <shanmugavelx.pakkirisamy@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-17 05:33:52 +00:00
Shun Cheng Liu
558a25366d MdePkg/BaseLib: Fix AARCH64 compilation error 
Declare InternalAssertJumpBuffer as EXTERN

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Shun Cheng Liu <adam.liu@tw.synaptics.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
 2024-05-15 01:13:18 +00:00
Ray Ni
4b6ee06a09 MdePkg: Add MmUnblockMemoryLib to MdeLibs.dsc 
MdeLibs.dsc.inc included some default libraries provided by MdePkg.
Platform can include MdeLibs.dsc.inc file to avoid some potential
incompatible changes to platform dsc file in future.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-05-10 03:46:27 +00:00
Abdul Lateef Attar
3c0b84420f DynamicTablesPkg: Adds integer to the AML package node 
Adds an AmlAddIntegerToNamedPackage() API to generate AML code,
which adds an integer value to the package node.

Cc: Pierre Gondois <pierre.gondois@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
 2024-05-10 08:47:52 +08:00
praveensankarn
25996a3441 MdePkg: Updated SpcrTable structure for Revision_4 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4656

In SPCR table, 4 structure members have been added newly as per SPCR
table Revision 4, which has to be added in
MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h.

Signed-off-by: Praveen Sankar N <praveensankarn@ami.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

Cc: Felix Polyudov <Felixp@ami.com>
Cc: Srinivasan Mani <srinivasanm@ami.com>
Cc: Sundaresan S <sundaresans@ami.com>
Cc: Rabisha R <rabishar@ami.com>
 2024-05-09 15:08:55 +08:00
Sachin Ganesh
b82c9631da OvmfPkg: Use newly defined Unaccepted Memory Type 
EFI_RESOURCE_MEMORY_UNACCEPTED has been officially defined in the PI
1.8 specification. So all temporary solutions have been replaced with
the actual definition.

Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-05-08 11:34:49 +00:00
Sachin Ganesh
f3b0ee0cee MdePkg: Update Delayed Dispatch PPI as per PI 1.8 Spec 
Added WaitOnEvent() function to EFI_DELAYTED_DISPATCH_PPI.
Modified DispatchRegister() parameter list.

Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 11:34:49 +00:00
Sachin Ganesh
09340de246 MdeModulePkg: Use newly defined Unaccepted Memory Type 
EFI_RESOURCE_MEMORY_UNACCEPTED has been officially defined in the PI
1.8 specification. So all temporary solutions have been replaced with
the actual definition.

Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 11:34:49 +00:00
Sachin Ganesh
6fd2d58d5d MdePkg: Define Unaccepted Memory Type 
EFI_RESOURCE_MEMORY_UNACCEPTED has been officially defined in the PI
1.8 specification. So all temporary solutions have been replaced with
the actual definition.

Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 11:34:49 +00:00
Sachin Ganesh
b538d6a1b1 MdePkg: Add new Resource Attributes defined in PI 1.8 Spec 
Defined Encrypted and Special Purpose resource attributes as
defined in PI 1.8 Specification

Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 11:34:49 +00:00
Sachin Ganesh
b04e11b4c4 MdePkg: Add definition for NVMe Over Fabric Device Path 
In accordance with UEFI 2.10 Specification:
Adding definition for NVMe Over Fabric (NVMe-oF) Device Path
of Messaging Sub-Type.

Cc: Felix Polyudov <felixp@ami.com>
Cc: Dhanaraj V <vdhanaraj@ami.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Sachin Ganesh <sachinganesh@ami.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 11:34:49 +00:00
Jiaxin Wu
5cbfb93abe UefiCpuPkg/Library: Support to get processor extended info 
Intel has some features need to use processor extended
information under CPU feature InitializeFunc(), so add code
to support it: This patch is to add CPU_V2_EXTENDED_TOPOLOGY
to get processor extended info.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 08:17:31 +00:00
Brit Chesley
952b5cf94c MdeModulePkg: Adding SpiHc Drivers 
Including the SpiHc drivers in MdeModulePkg.dsc

Bugzilla #4753

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 04:43:58 +00:00
Brit Chesley
82b0358e3f MdeModulePkg: SpiHc: SpiHc Drivers 
Added SpiHc DXE and SMM drivers. This code receives bus transactions
from the SpiBus layer and passes them onto the SpiHcPlatformLib

Platform Initialization Spec 1.7 volume 5 section 18.1.7

Bugzilla #4753

Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
 2024-05-08 04:43:58 +00:00
Brit Chesley
5590cefe93 MdeModulePkg:BaseSpiHcPlatformLib: Adding NULL lib instance 
Adding NULL SpiHcPlatformLib instance. This library is responsible for
handling the low level details of the SPI host controller. Since this is
platform specific this library will be dependent on OEM SPI
implementation. The SPI host controller layer will utilize this library
for SPI bus transactions.

Bugzilla #4753

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 04:43:58 +00:00
Brit Chesley
916f495e77 MdeModulePkg: Adding SpiBus Drivers 
Including the SpiBus drivers in MdeModulePkg.dsc

Platform Initialization spec 1.7 volume 5 section 18.1.6

Bugzilla #4753

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-08 04:43:58 +00:00
Brit Chesley
efc7ccf906 MdeModulePkg/Bus/Spi/SpiBus: Adding SpiBus Drivers 
Added SpiBus DXE and SMM drivers. This code translates SPI requests from
the application layer into SPI Bus transactions on the SPI host
controller. The code is responsible for checking if the transaction is
valid, then setting up the SPI clock and chip select properly before
passing the bus transaction to the host controller.

Platform Initialization Spec 1.7 volume 5 section 18.1.6

Bugzilla #4753

Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
 2024-05-08 04:43:58 +00:00
Abner Chang
fa7fdb89a3 MdePkg/SpiConfiguration: Correct the definition spelling 
Cc: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
 2024-05-08 04:43:58 +00:00
Jiaxin Wu
2727231b0a UefiCpuPkg/PiSmmCpuDxeSmm: Remove SmBases relocation logic 
This patch is to remove legacy SmBase relocation in
PiSmmCpuDxeSmm Driver. The responsibility for SmBase
relocation has been transferred to the SmmRelocationInit
interface, which now handles the following tasks:
1. Relocates the SmBase for each processor.
2. Generates the gSmmBaseHobGuid HOB.

As a result of this change, the PiSmmCpuDxeSmm driver's
role in SMM environment setup is simplified to:
1. Utilize the gSmmBaseHobGuid to determine the SmBase.
2. Perform the ExecuteFirstSmiInit() to do early SMM
initialization.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
23ed7f209c UefiPayloadPkg/UefiPayloadPkg.dsc: Include SmmRelocationLib 
This patch just includes SmmRelocationLib in UefiPayloadPkg.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
6b3a89a9fd OvmfPkg/PlatformPei: Relocate SmBases in PEI phase 
This patch is to consume SmmRelocationInit for SmBase
Relocation.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
4a6400b084 OvmfPkg/SmmCpuFeaturesLib: Check Smbase Relocation is done or not 
Based on gSmmBaseHobGuid:
If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array.
So, this patch check smbase relocation is done or not in
SmmCpuFeaturesInitializeProcessor().

With SmmRelocationLib, gSmmBaseHobGuid will be always created.
Here this patch just makes the function/logic correct. The SMM
Relocation logic can be totally cleaned from the
SmmCpuFeaturesLib. But it will happen in the future patch set,
this patch does not target to the cleanup work.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
04c36d5a1b OvmfPkg: Refine SmmAccess implementation 
This patch refines the SmmAccess implementation:
1. SmramMap will be retrieved from the
gEfiSmmSmramMemoryGuid instead of original from
the TSEG Memory Base register.
2. Remove the gEfiAcpiVariableGuid creation, thus
the DESCRIPTOR_INDEX definition can be also cleaned.
3. The gEfiAcpiVariableGuid HOB is moved to the
OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
6a468a8b55 OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid 
In the PiSmmCpuDxeSmm driver, SMRAM allocation for SMI
handlers and processor Save State areas was traditionally
performed using the Smst->AllocatePages() function during
the DXE phase. The introduction of SmmRelocationLib
changes this process by moving the allocation to the PEI
phase, where Smst->AllocatePages() is not accessible.
Instead, the allocation is now handled by partitioning
the SMRAM based on the information provided by a GUID HOB
(identified by gEfiSmmSMramMemoryGuid).

This patch is to ensure that OVMF produces the
gEfiSmmSMramMemoryGuid HOB, allowing SmmRelocationLib to
reserve the necessary memory for SMBASE relocation.

More info for the change:
1. The EFI_SMM_SMRAM_MEMORY_GUID HOB, as defined in the PI
specification, vol.3, section 5, which is used to describe
the SMRAM memory regions supported by the platform. This HOB
should be produced during the memory detection phase to
align with the PI spec.

2. In addition to the memory reserved for ACPI S3 resume,
an increasing number of features require reserving SMRAM
for specific purposes, such as SmmRelocation. Other
advanced features in Intel platforms also necessitate
this. The implementation of these features varies and is
entirely dependent on the platform. This is why an
increasing number of platforms are adopting the
EFI_SMM_SMRAM_MEMORY_GUID HOB for SMRAM description.

3. It is crucial that the SMRAM information remains
consistent when retrieved from the platform, whether
through the SMM ACCESS PPI/Protocol or the
EFI_SMM_SMRAM_MEMORY_GUID HOB. Inconsistencies can lead
to unexpected issues, most commonly memory region conflicts.

4. The SMM ACCESS PPI/Protocol can be naturally
implemented for general use. The common approach is to
utilize the EFI_SMM_SMRAM_MEMORY_GUID HOB. For reference,
see the existing implementation in the EDK2 repository at
edk2/UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.inf and
edk2-platforms/Silicon/Intel/IntelSiliconPkg/Feature/
SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf.

Next patch will refine the OVMF SMM Access to consume
the EFI_SMM_SMRAM_MEMORY_GUID HOB.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
3dfd64305b OvmfPkg/SmmRelocationLib: Add library instance for OVMF 
There are below 2 differences between AMD & OVMF according
existing implementation:
1.The mode of the CPU check is different between the AMD & OVMF.
OVMF:
CpuSaveState->x86.SMMRevId & 0Xffff

AMD:
 LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA

2.Existing SmBase configuration is different between the
AMD & OVMF.
OVMF:
 if ((CpuSaveState->x86.SMMRevId & 0xFFFF) == 0) {
   CpuSaveState->x86.SMBASE = mSmBaseForAllCpus[CpuIndex];
 } else {
   CpuSaveState->x64.SMBASE = mSmBaseForAllCpus[CpuIndex];
 }

AMD:
 AmdCpuState->x64.SMBASE = mSmBaseForAllCpus[CpuIndex];

This patch provides the SmmRelocationLib library instance
for OVMF to handle the logic difference, and it won't change
the existing implementation code logic.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Tested-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
47f212295f UefiCpuPkg/SmmRelocationLib: Add library instance for AMD 
Due to the definition difference of SMRAM Save State,
SmmBase config in SMRAM Save State for AMD is also different.

This patch provides the AmdSmmRelocationLib library instance
to handle the SMRAM Save State difference.

Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
c56ea95b28 UefiCpuPkg/SmmRelocationLib: Remove unnecessary CpuIndex 
This patch is to remove unnecessary CpuIndex.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
9783dc01cc UefiCpuPkg/SmmRelocationLib: Remove unnecessary global variable 
This patch aims on mProcessorInfo global variable, which can be
defined as local variable in SmmRelocateBases(). With this patch,
no need to allocate the memory for all CPUs to store the
Processor Info.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
7421094136 UefiCpuPkg/SmmRelocationLib: Avoid unnecessary memory allocation 
Since SMM relocation is performed serially for each CPU, there is
no need to allocate buffers for all CPUs to store the SmBase
address in mSmBase and the Rebased flag in mRebased. A defined
global variable is sufficient.

This patch focuses on the mSmBase and mRebased global variables
to prevent unnecessary memory allocation for these variables.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
42e8fa84f7 UefiCpuPkg/SmmRelocationLib: Rename global variables 
This patch aims to rename global variables for clearer
association with Smm Init, ensuring their names are
distinct from those used in the PiSmmCpuDxeSmm Driver.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
51fcd2023b UefiCpuPkg/SmmRelocationLib: Add SmmRelocationLib library instance 
This patch just separates the smbase relocation logic from
PiSmmCpuDxeSmm driver, and moves to the SmmRelocationInit
interface. It maintains the original implementation of most
functions and leaves the definitions of global variables
intact. Further refinements to the code are planned for
subsequent patches.

Platform shall consume the interface for the smbase
relocation if need SMM support.

Note:
Before using SmmRelocationLib, the PiSmmCpuDxeSmm driver
allocates the SMRAM to be used for SMI handler and Save
state area of each processor from Smst->AllocatePages().
With SmmRelocationLib, the SMRAM allocation for SMI
handlers and Save state areas is moved to early PEI
phase (Smst->AllocatePages() service is not available).
So, the allocation is done by splitting the SMRAM out of
the SMRAM regions reported from gEfiSmmSMramMemoryGuid.

So, Platform must produce the gEfiSmmSMramMemoryGuid HOB
for SmmRelocationLib usage.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Jiaxin Wu
af9b851732 UefiCpuPkg: Add SmmRelocationLib class 
Intel plans to separate the smbase relocation logic from
PiSmmCpuDxeSmm driver, and the related behavior will be
moved to the new interface defined by the SmmRelocationLib
class.

The SmmRelocationLib class provides the SmmRelocationInit()
interface for platform to do the smbase relocation, which
shall provide below 2 functionalities:
1. Relocate smbases for each processor.
2. Create the gSmmBaseHobGuid HOB.

With SmmRelocationLib, PiSmmCpuDxeSmm driver (which runs at
a later phase) shall:
1. Consume the gSmmBaseHobGuid HOB for the relocated smbases
for each Processor.
2. Execute the early SMM Init.

This patch just provides the SmmRelocationLib class.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-05-08 01:53:58 +00:00
Ray Ni
987bea6525 UefiCpuPkg/PiSmmCpuDxeSmm: Handle the NULL gMpInformation2HobGuid 
If gMpInformation2HobGuid HOB is NULL,
then fall back to an older way of collecting
CPU information from the MP services library.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
 2024-05-07 06:55:18 +00:00
Xianglei Cai
1c0d4ae2c0 MdeModulePkg/XhciDxe: Add PCD for the delay of HCRST 
https://bugzilla.tianocore.org/show_bug.cgi?id=4727

Recently some of XHCI host controllers require to have
extra 1ms delay before accessing any MMIO register
during reset. PHY transition from P3 to P0 can take
around 1.3ms and the xHCI reset can take around 1.5ms.
Add PCD to control the delay, the default is 2 ms.

Cc: Ray Ni                   <ray.ni@intel.com>
Cc: Liming Gao               <gaoliming@byosoft.com.cn>
Cc: Krzysztof Lewandowski    <krzysztof.lewandowski@intel.com>
Cc: Jenny Huang              <jenny.huang@intel.com>
Cc: More Shih                <more.shih@intel.com>
Cc: Ian Chiu                 <ian.chiu@intel.com>
Signed-off-by: Xianglei Cai <xianglei.cai@intel.com>
Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-07 04:48:09 +00:00
Xianglei Cai
c12bbc1490 MdeModulePkg/XhciDxe: Reset endpoint while USB Transaction error 
https://bugzilla.tianocore.org/show_bug.cgi?id=4556

Based on XHCI spec 4.8.3, software should do the
reset endpoint while USB Transaction occur.
Add the error code for USB Transaction error
since UEFI spec don't have the related definition.

Cc: Ray Ni                  <ray.ni@intel.com>
Cc: Liming Gao              <gaoliming@byosoft.com.cn>
Cc: Krzysztof Lewandowski   <krzysztof.lewandowski@intel.com>
Cc: Jenny Huang             <jenny.huang@intel.com>
Cc: More Shih               <more.shih@intel.com>
Signed-off-by: Xianglei Cai <xianglei.cai@intel.com>
Reviewed-by: Krzysztof Lewandowski <krzysztof.lewandowski@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-07 02:26:46 +00:00
Dionna Glaze
17f333f2a4 OvmfPkg: Add sp800155Event3 support 
The signatures for event2 or event3 are now valid TCG SP800155 event
types. Fixes uncrustify formatting.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
 2024-05-07 00:21:40 +00:00
Dionna Glaze
7097c97bde SecurityPkg: Recognize sp800155Event3 event 
The signatures for event2 or event3 are now valid TCG SP800155 event
types. Fixes uncrustify formatting.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
 2024-05-07 00:21:40 +00:00
Dionna Glaze
370c55b2ba MdePkg: Add TcgSp800155Event3 type info 
TCG PC Client Platform Firmware Profile 1.06 revision 52 of December
2023 added a new event signature and extended information about where a
reference measurement document for the firmware can be found.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Dionna Glaze <dionnaglaze@google.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-05-07 00:21:40 +00:00
Nickle Wang
24fa360857 RedfishPkg: Rename x-uefi-redfish to x-UEFI-redfish 
Rename x-uefi-redfish to x-UEFI-redfish to match the format of
UEFI configuration namespace prefix.

RFC: https://edk2.groups.io/g/rfc/message/849

Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
Co-authored-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
 2024-05-04 04:03:13 +00:00
Duggapu Chinni B
248aa153f6 IntelFsp2Pkg/PatchFv.py: FIX for GCC 32BIT build error 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4762

Map file generating 8 byte address offset is not matched
with the pattern defined in patchFv tool resulting build
error.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
 2024-05-03 00:25:54 +00:00
Michael Roth
fecf55a66a OvmfPkg/CcExitLib: Drop special handling for Encrypted MMIO to APIC 
The current #VC handler guards against MMIO to addresses that are mapped
with the encryption bit set, but has an special exception for MMIO
accesses to the APIC base address so allow for early access during SEC.

Now that the SEC page table has the encryption bit cleared for the APIC
base address range, there is no longer any need for this special
handling. Go ahead and remove it.

Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-05-02 12:43:50 +00:00
Michael Roth
f0ed194236 OvmfPkg: Don't make APIC MMIO accesses with encryption bit set 
For the most part, OVMF will clear the encryption bit for MMIO regions,
but there is currently one known exception during SEC when the APIC
base address is accessed via MMIO with the encryption bit set for
SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special
handling on the hypervisor side which may not be available in the
future[1], so make the necessary changes in the SEC-configured page
table to clear the encryption bit for 4K region containing the APIC
base address.

[1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsaesw@amd.com/#t

Suggested-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jianyong Wu <jianyong.wu@arm.com>
Cc: Anatol Belski <anbelski@linux.microsoft.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-05-02 12:43:50 +00:00
Michael Roth
fd290ab862 OvmfPkg/ResetVector: Clear SEV encryption bit for non-leaf PTEs 
Future changes will make use of CpuPageTableLib to handle splitting
page table mappings during SEC phase. While it's not strictly required
by hardware, CpuPageTableLib relies on non-leaf PTEs never having the
encryption bit set, so go ahead change the page table setup code to
satisfy this expectation.

Suggested-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Michael Roth <michael.roth@amd.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-05-02 12:43:50 +00:00
Anthony PERARD
5f783827bb Maintainers.txt: Update my email address 
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-05-02 12:43:50 +00:00
Jiaxin Wu
5d4c5253e8 Maintainers.txt: Update StandaloneMmPkg and UefiCpuPkg Reviewer 
This is to update StandaloneMmPkg and UefiCpuPkg Reviewer.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-30 11:10:10 +00:00
Chao Li
ec6e59aefe OvmfPkg: Remove QemuFwCfgLibMmio.inf 
All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
1699845c5f OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf 
Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
3a4efc98b0 ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf 
Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
3d87214a20 OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf 
Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
fcce7f77e6 OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version 
Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
748d57d40f OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio 
Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
5e31c5666d OvmfPkg: Separate QemuFwCfgLibMmio.c into two files 
Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Some DXE stage variables became non-static in this patch, they will be
restored to static in the next patch.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Chao Li
e942b85a21 OvmfPkg: Add a GUID for QemuFwCfgLib 
Added a new GUID for QemuFwCfgLib MMIO version, called
gQemuFirmwareResourceHobGuid, which is used to save QEMU firmware
configure resource during PEI stage.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
 2024-04-30 11:10:10 +00:00
Jiaxin Wu
0c74aa2073 UefiCpuPkg/Library: Cleanup debug message in LmceSupport 
ProcessorNumber 0 is not always BSP. Debug message based on 0
of ProcessorNumber is incorrect.

This patch is to clean the debug message in LmceSupport
directly.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Zeng Star <star.zeng@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-30 07:15:46 +00:00
Wenxing Hou
88781ccd74 ReadMe.rst: Add libspdm submodule license 
This patch add libspdm submodule license.

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
54a4fd9b35 SecurityPkg: Add libspdm submodule 
libspdm is submodule to support DeviceSecurity feature.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
9bc2725198 .gitmodule: Add libspdm submodule for EDKII 
libspdm is submodule, which will be used in DeviceSecurity.

Cc: Andrew Fish <afish@apple.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
cf3b34c0b8 .pytool/CISettings.py: add libspdm submodule. 
Add DeviceSecurity submodule libspdm.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Joey Vagedes <joey.vagedes@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Joey Vagedes <joey.vagedes@gmail.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
750d763623 SecurityPkg: add DeviceSecurity support 
This patch implement the SpdmSecurityLib,
which is the core of DeviceSecurity.
And the SpdmSecurityLib include Device Authentication and Measurement.
The other library is to support SpdmSecurityLib.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
c3f615a1bd SecurityPkg: Add TCG PFP 1.06 support. 
Add new api Tpm2ExtendNvIndex.
It is uesd in HashCompleteAndExtend when PcrIndex > MAX_PCR_INDEX.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
d8e4c4b000 MdeModulePkg/Variable: Add TCG SPDM device measurement update 
Add EV_EFI_SPDM_DEVICE_POLICY support for MeasureVariable.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
74db2ed3e5 MdePkg: Add devAuthBoot GlobalVariable 
According to UEFI 2.10 spec 3.3 Globally Defined Variables section,
add devAuthBoot GlobalVariable.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
5f391c6606 MdePkg: Add TCG PFP 1.06 support. 
Add support for
TCG PC Client Platform Firmware Profile Specification 1.06.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>

Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Wenxing Hou
338fd26b8f MdePkg: Add SPDM1.2 support. 
Update Spdm.h to support 1.2 new features, such as:
Authentication and measurement. It wil be used in DeviceSecurity.
The DeviceSecurity feature is from
TCG PC Client Platform Firmware Profile Specification 1.06.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-30 02:21:13 +00:00
Foster Nong
094727264f MdePkg: Add Cxl30.h into IndustryStandard 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516

1) Add CXL 3.0 header file to comply with CXL 3.0 specification
2) CXL 3.0 header will embed Cxl20.h
3) Updated Cxl.h to point to 3.0 header file

Signed-off-by: Foster Nong <foster.nong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Chris Li <chrisli@os.amperecomputing.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-29 10:39:23 +00:00
Gua Guo
c0dfe3ec1f BaseTools/GetUtcDateTime.py: Python 3.12 support 
Ref to https://docs.python.org/3/whatsnew/3.12.html
utcnow() and utcfromtimestamp() are deprecated
Prevent use it cause build error.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-26 03:01:55 +00:00
Gerd Hoffmann
66c24219ad OvmfPkg/VirtHstiDxe: do not load driver in confidential guests 
The VirtHstiDxe does not work in confidential guests.  There also isn't
anything we can reasonably test, neither flash storage nor SMM mode will
be used in that case.  So just skip driver load when running in a
confidential guest.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Fixes: 506740982b ("OvmfPkg/VirtHstiDxe: add code flash check")
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Srikanth Aithal <sraithal@amd.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-25 00:55:20 +00:00
Michael Kubacki
90b6725562 Update to CodeQL 2.16.1 
Updates CodeQL to work with the latest queries. Includes functional
and security fixes within the CodeQL CLI binary.

For more information on release details see:

https://github.com/github/codeql-cli-binaries/releases

For changes between the previous version (2.14.5) and 2.16.1 see:

https://github.com/github/codeql-cli-binaries/compare/v2.14.5...v2.16.1

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Joey Vagedes <joey.vagedes@gmail.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Joey Vagedes <joey.vagedes@gmail.com>
 2024-04-24 23:11:19 +00:00
Gua Guo
d97f964f7c BaseTools/Fmmt.py: Python 3.12 support 
Ref to https://docs.python.org/3/whatsnew/3.12.html
A backslash-character pair that is not a valid
escape sequence now generates

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-23 21:36:22 +00:00
Adam Dunlap
e3fa6986ae OvmfPkg: Harden #VC instruction emulation somewhat (CVE-2024-25742) 
Ensure that when a #VC exception happens, the instruction at the
instruction pointer matches the instruction that is expected given the
error code. This is to mitigate the ahoi WeSee attack [1] that could
allow hypervisors to breach integrity and confidentiality of the
firmware by maliciously injecting interrupts. This change is a
translated version of a linux patch e3ef461af35a ("x86/sev: Harden #VC
instruction emulation somewhat")

[1] https://ahoi-attacks.github.io/wesee/

Cc: Borislav Petkov (AMD) <bp@alien8.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Adam Dunlap <acdunlap@google.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-04-23 17:29:55 +00:00
Gua Guo
86c8d69146 IntelFsp2Pkg/PatchFv.py: Python 3.12 support 
Ref to https://docs.python.org/3/whatsnew/3.12.html
A backslash-character pair that is not a valid
escape sequence now generates

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
 2024-04-22 22:57:07 +00:00
Gua Guo
680030a6ec IntelFsp2Pkg/GenCfgOpt.py: Python 3.12 support 
Ref to https://docs.python.org/3/whatsnew/3.12.html
A backslash-character pair that is not a valid
escape sequence now generates

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
 2024-04-22 22:57:07 +00:00
Ard Biesheuvel
7dd7b89058 ArmVirtPkg/ArmVirtQemu: always build XIP code with strict alignment 
The optimization that enabled entry with MMU and caches enabled at EL1
removed the strict alignment requirement for XIP code (roughly, any code
that might execute with the MMU and caches off, which means SEC and PEI
phase modules but also *all* BASE libraries), on the basis that QEMU can
only run guest payloads at EL2 in TCG emulation, which used to ignore
alignment violations, and execution at EL1 would always occur with the
MMU enabled.

This assumption no longer holds: not only does QEMU now enforce strict
alignment for memory accesses with device semantics, there are also
cases where this code might execute at EL2 under virtualization (i.e.,
under NV2 nested virtualization) where the strict alignment is required
too.

The latter case could be optimized too, by enabling VHE and pretending
execution is occurring at EL1, which would allow the existing logic for
entry with the MMU enabled to be reused. However, this would leave
non-VHE CPUs behind.

So in summary, strict alignment needs to be enforced for any code that
may execute with the MMU off, so drop the override that sets the XIP
flags to the empty string.

Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
 2024-04-22 13:05:21 +00:00
Gerd Hoffmann
f29160a896 OvmfPkg/VirtHstiDxe: add README.md 
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-04-22 13:05:21 +00:00
Gerd Hoffmann
506740982b OvmfPkg/VirtHstiDxe: add code flash check 
Detects qemu config issue: code pflash is writable.
Checked for both PC and Q35.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-04-22 13:05:21 +00:00
Gerd Hoffmann
ddc43e7a41 OvmfPkg/VirtHstiDxe: add varstore flash check 
Detects qemu config issue: vars pflash is not in secure mode (write
access restricted to smm).  Applies to Q35 with SMM only.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-04-22 13:05:21 +00:00
Konstantin Kostiuk
538b8944c1 OvmfPkg: Add VirtHstiDxe to OVMF firmware build 
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-04-22 13:05:21 +00:00
Konstantin Kostiuk
d0906f602b OvmfPkg: Add VirtHstiDxe driver 
The driver supports qemu machine types 'pc' and 'q35'.

This patch adds some helper functions to manage the bitmasks.
The implemented features depend on both OVMF build configuration
and qemu VM configuration.

For q35 a single security feature is supported and checked: In
SMM-enabled builds the driver will verify smram is properly locked.
That test should never fail.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Konstantin Kostiuk <kkostiuk@redhat.com>
Initial-patch-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-04-22 13:05:21 +00:00
Min M Xu
be92e09206 OvmfPkg/IntelTdx: Update TDVF README 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4756

There are below updates in this patch:
1. Rename README to README.md so that it can be show as markdown
   document.
2. Update some information about TDVF.
2. Fix some typo.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-22 02:53:53 +00:00
Abner Chang
6780b3aba0 Maintainers: AMD as SPI driver stack maintainer 
Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-04-20 08:26:40 +00:00
abnchang
1dc752d903 MdeModulePkg: Add SPI NOR FLash SFDP drivers to DSC 
BZ#: 4471
SPI NOR Flash JEDEC Serial Flash Discoverable Driver
implementation.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-20 08:26:40 +00:00
abnchang
8b02ecc5f0 MdeModulePkg/SpiNorFlashJedecSfdp: SPI NOR Flash JEDEC SFDP 
BZ#: 4471
SPI NOR Flash JEDEC Serial Flash Discoverable Driver
implementation.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-20 08:26:40 +00:00
Abner Chang
6dc09fda04 MdeModulePkg: Add definitions in DEC for SPI NOR Flash SFDP driver 
BZ#: 4473

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>
 2024-04-20 08:26:40 +00:00
abnchang
390b10b548 MdePkg/Include: Add SPI NOR Flash JEDEC SFDP header file 
BZ#: 4472
Add definition of JEDEC Serial Flash Discoverable Parameters
(SFDP) specification.
https://www.jedec.org/standards-documents/docs/jesd216b

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>
 2024-04-20 08:26:40 +00:00
abnchang
7dec566775 MdePkg/Include: Update definitions of SPI related header files 
BZ#: 4471
Update definitions according to PI spec 1.8 errata A

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Cc: Brit Chesley <brit.chesley@amd.com>
Reviewed-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-20 08:26:40 +00:00
Tom Lendacky
0afb874349 OvmfPkg/BaseMemEncryptLib: Check for presence of an SVSM when not at VMPL0 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Currently, an SEV-SNP guest will terminate if it is not running at VMPL0.
The requirement for running at VMPL0 is removed if an SVSM is present.

Update the current VMPL0 check to additionally check for the presence of
an SVSM is the guest is not running at VMPL0.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
47001ab989 Ovmfpkg/CcExitLib: Provide SVSM discovery support 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The SVSM specification documents an alternative method of discovery for
the SVSM using a reserved CPUID bit and a reserved MSR.

For the CPUID support, the #VC handler of an SEV-SNP guest should modify
the returned value in the EAX register for the 0x8000001f CPUID function
by setting bit 28 when an SVSM is present.

For the MSR support, new reserved MSR 0xc001f000 has been defined. A #VC
should be generated when accessing this MSR. The #VC handler is expected
to ignore writes to this MSR and return the physical calling area address
(CAA) on reads of this MSR.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
a010681f74 UefiCpuPkg/MpInitLib: AP creation support under an SVSM 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When running under an SVSM, the VMPL level of the APs that are started
must match the VMPL level provided by the SVSM. Additionally, each AP
must have a Calling Area for use with the SVSM protocol. Update the AP
creation to properly support running under an SVSM.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Acked-by: Ray Ni <ray.ni@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
28fecae8a3 OvmfPkg/AmdSvsmLib: Add support for the SVSM create/delete vCPU calls 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The RMPADJUST instruction is used to alter the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. When
an SVSM is present, use the SVSM_CORE_CREATE_VCPU and SVSM_CORE_DELTE_VCPU
calls to add or remove the VMSA attribute on a page instead of issuing
the RMPADJUST instruction directly.

Implement the AmdSvsmSnpVmsaRmpAdjust() API to perform the proper operation
to update the VMSA attribute.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
18fdffe825 OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Similar to the Page State Change optimization added previously, also take
into account the possiblity of using the SVSM for PVALIDATE instructions.
Conditionally adjust the maximum number of entries based on how many
entries the SVSM calling area can support.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
b505f11f39 OvmfPkg/AmdSvsmLib: Add support for the SVSM_CORE_PVALIDATE call 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The PVALIDATE instruction can only be performed at VMPL0. An SVSM will
be present when running at VMPL1 or higher.

When an SVSM is present, use the SVSM_CORE_PVALIDATE call to perform
memory validation instead of issuing the PVALIDATE instruction directly.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
5a67a2efa7 OvmfPkg: Create a calling area used to communicate with the SVSM 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

An SVSM requires a calling area page whose address (CAA) is used by the
SVSM to communicate and process the SVSM request.

Add a pre-defined page area to the OvmfPkg and AmdSev packages and define
corresponding PCDs used to communicate the location and size of the area.
Keep the AmdSev package in sync with the OvmfPkg and adjust the AmdSev
launch and hash area memory locations.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
f6bf37c171 OvmfPkg/BaseMemEncryptSevLib: Use AmdSvsmSnpPvalidate() to validate pages 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The PVALIDATE instruction is used to change the SNP validation of a page,
but that can only be done when running at VMPL0. To prepare for running at
a less priviledged VMPL, use the AmdSvsmLib library API to perform the
PVALIDATE. The AmdSvsmLib library will perform the proper operation on
behalf of the caller.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
ee89b59430 UefiCpuPkg/MpInitLib: Use AmdSvsmSnpVmsaRmpAdjust() to set/clear VMSA 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The RMPADJUST instruction is used to change the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. To
prepare for running at a less priviledged VMPL, use the AmdSvsmLib library
API to perform the RMPADJUST. The AmdSvsmLib library will perform the
proper operation on behalf of the caller.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Ray Ni <ray.ni@intel.com>
 2024-04-17 20:04:41 +00:00
Tom Lendacky
6ced1e91ef Ovmfpkg/AmdSvsmLib: Create AmdSvsmLib to handle SVSM related services 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Add initial support for the new AmdSvsmLib library to OvmfPkg. The initial
implementation fully implements the library interfaces.

The SVSM presence check, AmdSvsmIsSvsmPresent(), determines the presence
of an SVSM by checking if an SVSM has been advertised in the SEV-SNP
Secrets Page.

The VMPL API, AmdSvsmSnpGetVmpl(), returns the VMPL level at which OVMF is
currently running.

The CAA API, AmdSvsmSnpGetCaa(), returns the Calling Area Address when an
SVSM is present, 0 otherwise.

The PVALIDATE API, AmdSvsmSnpPvalidate(), copies the PVALIDATE logic from
the BaseMemEncryptSevLib library for the initial implementation. The
BaseMemEncryptSevLib library will be changed to use this new API so that
the decision as to whether the SVSM is needed to perform the operation
can be isolated to this library.

The VMSA API, AmdSvsmSnpVmsaRmpAdjust(), copies the RMPUPDATE logic from
the MpInitLib library for the initial implementation. The MpInitLib
library will be changed to use this new API so that the decision as to
whether the SVSM is needed to perform the operation can be isolated to
this library.

Cc: Anatol Belski <anbelski@linux.microsoft.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jianyong Wu <jianyong.wu@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
789727ccf3 Ovmfpkg: Prepare OvmfPkg to use the AmdSvsmLib library 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The MpInitLib library will be updated to use the new AmdSvsmLib library.
To prevent any build breakage, update the OvmfPkg DSCs file to include
the AmdSvsmLib NULL library.

Cc: Anatol Belski <anbelski@linux.microsoft.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Corvin Köhne <corvink@freebsd.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jianyong Wu <jianyong.wu@arm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
d2b18e6bc2 UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLib library 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The MpInitLib library will be updated to use the new AmdSvsmLib library.
To prevent any build breakage, update the UefiPayloadPkg DSC file to
include the AmdSvsmLib NULL library.

Cc: Gua Guo <gua.guo@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: James Lu <james.lu@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
30d274e354 UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an SVSM 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In order to support an SEV-SNP guest running under an SVSM at VMPL1 or
lower, a new library must be created.

This library includes an interface to detect if running under an SVSM, an
interface to return the current VMPL, an interface to perform memory
validation and an interface to set or clear the attribute that allows a
page to be used as a VMSA.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Ray Ni <ray.ni@intel.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
c0bf953fe8 MdePkg/BaseLib: Add a new VMGEXIT instruction invocation for SVSM 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The SVSM specification relies on a specific register calling convention to
hold the parameters that are associated with the SVSM request. The SVSM is
invoked by requesting the hypervisor to run the VMPL0 VMSA of the guest
using the GHCB MSR Protocol or a GHCB NAE event.

Create a new version of the VMGEXIT instruction that will adhere to this
calling convention and load the SVSM function arguments into the proper
register before invoking the VMGEXIT instruction. On return, perform the
atomic exchange on the SVSM call pending value as specified in the SVSM
specification.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
8ccbf075f0 MdePkg/Register/Amd: Define the SVSM related information 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The Secure VM Service Module specification defines the interfaces needed
to allow multi-VMPL level execution of an SEV-SNP guest.

Define the SVSM related structures for the SVSM Calling Area as well as
the SVSM CAA MSR. The SVSM CAA MSR is an MSR register that is reserved for
software use and will not be implemented in hardware.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
069f9911a3 OvmfPkg/BaseMemEncryptSevLib: Maximize Page State Change efficiency 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When building the Page State Change entries for a range of memory, it can
happen that multiple calls to BuildPageStateBuffer() need to be made. If
the size of the input work area passed to BuildPageStateBuffer() exceeds
the number of entries that can be passed to the hypervisor using the GHCB
shared buffer, the Page State Change VMGEXIT support will issue multiple
VMGEXITs to process all entries in the buffer.

However, it could be that the final VMGEXIT for each round of Page State
Changes is only for a small number of entries and subsequent VMGEXITs may
still be issued to handle the full range of memory requested. To maximize
the number of entries processed during the Page State Change VMGEXIT,
limit BuildPageStateBuffer() to not build entries that exceed the maximum
number of entries that can be handled in a single Page State Change
VMGEXIT.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
2b330b57db OvmfPkg/BaseMemEncryptSevLib: Re-organize page state change support 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In preparation for running under an SVSM at VMPL1 or higher (higher
numerically, lower privilege), re-organize the way a page state change
is performed in order to free up the GHCB for use by the SVSM support.

Currently, the page state change logic directly uses the GHCB shared
buffer to build the page state change structures. However, this will be
in conflict with the use of the GHCB should an SVSM call be required.

Instead, use a separate buffer (an area in the workarea during SEC and
an allocated page during PEI/DXE) to hold the page state change request
and only update the GHCB shared buffer as needed.

Since the information is copied to, and operated on, in the GHCB shared
buffer this has the added benefit of not requiring to save the start and
end entries for use when validating the memory during the page state
change sequence.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
f40c1f2a30 MdePkg: Avoid hardcoded value for number of Page State Change entries 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The SNP_PAGE_STATE_MAX_ENTRY is based on the number of entries that can
fit in the GHCB shared buffer. As a result, the SNP_PAGE_STATE_CHANGE_INFO
structure maps the full GHCB shared buffer based on the shared buffer size
being 2032 bytes.

Instead of using a hardcoded value for SNP_PAGE_STATE_MAX_ENTRY, use a
build calculated value. Since the SNP_PAGE_STATE_CHANGE_INFO is used as a
mapping, eliminate the hardcoded array size so that the structure can be
used based on any size buffer.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
5fe9db0f82 OvmfPkg/BaseMemEncryptSevLib: Calculate memory size for Page State Change 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Calculate the amount of memory that can be use to build the Page State
Change data (SNP_PAGE_STATE_CHANGE_INFO) instead of using a hard-coded
size. This allows for changes to the GHCB shared buffer size without
having to make changes to the page state change code.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
6b14ef6b28 OvmfPkg/BaseMemEncryptSevLib: Fix uncrustify errors 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In prep for follow-on patches, fix an area of the code that does not meet
the uncrustify coding standards.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
4bd3b5ab13 OvmfPkg/PlatformPei: Retrieve APIC IDs from the hypervisor 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

If the hypervisor supports retrieval of the vCPU APIC IDs, retrieve
them before any APs are actually started. The APIC IDs can be used
to start the APs for any SEV-SNP guest, but is a requirement for an
SEV-SNP guest that is running under an SVSM.

After retrieving the APIC IDs, save the address of the APIC ID data
structure in a GUIDed HOB.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
5bdb091133 UefiCpuPkg/MpInitLib: Always use AP Create if GhcbApicIds HOB is present 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Currently, the first time an AP is started for an SEV-SNP guest, it relies
on the VMSA as set by the hypervisor. If the list of APIC IDs has been
retrieved, this is not necessary. The list of APIC IDs will be identified
by a GUIDed HOB. If the GUIDed HOB is present, use the SEV-SNP AP Create
protocol to start the AP for the first time and each time thereafter.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Ray Ni <ray.ni@intel.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
8a6471819b MdePkg: GHCB APIC ID retrieval support definitions 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

When an SVSM is present, starting the APs requires knowledge of the APIC
IDs. Create the definitions required to retrieve and hold the APIC ID
information of all the vCPUs present in the guest.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Tom Lendacky
c212fec9cf OvmfPkg/BaseMemEncryptLib: Fix error check from AsmRmpAdjust() 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The AsmRmpAdjust() function returns a UINT32, however in SevSnpIsVmpl0()
the return value is checked with EFI_ERROR() when it should just be
compared to 0. Fix the error check.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
 2024-04-17 18:30:03 +00:00
Min M Xu
61185f1d50 SecurityPkg: Delete TdTcg2Dxe and HashLibTdx in SecurityPkg 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4752

TdTcg2Dxe and HashLibTdx have been moved to OvmfPkg. So delete the codes
in SecurityPkg and update SecurityPkg.dsc.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-17 03:04:13 +00:00
Min M Xu
93fac4fd7b OvmfPkg: Update TdTcg2Dxe path in OvmfPkgX64 and IntelTdxX64.dsc 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4752

Previously the TdTcg2Dxe and its corresponding HashLibTdx were in
SecurityPkg. This patch updates the paths in OvmfPkgX64.dsc and
IntelTdxX64.dsc after TdTcg2Dxe and HashLibTdxLib have been moved to
OvmfPkg.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-17 03:04:13 +00:00
Min M Xu
c98fbda328 OvmfPkg/TdTcg2Dxe: Add TdTcg2Dxe 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4752

This library is the one of SecurityPkg/Tcg/TdTcg2Dxe. It is
designed for Intel TDX enlightened OVMF. So moving it from SecurityPkg
to OvmfPkg. To prevent breaking the build, the moving is splitted into 2
patch. SecurityPkg/Tcg/TdTcg2Dxe will be deleted in the next patch.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-17 03:04:13 +00:00
Min M Xu
93ff80a218 OmvfPkg/HashLibTdx: Add HashLibTdx 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4752

This library is the one of SecurityPkg/Library/HashLibTdx. It is
designed for Intel TDX enlightened OVMF. So moving it from SecurityPkg
to OvmfPkg. To prevent breaking the build, the moving is splitted into 2
patch. SecurityPkg/Library/HashLibTdx will be deleted in the next patch.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-17 03:04:13 +00:00
Min M Xu
71aaf7a308 Security/SecTpmMeasurementLibTdx: Delete unused SecTpmMeasurementLibTdx 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4752

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-17 03:04:13 +00:00
Liqi Liu
fcfdbe2987 NetworkPkg/WifiConnectionManagerDxe: Update UI according to UEFI spec 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4736

In UEFI_Spec_2_10_Aug29.pdf page 1694 section 35.5.4 for
EFI_BROWSER_ACTION_FORM_OPEN:
NOTE: EFI_FORM_BROWSER2_PROTOCOL.BrowserCallback() cannot be used with
this browser action because question values have not been retrieved yet.

So should not call HiiGetBrowserData() and HiiSetBrowserData() in FORM_OPEN
call back function.

Now use wifi list key and enroll cert key instead of the connect action key,
move wifi info display from open action to close action.

Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Zachary Clark-williams <zachary.clark-williams@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Felix Polyudov <Felixp@ami.com>
Signed-off-by: Liqi Liu <liqi.liu@intel.com>
Reviewed-by: Zachary Clark-williams <zachary.clark-williams@intel.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-04-16 14:27:51 +00:00
CindyX Kuo
b6cd5ddce9 SecurityPkg/OpalPasswordDxe: Force reparsing IFR binary when RETRIEVE 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4735

When change callback action from FORM_OPEN to RETRIEVE, it is observed
that NVNE disks will not be displayed when the user enters the formset
at the first time. Revisit the formset can see the update.

1. Add HiiUpdateForm() to force reparsing the IFR binary when RETRIEVE.
2. Create dummy label with suppressif statement in VFR for form update
usage.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Ming Tan <ming.tan@intel.com>
Cc: Arthur Chen <arthur.g.chen@intel.com>
Cc: Xiao X Chen <xiao.x.chen@intel.com>
Cc: Tina Chen <tina.chen@intel.com>

Signed-off-by: CindyX Kuo <cindyx.kuo@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Tina Chen <tina.chen@intel.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-16 09:20:58 +00:00
Cindy Kuo
32e2968a1e SecurityPkg/OpalPasswordDxe: Change callback action to meet UEFI spec 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4735

Should not call HiiGetBrowserData() and HiiSetBrowserData() in
ACTION_FORM_OPEN callback function.
Those APIs are called within OpalHiiSetBrowserData/OpalHiiGetBrowserData
which have been used by OpalHii.c.

Change callback action from FORM_OPEN to RETRIEVE to meet UEFI spec.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Ming Tan <ming.tan@intel.com>
Cc: Arthur Chen <arthur.g.chen@intel.com>
Cc: Xiao X Chen <xiao.x.chen@intel.com>
Cc: Tina Chen <tina.chen@intel.com>

Signed-off-by: CindyX Kuo <cindyx.kuo@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Tina Chen <tina.chen@intel.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-16 09:20:58 +00:00
Jason Lou
7ea05d8fe9 ShellPkg/SmbiosView: Support New ProcessorUpgrade for SMBIOS Type4 
The patch updates SmbiosView to support new ProcessorUpgrade for SMBIOS
Type4 based on SMBIOS 3.8.0.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
 2024-04-16 08:25:44 +00:00
Jason Lou
bfcf2d66c7 MdePkg/SmBios.h: Add New ProcessorUpgrade definitions for SMBIOS Type4 
The patch adds new ProcessorUpgrade definitions for SMBIOS Type4 based
on SMBIOS 3.8.0.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Benny Lin <benny.lin@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-16 08:25:44 +00:00
Chao Li
6363872629 UefiCpuPkg/UefiCpuPkg.dsc: Add CpuMmio2Dxe.inf to LoongArch64 field 
LoongArch64 requires CpuMmio2Dxe, add it into LoongArch64 field.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
0b2f97c00a UefiCpuPkg: Add CpuDxe driver for LoongArch64 
Added LoongArch64 CPU driver into CpuDxe.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn>
Co-authored-by: Dongyan Qian <qiandongyan@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
abaf405ed9 UefiCpuPkg: Add multiprocessor library for LoongArch64 
Added LoongArch multiprocessor initialization instance into MpInitLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
392a368533 UefiCpuPkg: Add a new GUID to store the processors resource 
On a multi-processor system, if the BSP dose not know how many APs are
online or cannot wake up the AP via broadcast, it can collect AP
resouces before wakeing up the AP and add a new HOB to save the
processor resouces.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
032830e968 UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg 
Add a new base library named CpuMmuLib and add a LoongArch64 instance
with in the library.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn>
Co-authored-by: Dongyan Qian <qiandongyan@loongson.cn>
Co-authored-by: Xianglai Li <lixianglai@loongson.cn>
Co-authored-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
c5fb47ddab UefiCpuPkg: Added a new PCD named PcdLoongArchExceptionVectorBaseAddress 
Added PcdLoongArchExceptionVectorBaseAddress use for storing the CPU
exception vector base address. This PCD can be populated at build time
or changed at runtime, and is used only by LoongArch.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
78e5019071 UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg 
Add a new header file CpuMmuLib.h, whitch is referenced from
ArmPkg/Include/Library/ArmMmuLib.h. Currently, only support for
LoongArch64 is added, and more architectures can be accommodated in the
future.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
7750468c37 UefiCpuPkg: Add CPU exception library for LoongArch 
Added LoongArch exception handler into CpuExceptionHandlerLib.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
439030bc37 UefiCpuPkg: Add LoongArch64 CPU Timer instance 
Add the LoongArch64 CPU Timer instance to CpuTimerLib, using CPUCFG 0x4
and 0x5 for Stable Counter frequency.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4734

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
cc63e04afc UefiCpuPkg/CpuDxe: Reorder the INF file alphabetically 
Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
022ddb8f84 UefiCpuPkg/MpInitLib: Reorder the INF files alphabetically 
Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
fecca982e3 UefiCpuPkg/CpuExceptionHandlerLib: Reorder the INF files alphabetically 
Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Chao Li
18ad6485a9 UefiCpuPkg/CpuTimerLib: Reorder the INF file alphabetically 
Some of the order is not in alphabetical, reorder.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4726

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-04-16 06:00:32 +00:00
Zhiguang Liu
70892b13b2 StandaloneMmPkg: Support to unregister MMI handler in MMI handlers 
This patch fix a use-after-free issue where unregistering an
MMI handler could lead to the deletion of the MMI_HANDLER while it is
still in use by MmiManage(). The fix involves modifying
MmiHandlerUnRegister() to detect whether it is being called from
within the MmiManage() stack. If so, the removal of the MMI_HANDLER
is deferred until MmiManage() has finished executing.
Additionally, due to the possibility of recursive MmiManage() calls,
the unregistration and subsequent removal of the MMI_HANDLER are
ensured to occur only after the outermost MmiManage() invocation has
completed.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-16 04:41:27 +00:00
Zhiguang Liu
74f6ce6734 MdeModulePkg/SMM: Support to unregister SMI handler in SMI handlers 
This patch fix a use-after-free issue where unregistering an
SMI handler could lead to the deletion of the SMI_HANDLER while it is
still in use by SmiManage(). The fix involves modifying
SmiHandlerUnRegister() to detect whether it is being called from
within the SmiManage() stack. If so, the removal of the SMI_HANDLER
is deferred until SmiManage() has finished executing.
Additionally, due to the possibility of recursive SmiManage() calls,
the unregistration and subsequent removal of the SMI_HANDLER are
ensured to occur only after the outermost SmiManage() invocation has
completed.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-16 04:41:27 +00:00
Zhiguang Liu
da7858117f Revert ae1079b386 
This reverts "MdeModulePkg/SMM: Support to unregister
SMI handler inside SMI handler" for better design later.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-16 04:41:27 +00:00
Zhiguang Liu
b594fba4ec Revert 17b2872200 
This reverts commit "MdeModulePkg/SMM: Disallow unregister
 SMI handler in other SMI handler" for better design later.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-16 04:41:27 +00:00
Zhiguang Liu
de95e919be Revert 049ff6c39c 
This reverts commit "StandaloneMmPkg: Support to unregister
MMI handler inside MMI handler" for better design later.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-16 04:41:27 +00:00
Zhiguang Liu
31cd5ee8c0 Revert 2ec8f0c640 
This reverts commit "StandaloneMmPkg: Disallow unregister MMI
handler in other MMI handler" for better design later.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-16 04:41:27 +00:00
Taylor Beebe
5ba3602e45 BaseTools: Use Stronger Matching for NULL Linked Libraries 
To prevent the possibility that a library with a name like
NULLTestLib is interpreted as a NULL linked library, use
more explicit pattern matching to ensure that the library
name follows the pattern NULL%d.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Signed-off-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-15 19:04:08 +00:00
Taylor Beebe
d77efa2ebe BaseTools: Don't Recurse NULL Includes Not Linked to Module 
When collecting the required library instances for modules and
libraries, included libraries will be recursed to ensure the module is
built with all the libraries directly linked to it and indirectly
linked to it via included libraries.

Using the following scenario as an example:

[LibraryClasses.common.DXE_CORE]
NULL|Path/To/Library1.inf // Includes DebugLib

[LibraryClasses.common.DXE_DRIVER]
NULL|Path/To/Library2.inf // Includes DebugLib

[LibraryClasses.common.DXE_CORE, LibraryClasses.common.DXE_DRIVER]
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

[Components]
MdeModulePkg/Core/Dxe/DxeMain.inf // Includes DebugLib

The DXE_CORE NULL library will be assigned a fake library class like
NULL1 and the DXE_DRIVER will be assigned NULL2. The recursion logic
will see NULL1 as a directly linked and will add an instance of it to
the list of libraries which need to be included in the module. When
DebugLib is evaluated, the recursion logic will add the libraries
DebugLib depends on to the queue which includes both NULL1 and NULL2.
When NULL2 is unqueued, an instance of it will also be added to the
list of libraries needed to build DxeMain which now means that both
NULL1 and NULL2 have been linked.

NULL includes outside of module overrides are not supported according
to the spec, but we do it anyways so this seems like a case which
should be fixed. This change updates the recursion logic to skip
evaluating NULL libraries unless they are linked directly to the
module/library being evaluated.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>

Signed-off-by: Taylor Beebe <taylor.d.beebe@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-15 19:04:08 +00:00
Wei6 Xu
0707d9296d SecurityPkg/Tcg2Config: Hide BIOS unsupported hash algorithm from UI 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4731

TCG2 configuration UI shows all the hash algorithms that TPM hardware
supports in the checkbox. If user only selects one algorithm that is
supported by TPM hardware but not supported by BIOS and uncheck the
others, the SyncPcrAllocationsAndPcrMask in Tcg2Pei will not be able
to decide a viable PCR to activate, then an assert occurs.

Add check against PcdTcg2HashAlgorithmBitmap when deciding whether
to suppress the hash algorithm checkbox to avoid user to select the
hash algorithm which may cause an assert.

Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Rahul Kumar <rahul1.kumar@intel.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-15 15:18:50 +00:00
Qingyu
e25808f501 MdePkg: Update the comments of GetInformation function 
Refer to Uefi spec 2.10 section 11.11.2, add a new retval
EFI_NOT_FOUND to EFI_ADAPTER_INFORMATION_PROTOCOL.GetInformation().
Reference: [mantis #1866] - GetInfo() of Adapter Information
Protocol should have a provision for IHV to return no data.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Qingyu <qingyu.shang@intel.com>
Signed-off-by: Gahan Saraiya <gahan.saraiya@intel.com>
 2024-04-15 21:30:48 +08:00
Dhaval
98f150a954 MdeModulePkg/AcpiTableDxe: Prefer xDSDT over DSDT when installing tables 
As per ACPI Spec 6.5+ Table 5-9 if xDSDT is available,
it should be used first. Handle required flow when xDSDT
is absent or present.

Test: Tested on RISCV64 Qemu platform with xDSDT and booted to
linux kernel.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
Acked-by: Chasel Chiu <chasel.chiu@...>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-11 16:04:45 +08:00
HoraceX Lien
963671d380 ShellPkg: Update smbiosview type 4 with SMBIOS 3.6 fields 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4737

update smbiosview type 4 related fileds.

Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
 2024-04-10 02:01:37 +00:00
Duggapu Chinni B
665789b61b IntelFsp2WrapperPkg: Fsp T UPD Structure Bug Fix 
Add reserved bytes as per the latest spec.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2024-04-09 17:15:10 +00:00
Duggapu Chinni B
013006e4ef IntelFsp2WrapperPkg: Fsp T new ARCH UPD Support 
Changes in SecRamInitData to support spec changes

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2024-04-09 17:15:10 +00:00
Duggapu Chinni B
543add1d41 IntelFsp2Pkg: Fsp T new ARCH UPD Support 
Changes to support spec changes

1. Remove usage of Pcd.
2. Change code to validate the Temporary Ram size input.
3. Consume the input saved in YMM Register

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chiu Chasel <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Ni Ray <ray.ni@intel.com>

Signed-off-by: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Reviewed-by: Chiu Chasel <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
 2024-04-09 17:15:10 +00:00
Aaron Li
932db9df0c MdeModulePkg/AcpiTableDxe: PCD switch to avoid using ACPI reclaim memory 
UEFI spec defined ACPI Tables at boot time can be contained in memory of
type EfiACPIReclaimMemory or EfiAcpiMemoryNVS, although InstallAcpiTable
with AcpiTableProtocol will only allocate memory with type
EfiACPIReclaimMemory (Except FACS).

This patch provides an optional method controlled by PCD to avoid using
EfiACPIReclaimMemory, by setting the PCD PcdNoACPIReclaimMemory to TRUE,
all ACPI allocated memory will use EfiAcpiMemoryNVS instead.

Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Liu Yun <yun.y.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Aaron Li <aaron.li@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-04-09 07:03:08 +00:00
Tuan Phan
b7f8779fe1 OvmfPkg/RiscVVirt: Disable Svpbmt extension 
Disable Svpbmt extension as QEMU not enables it in default config.

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
 2024-04-08 05:43:59 +00:00
Tuan Phan
3d5352d934 UefiCpuPkg: RISC-V: MMU: Support Svpbmt extension 
The GCD EFI_MEMORY_UC and EFI_MEMORY_WC memory attributes will be
supported when Svpbmt extension available.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
 2024-04-08 05:43:59 +00:00
Tuan Phan
6ddfbeb0d6 UefiCpuPkg: RISC-V: MMU: Explictly use UINT64 instead of UINTN 
While UINTN defined for RISC-V 64 bits is UINT64, explictly using UINT64
for those variables that clearly are UINT64.

Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
 2024-04-08 05:43:59 +00:00
Tuan Phan
f1203a4099 MdePkg.dec: RISC-V: Define override bit for Svpbmt extension 
Define the BIT 2 as the override bit for Svpbmt extension. This will
be used by RISC-V MMU library to support EFI_MEMORY_UC and
EFI_MEMORY_WC.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
 2024-04-08 05:43:59 +00:00
Chris Ruffin
c98c14576f CryptoPkg/BaseCryptLibUnitTest: add unit test functions 
Add unit test functions:
TestVerifyPkcs1v2EncryptInterface()
TestVerifyRsaOaepEncryptInterface()
TestVerifyEncrypt()
TestVerifyDecrypt()
TestVerifyEncryptDecrypt()

Signed-off-by: Chris Ruffin <v-chruffin@microsoft.com>
Cc: Chris Ruffin <cruffin@millcore.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Wenxing Hou <wenxing.hou@intel.com>

Reviewed-by: Yi Li <yi1.li@intel.com>
 2024-04-07 03:55:04 +00:00
Chris Ruffin
503344cdbd CryptoPkg/Driver: add additional RSAES-OAEP crypto functions 
Add new functions to CryptoPkg/Driver.

Signed-off-by: Chris Ruffin <v-chruffin@microsoft.com>
Cc: Chris Ruffin <cruffin@millcore.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Wenxing Hou <wenxing.hou@intel.com>

Reviewed-by: Yi Li <yi1.li@intel.com>
 2024-04-07 03:55:04 +00:00
Chris Ruffin
89ff5da9f9 CryptoPkg/BaseCryptLib: add additional RSAES-OAEP crypto functions 
Expand the availability of the RSAES-OAEP crypto capability in
BaseCryptLib.  Applications using RSA crypto functions directly from
OpensslLib can transition to BaseCryptLib to take advantage of the
shared crypto feature in CryptoDxe.

Pkcs1v2Decrypt(): decryption using DER-encoded private key
RsaOaepEncrypt(): encryption using RSA contexts
RsaOaepDecrypt(): decryption using RSA contexts

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=4732
Gihub PR: https://github.com/tianocore/edk2/pull/5473

Signed-off-by: Chris Ruffin <v-chruffin@microsoft.com>
Cc: Chris Ruffin <cruffin@millcore.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Cc: Wenxing Hou <wenxing.hou@intel.com>

Reviewed-by: Yi Li <yi1.li@intel.com>
 2024-04-07 03:55:04 +00:00
Ming Tan
ee28bea4c0 SecurityPkg/SecureBootConfigDxe: Update UI according to UEFI spec 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4713

In UEFI_Spec_2_10_Aug29.pdf page 1694 section 35.5.4 for
EFI_BROWSER_ACTION_FORM_OPEN:
NOTE: EFI_FORM_BROWSER2_PROTOCOL.BrowserCallback() cannot be used with
this browser action because question values have not been retrieved yet.

So should not call HiiGetBrowserData() and HiiSetBrowserData() in FORM_OPEN
call back function.

Now call SecureBootExtractConfigFromVariable() and update
IfrNvData->ListCount to save the change to EFI variable, then HII use EFI
variable to control the UI.

Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Felix Polyudov <Felixp@ami.com>
Signed-off-by: Ming Tan <ming.tan@intel.com>
Reviewed-by: Felix Polyudov <Felixp@ami.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Acked-by: Jiewen Yao <jiewen.yao@intel.com>
 2024-04-07 02:48:24 +00:00
Pierre Gondois
8707f835ae ArmPkg: Remove ArmCortexA9.h 
The last reference to ArmCortexA9.h in the edk2 repository
was removed in:
a913ad0247 ("ArmPlatformPkg: remove ArmVExpressPkg")

The last reference to the file in the edk2-platforms
repository was agreed to be dropped:
https://edk2.groups.io/g/devel/message/115378

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
 2024-04-05 05:03:15 +00:00
Pierre Gondois
ee249efe8c ArmPkg: Remove ArmCortexA5x.h 
The last reference to ArmCortexA5x.h was removed in:
commit: cffa7925a2 ("ArmPkg: remove ArmCpuLib header
and implementations")
There are no reference to the file in the edk2-platforms
repository. Remove the file.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
 2024-04-05 05:03:15 +00:00
Nickle Wang
6fb3cc05dc RedfishPkg/RedfishPlatformConfigDxe: support menu path report 
"MenuPath" is the attribute in BIOS attribute registry. To support
reporting this attribute, we need to include the formset without
x-uefi-redfish support in database. So driver can find menu path to
target attribute in BIOS menu.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-04-04 14:24:31 +00:00
Abner Chang
79d4d8a81c EmulatorPkg/Redfish: Use edk2 Redfish debug PCDs 
Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
 2024-04-04 14:24:31 +00:00
Abner Chang
2e4e41d012 RedfishPkg/RedfishPlatformConfigDxe: HII string is deleted unexpectedly 
Add the condition check when delete HII string.
Only when the HiiStatement operand equal to "EFI_IFR_STRING_OP"
and the statement value type = EFI_IFR_TYPE_STRING.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Co-authored-by: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-04-04 14:24:31 +00:00
Abner Chang
c8f56800fd RedfishPkg/RedfishPlatformConfigDxe:Add RefishDebugLib support 
Add RedfishPlatformConfigDxe debug capability that aligns
with edk2 Redfish debug mechanism.

- PcdRedfishPlatformConfigDebugProperty, add PCD to control
  RedfishPlatformConfigDxe subordinate of Redfish debug
  capabilities.
- PcdRedfishPlatformConfigFeatureProperty, add PCD to
  manage RedfishPlatformConfigDxe features.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Co-authored-by: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-04-04 14:24:31 +00:00
Abner Chang
b0be42516e RedfishPkg/RedfishDebugLib: Introduce Redfish DEBUG macro 
Introduce DEBUG_REDFISH macro for the debug message
of edk2 Redfish components.
DEBUG_REDFISH can be used in any edk2 Redfish component
with Redfish DebugCatagory as the first parameter.
Whether the debug message is output or not depends on
the platform setting of PcdRedfishDebugCatagory.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-04-04 14:24:31 +00:00
abnchang
29114fc574 RedfishPkg/RedfishPlatformConfigDxe: Config language searching optimization 
Build up the x-uefi-redfish string database for the Redfish confg
language searching, instead of using HII String protocol.
This can improve the time consumption lot on searching strings.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Co-authored-by: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-04-04 14:24:31 +00:00
Qingyu
b387114113 EmulatorPkg: Update the comments of ReadKeyStroke and ReadKeyStrokeEx 
Refer to Uefi spec 2.10 section 12.3.3, Add a new retval
EFI_UNSUPPORTED to EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.ReadKeyStrokeEx
and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.ReadKeyStroke().

Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Qingyu <qingyu.shang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-03 10:25:06 +08:00
Qingyu
7cc2010f46 EmbeddedPkg: Update the comments of ReadKeyStroke and ReadKeyStrokeEx 
Refer to Uefi spec 2.10 section 12.3.3, Add a new retval
EFI_UNSUPPORTED to EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.ReadKeyStrokeEx
and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.ReadKeyStroke().

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Qingyu <qingyu.shang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-03 10:25:06 +08:00
Qingyu
b79a64d26e ShellPkg: Update the comments of ReadKeyStroke and ReadKeyStrokeEx 
Refer to Uefi spec 2.10 section 12.3.3, Add a new retval
EFI_UNSUPPORTED to EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.ReadKeyStrokeEx
and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.ReadKeyStroke().

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Qingyu <qingyu.shang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
 2024-04-03 10:25:06 +08:00
Qingyu
e043e3e3bf MdeModulePkg: Update the comments of ReadKeyStroke and ReadKeyStrokeEx 
Refer to Uefi spec 2.10 section 12.3.3, Add a new retval
EFI_UNSUPPORTED to EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.ReadKeyStrokeEx
and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.ReadKeyStroke().

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Qingyu <qingyu.shang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-04-03 10:25:06 +08:00
Hou, Wenxing
8f698f0a64 CryptoPkg: Remove interdependence for RsaPssVerify 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4742

Remove interdependence for RsaPssVerify, only use original
mbedtls API.
Because APIs such as Sha512Init may be closed by the platform PCD.
And this patch optimize the hash flow.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
 2024-04-01 02:48:15 +00:00
Hou, Wenxing
d402de2222 CryptoPkg: Update Md5/Sha1/Sha2 by using new mbedtls api 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4741

Update Md5/Sha1/Sha2 by using mbedtls 3.0 api in BaseCryptLibMbedTls,
because the old API may be deprecated when open some MACRO.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
 2024-04-01 02:48:15 +00:00
Hou, Wenxing
278250045b CryptoPkg: Update OPTIONAL location for BaseCryptLibMbedTls 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4740

There is a wrong usage for OPTIONAL.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Yi Li <yi1.li@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Yi Li <yi1.li@intel.com>
 2024-04-01 02:48:15 +00:00
Oliver Smith-Denny
37f63deeef MdeModulePkg: MemoryProtection: Use ImageRecordPropertiesLib 
The functionality to create and delete Image Records has been
consolidated in a library and ensured that MemoryProtection.c's
usage is encapsulated there.

This patch moves MemoryProtection.c to reuse the code in the lib
and to prevent issues in the future where code is updated in one
place but not the other.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Taylor Beebe <taylor.d.beebe@gmail.com>

Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
 2024-03-29 23:56:16 +00:00
Oliver Smith-Denny
596f856c13 MdeModulePkg: ImagePropertiesRecordLib: Consolidate Usage 
Currently, there are multiple instances of code create image
records. ImagePropertiesRecordLib was created to only have
this code in one place. Update the lib to use additional
logic from the copy in MemoryProtection.c before converging
that code to use the lib.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Taylor Beebe <taylor.d.beebe@gmail.com>

Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
 2024-03-29 23:56:16 +00:00
Oliver Smith-Denny
1fb6462c67 MdeModulePkg: ImagePropertiesRecordLib: Use SectionAlignment for CodeSize 
When an ImageRecord is stored by ImagePropertiesRecordLib, it reports the
CodeSegmentSize as the SizeOfRawData from the image. However, the image
as loaded into memory is aligned to the SectionAlignment, so
SizeOfRawData is under the actual size in memory. This is important,
because the memory attributes table uses these image records to create
its entries and it will report that the alignment of an image is
incorrect, even though the actual image is correct.

This was discovered on ARM64, which has a 64k runtime page granularity
alignment, which is backed by a 64k section alignment for
DXE_RUNTIME_DRIVERs. The runtime code and data was correctly being
loaded into memory, however the memory attribute table was incorrectly
reporting misaligned ranges to the OS, causing attributes to be
ignored for these sections for OSes using greater than 4k pages.

This patch correctly aligns the CodeSegmentSize to the SectionAlignment
and the corresponding memory attribute table entries are now correctly
aligned and pointing to the right places in memory.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Taylor Beebe <taylor.d.beebe@gmail.com>

Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Marvin H?user <mhaeuser@posteo.de>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
 2024-03-29 23:56:16 +00:00
Wenxing Hou
7fde22823d MdePkg: Add gEfiDeviceSignatureDatabaseGuid to dec 
According to UEFI 2.10 spec
32.8.2 UEFI Device Signature Variable GUID and Variable Name section,
add gEfiDeviceSignatureDatabaseGuid to dec.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-29 03:04:09 +00:00
Wenxing Hou
e4e1f6229c MdePkg: Add UEFI 2.10 DeviceAuthentication 
According to UEFI 2.10 spec
32.8.2 UEFI Device Signature Variable GUID and Variable Name section,
add signature database for device authentication.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Wenxing Hou <wenxing.hou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-29 03:04:09 +00:00
Abdul Lateef Attar
cf58f47623 ShellPkg/Acpiview: Adds ACPI WSMT Table parse 
Adds WSMT parse to the UefiShellAcpiViewCommandLib library.

Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Pierre Gondois  <pierre.gondois@arm.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
 2024-03-25 07:52:04 +00:00
Abdul Lateef Attar
4b9312de05 ShellPkg/Acpiview: Adds HPET parser 
Adds HPET parse to the UefiShellAcpiViewCommandLib library.

Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Pierre Gondois  <pierre.gondois@arm.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Pierre Gondois  <pierre.gondois@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
 2024-03-25 07:52:04 +00:00
Dat Mach
7f1ffba5de MdeModulePkg/Xhci: Skip another size round up for TRB address 
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560

Commit f36e1ec1f0 had fixed the DXE_ASSERT
caused by the TRB size round up from 16 to 64 for most cases.

However, there is a remaining case that the TRB size is also rounded up
during setting TR dequeue pointer that would trigger DXE_ASSERT.

This patch sets the alignment flag to FALSE in XhcSetTrDequeuePointer to
fix this issue as well.

Cc: Gao Cheng <gao.cheng@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Dat Mach <dmach@nvidia.com>
Reviewed-by: Gao Cheng <gao.cheng@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-22 12:47:04 +08:00
Ceping Sun
35f6a2780e OvmfPkg/TdxDxe: Clear the registers before tdcall 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4696

Refer to the [GHCI] spec, TDVF should clear the BIT5 for RBP in the mask.
And TDVF should clear the regitsers to avoid leaking secrets to VMM.

Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.5
https://cdrdv2.intel.com/v1/dl/getContent/726792

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Isaku Yamahata <isaku.yamahata@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Min Xu <min.m.xu@intel.com>
 2024-03-19 09:42:06 +00:00
Ceping Sun
a1a6da80aa OvmfPkg/CcExitLib: Update TDVMCALL_EXPOSE_REGS_MASK 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4696

Refer to the [GHCI] spec, TDVF should clear the BIT5 for RBP in the mask.

Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.5
https://cdrdv2.intel.com/v1/dl/getContent/726792

Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Isaku Yamahata <isaku.yamahata@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Min Xu <min.m.xu@intel.com>
 2024-03-19 09:42:06 +00:00
Ceping Sun
07c49d5d40 MdePkg/BaseLib: Update TDVMCALL_EXPOSE_REGS_MASK 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4696

Refer to the [GHCI] spec, TDVF should clear the BIT5 for RBP in the mask.

Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.5
https://cdrdv2.intel.com/v1/dl/getContent/726792

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Isaku Yamahata <isaku.yamahata@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-19 09:42:06 +00:00
Du Lin
3840c35e34 IntelFsp2WrapperPkg: Error handling of FspmWrapperInit() 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4701

The error handling of FspmWrapperInit() is limited to ASSERT
statements only, which only works in debug builds, but not in
release builds.
Fix the issue by enhancing the error handling of FspmWrapperInit()
to cover both debug builds and release builds.

Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Chen Gang C <gang.c.chen@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Signed-off-by: Du Lin <du.lin@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Chen Gang C <gang.c.chen@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-03-15 10:20:24 +00:00
Du Lin
ccbbc2a5c8 IntelFsp2WrapperPkg: Error handling of TpmMeasureAndLogDataWithFlags() 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4700

TpmMeasureAndLogDataWithFlags() computes the measure the code and
log it into PCR 0. TpmMeasureAndLogData() computes the hash for the
configuration. The same "Status" variable is used to store the return
values for both of the functions. There is no error handling if
TpmMeasureAndLogDataWithFlags() returns an error Status.
Fix the issue by adding error handling for TpmMeasureAndLogDataWithFlags().

Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Chen Gang C <gang.c.chen@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Signed-off-by: Du Lin <du.lin@intel.com>
Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Chen Gang C <gang.c.chen@intel.com>
 2024-03-15 09:05:25 +00:00
Oliver Smith-Denny
e7486b5064 MdeModulePkg: DxeCore: Do Not Apply Guards to Unsupported Types 
Currently, there are multiple issues when page or pool guards are
allocated for runtime memory regions that are aligned to
non-EFI_PAGE_SIZE alignments. Multiple other issues have been fixed for
these same systems (notably ARM64 which has a 64k runtime page
allocation granularity) recently. The heap guard system is only built to
support 4k guard pages and 4k alignment.

Today, the address returned to a caller of AllocatePages will not be
aligned correctly to the runtime page allocation granularity, because
the heap guard system does not take non-4k alignment requirements into
consideration.

However, even with this bug fixed, the Memory Allocation Table cannot be
produced and an OS with a larger than 4k page granularity will not have
aligned memory regions because the guard pages are reported as part of
the same memory allocation. So what would have been, on an ARM64 system,
a 64k runtime memory allocation is actually a 72k memory allocation as
tracked by the Page.c code because the guard pages are tracked as part
of the same allocation. This is a core function of the current heap
guard architecture.

This could also be fixed with rearchitecting the heap guard system to
respect alignment requirements and shift the guard pages inside of the
outer rounded allocation or by having guard pages be the runtime
granularity. Both of these approaches have issues. In the former case,
we break UEFI spec 2.10 section 2.3.6 for AARCH64, which states that
each 64k page for runtime memory regions may not have mixed memory
attributes, which pushing the guard pages inside would create. In the
latter case, an immense amount of memory is wasted to support such large
guard pages, and with pool guard many systems could not support an
additional 128k allocation for all runtime memory.

The simpler and safer solution is to disallow page and pool guards for
runtime memory allocations for systems that have a runtime granularity
greater than the EFI_PAGE_SIZE (4k). The usefulness of such guards is
limited, as OSes do not map guard pages today, so there is only boot
time protection of these ranges. This also prevents other bugs from
being exposed by using guards for regions that have a non-4k alignment
requirement, as again, multiple have cropped up because the heap guard
system was not built to support it.

This patch adds both a static assert to ensure that either the runtime
granularity is the EFI_PAGE_SIZE or that the PCD bits are not set to
enable heap guard for runtime memory regions. It also adds a check in
the page and pool allocation system to ensure that at runtime we are not
allocating a runtime region and attempt to guard it (the PCDs are close
to being removed in favor of dynamic heap guard configurations).

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4674
Github PR: https://github.com/tianocore/edk2/pull/5382

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-14 16:29:22 +00:00
Oliver Smith-Denny
68461c2c37 MdeModulePkg: DxeCore: Correct Runtime Granularity Memory Type 
Per the UEFI spec 2.10, section 2.3.6 (for the AARCH64 arch, other
architectures in section two confirm the same) the memory types that
need runtime page allocation granularity are EfiReservedMemoryType,
EfiACPIMemoryNVS, EfiRuntimeServicesCode, and EfiRuntimeServicesData.
However, legacy code was setting runtime page allocation granularity for
EfiACPIReclaimMemory and not EfiReservedMemoryType. This patch fixes
that error.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Suggested-by: Ard Biesheuvel <ardb+tianocore@kernel.org>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-14 16:29:22 +00:00
Oliver Smith-Denny
bf8f16f771 MdeModulePkg: DxeCore: Fix CodeQL Error in FreePages 
CodeQL flags the Free Pages logic for not ensuring that
Entry is non-null before using it. Add a check for this
and appropriately bail out if we hit this case.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-14 16:29:22 +00:00
Oliver Smith-Denny
019feb42a1 MdeModulePkg: Remove ArmPkg Dependency 
With commita21a994f55e53325d3e060c435ca3a87fd7c2c79 MdeModulePkg no
longer has a hard dependency on ArmMmuLib and therefore ArmLib. This is
the final dependency on ArmPkg, so remove the unused libs and drop the
allowed dependency on ArmPkg as MdeModulePkg should not depend on it as
this is a circular dependency.

Github PR: https://github.com/tianocore/edk2/pull/5361
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3651

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-14 16:29:22 +00:00
Igniculus Fu
5572b43c67 BaseTools/GenFds: Apply OEM_CAPSULE_FLAGS during Capsule generation. 
Bugzilla ticket 4633

FdfParser.py has defined a key named OEM_CAPSULE_FLAGS to set the
lower 16 bits of EFI_CAPSULE_HEADER.Flags. However, this key is totally
"forgotten" in Capsule.py, making it impossible to set lower 16 bits of
this field, and leading to an always FALSE when comparing to
gEfiMdeModulePkgTokenSpaceGuid.PcdSystemRebootAfterCapsuleProcessFlag
in MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleProcessLib.c:
ProcessTheseCapsules().

This patch ORs the value of OEM_CAPSULE_FLAGS with previously calculated
CAPSULE_FLAGS value, making the lower 16 bits of value being correctly set.

Signed-off-by: Igniculus Fu <igniculus.fu@amd.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Eric Xing <eric.xing@amd.com>
Cc: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-13 10:53:30 +00:00
Jeshua Smith
308e6e0936 DynamicTablesPkg/SSDT: Require Package node in hierarchy 
The code was incorrectly assuming that root nodes had to be physical
package nodes and vice versa. This is not always true, so update the
check to simply require exactly one package node somewhere in the
hierarchy.

Cc: Pierre Gondois <pierre.gondois@arm.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Jeshua Smith <jeshuas@nvidia.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
 2024-03-13 08:36:40 +00:00
Qingyu Shang
6b3a512149 SecurityPkg: Update ReceiveData and SendData function description 
Refer to UEFI Spec 2.10 section 13.14, update the parameter 'MediaId'
description for EFI_STORAGE_SECURITY_COMMAND_PROTOCOL function
ReceiveData and SendData.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Qingyu Shang <qingyu.shang@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
 2024-03-13 02:48:38 +00:00
Qingyu Shang
6f67ed45e0 MdeModulePkg: Update ReceiveData and SendData function description 
AtaBusDxe, NvmExpressDxe, ScsiDiskDxe and EmmcDxe is used to back the
EFI_STORAGE_SECURITY_COMMAND_PROTOCOL, update the parameter 'MediaId'
description for the protocol function ReceiveData and SendData as
described in UEFI Spec 2.10 section 13.14.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Qingyu Shang <qingyu.shang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-13 02:48:38 +00:00
Qingyu Shang
a8b80149e1 MdePkg: Update ReceiveData and SendData function description 
Refer to UEFI Spec 2.10 section 13.14, update the parameter 'MediaId'
description for EFI_STORAGE_SECURITY_COMMAND_PROTOCOL function
ReceiveData and SendData.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Qingyu Shang <qingyu.shang@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-13 02:48:38 +00:00
Ard Biesheuvel
ddaf39263a EmbeddedPkg/NonCoherentIoMmuDxe: Make SetAttributes always succeed 
NonCoherentIoMmuSetAttribute() does nothing except return
EFI_UNSUPPORTED. This was fine when it was introduced, but now, the PCI
bus driver will fail a PCI I/O Map() operation if the call to
SetAttributes() fails.

So return EFI_SUCCESS instead.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Abner Chang <abner.chang@amd.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
 2024-03-12 17:39:01 +00:00
Laszlo Ersek
ccf91b518f Maintainers.txt: remove Laszlo's entries 
Red Hat and I have mutually and amicably agreed to separate. Remove my
entries from "Maintainers.txt".

Cc: Andrew Fish <afish@apple.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240306210552.19524-1-lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
1c0db23151 UefiPayloadPkg: auto-generate SEC ProcessLibraryConstructorList() decl 
Rely on AutoGen for declaring ProcessLibraryConstructorList().

Build-tested with:

  python UefiPayloadPkg/UniversalPayloadBuild.py -a X64 -b DEBUG -t GCC5

  python UefiPayloadPkg/UniversalPayloadBuild.py -a X64 -b DEBUG -f \
    -t GCC5

  build -a X64 -b DEBUG -p UefiPayloadPkg/UefiPayloadPkg.dsc -t GCC5 \
    -D BUILD_ARCH=X64

Cc: Gua Guo <gua.guo@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: James Lu <james.lu@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-11-lersek@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
18fc96c9a9 UefiCpuPkg: auto-generate SEC ProcessLibraryConstructorList() decl 
Rely on AutoGen for declaring ProcessLibraryConstructorList().

Build-tested with:

  build -a X64 -b DEBUG -m UefiCpuPkg/SecCore/SecCore.inf \
    -p UefiCpuPkg/UefiCpuPkg.dsc -t GCC5

  build -a X64 -b DEBUG -m UefiCpuPkg/SecCore/SecCoreNative.inf \
    -p UefiCpuPkg/UefiCpuPkg.dsc -t GCC5

Cc: Catharine West <catharine.west@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-10-lersek@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
1e603ac0d8 IntelFsp2Pkg: auto-generate SEC ProcessLibraryConstructorList() decl 
Rely on AutoGen for declaring ProcessLibraryConstructorList().

Build-tested with:

  build -a X64 -b DEBUG -m IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf \
    -p IntelFsp2Pkg/IntelFsp2Pkg.dsc -t GCC5

  build -a X64 -b DEBUG -m IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf \
    -p IntelFsp2Pkg/IntelFsp2Pkg.dsc -t GCC5

Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Susovan Mohapatra <susovan.mohapatra@intel.com>
Cc: Ted Kuo <ted.kuo@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-9-lersek@redhat.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
063a831c66 EmulatorPkg: auto-generate SEC ProcessLibraryConstructorList() decl 
Rely on AutoGen for declaring ProcessLibraryConstructorList().

Build-tested with:

  build -a X64 -b DEBUG -m EmulatorPkg/Sec/Sec.inf \
    -p EmulatorPkg/EmulatorPkg.dsc -t GCC5

Cc: Andrew Fish <afish@apple.com>
Cc: Ray Ni <ray.ni@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-8-lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
f71a76ee01 ArmVirtPkg: auto-generate SEC ProcessLibraryConstructorList() decl 
Rely on AutoGen for declaring ProcessLibraryConstructorList().

Build-tested with:

  build -a AARCH64 -b DEBUG \
    -m ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf \
    -p ArmVirtPkg/ArmVirtKvmTool.dsc -t GCC5

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-7-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
91460083f1 ArmPlatformPkg: auto-generate SEC ProcessLibraryConstructorList() decl 
Rely on AutoGen for declaring ProcessLibraryConstructorList().

Build-tested with:

  build -a AARCH64 -b DEBUG \
    -m ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf \
    -p ArmPlatformPkg/ArmPlatformPkg.dsc -t GCC5

  build -a AARCH64 -b DEBUG \
    -m ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf \
    -p ArmPlatformPkg/ArmPlatformPkg.dsc -t GCC5

  build -a AARCH64 -b DEBUG \
    -m ArmPlatformPkg/PrePi/PeiMPCore.inf \
    -p ArmPlatformPkg/ArmPlatformPkg.dsc -t GCC5

  build -a AARCH64 -b DEBUG \
    -m ArmPlatformPkg/PrePi/PeiUniCore.inf \
    -p ArmPlatformPkg/ArmPlatformPkg.dsc -t GCC5

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-6-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
524feaa32f OvmfPkg/RiscVVirt/Sec: clean up ProcessLibraryConstructorList() decl 
<Library/PeimEntryPoint.h> declares a bogus
ProcessLibraryConstructorList() for the OvmfPkg/RiscVVirt SEC module. Rely
on AutoGen for (properly) declaring ProcessLibraryConstructorList().
Remove the correct, but superfluous, declaration as well.

Build-tested with:

  build -a RISCV64 -b DEBUG -m OvmfPkg/RiscVVirt/Sec/SecMain.inf \
    -p OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc -t GCC5

Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-5-lersek@redhat.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
9f9bf82209 OvmfPkg/IntelTdx: auto-gen & fix SEC ProcessLibraryConstructorList() decl 
<Library/PeimEntryPoint.h> declares a bogus
ProcessLibraryConstructorList() for IntelTdx's SEC module. Rely on AutoGen
for (properly) declaring ProcessLibraryConstructorList(). Update the call.

Build-tested with:

  build -a X64 -b DEBUG -m OvmfPkg/IntelTdx/Sec/SecMain.inf \
    -p OvmfPkg/IntelTdx/IntelTdxX64.dsc -t GCC5

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-4-lersek@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
1fbc121cfe OvmfPkg: auto-generate (and fix) SEC ProcessLibraryConstructorList() decl 
<Library/PeimEntryPoint.h> declares a bogus
ProcessLibraryConstructorList() for OVMF's SEC module. Rely on AutoGen for
(properly) declaring ProcessLibraryConstructorList(). Update the call.

Build-tested with:

  build -a X64 -b DEBUG -m OvmfPkg/Sec/SecMain.inf \
    -p OvmfPkg/OvmfPkgX64.dsc -t GCC5

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=990
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4643
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-3-lersek@redhat.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Laszlo Ersek
da4aa451ba pip-requirements.txt: require edk2-basetools version 0.1.51 
The edk2-basetools commit that corresponds to edk2 commit bac9c74080
("BaseTools/AutoGen: declare ProcessLibraryConstructorList() for SEC
modules", 2024-02-29) is 5b7161de22ee ("BaseTools/AutoGen: declare
ProcessLibraryConstructorList() for SEC modules", 2024-03-04); it is part
of tag v0.1.51.

Subsequent patches in this series put that feature to use. Require release
0.1.51 of edk2-basetools in "pip-requirements.txt", so that the next
patches work with in-tree and out-of-tree (e.g., CI) BaseTools.

Furthermore, require version 0.20.0 of edk2-pytool-library. This is a
dependency of edk2-basetools v0.1.50 (commit 08e5bbe755d2, "Add
pyproject.toml and fix setup.py deprecation warnings", 2024-02-13) and
v0.1.51 too (commit f3e15d654479, "Add pyproject.toml and fix setup.py
deprecation warnings", 2024-02-16).

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Joey Vagedes <joey.vagedes@gmail.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=991
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240305113843.68812-2-lersek@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
 2024-03-08 09:09:22 +00:00
Dhaval
e60529df58 UefiPayloadPkg: Make Dsc accomodative of other archs 
Current DSC files contains a lot of files which are
specific to X86 arch. Need to move around files under
arch specific sections.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
 2024-03-06 03:15:21 +00:00
Lee, Chun-Yi
2a0d4a2641 OvmfPkg/SmbiosPlatformDxe: tweak fallback release date again 
In case PcdFirmwareReleaseDateString is not set use a valid date
as fallback. But the default valid date can _NOT_ pass the Microsoft
SVVP test "Check SMBIOS Table Specific Requirements". The test emitted
the error message:

BIOS Release Date string is unexpected length: 8. This string must be in
MM/DD/YYYY format. No other format is allowed and no additional information
may be included. See field description in the SMBIOS specification.

Base on SMBIOS spec v3.7.0:

08h     2.0+    BIOS Release Date       BYTE    STRING
String number of the BIOS release date. The date
string, if supplied, is in either mm/dd/yy or
mm/dd/yyyy format. If the year portion of the string
is two digits, the year is assumed to be 19yy.
NOTE: The mm/dd/yyyy format is required for SMBIOS
version 2.3 and later.

So, let's tweek the fallback release date again.

Fixes: a0f9628705 ("OvmfPkg/SmbiosPlatformDxe: tweak fallback release date") [edk2-stable202305~327]
Signed-off-by: "Lee, Chun-Yi" <jlee@suse.com>
Message-Id: <20240204092914.29813-1-jlee@suse.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Pawel Polawski <ppolawsk@redhat.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Ruifeng Gao <ruifeng.gao@intel.com>
Cc: "Lee, Chun-Yi" <jlee@suse.com>
[lersek@redhat.com: Turn the CC's from the list posting to commit message
 body tags, for placating "PatchCheck.py". Also work the
 "ruifeng.gao@intel.com" email address into a format that "PatchCheck.py"
 accepts.]
 2024-03-05 08:49:19 +00:00
Michael Kubacki
918288ab5a .github/workflows/codeql.yml: Update actions being deprecated 
Currently CodeQL runs have the following warnings:

  Node.js 16 actions are deprecated. Please update the following
  actions to use Node.js 20: actions/setup-python@v4,
  actions/upload-artifact@v3, actions/cache@v3. For more information
  see:
  https://github.blog/changelog/2023-09-22-github-actions-transitioning-from-node-16-to-node-20/.

And:

  CodeQL Action v2 will be deprecated on December 5th, 2024. Please
  update all occurrences of the CodeQL Action in your workflow files
  to v3. For more information, see:
  https://github.blog/changelog/2024-01-12-code-scanning-deprecation-of-codeql-action-v2/

The first is resolved by updating the actions to the latest versions
that were released to use Node.js 20. The second is specifically
referring to the codeql-action/upload-sarif action which is at v2.

This change updates all of the actions to the latest releases to
prevent deprecated versions from continuing to be used.

---

The following breaking change was noted in actions/upload-artifact
that caused some related changes in the workflow:

  "Due to how Artifacts are created in this new version, it is no
   longer possible to upload to the same named Artifact multiple
   times. You must either split the uploads into multiple Artifacts
   with different names, or only upload once. Otherwise you will
   encounter an error."

This workflow depended on that behavior previously to append multiple
logs (e.g. setup log, update log, build log) to the same named
artifact (named per package). These were appended after each operation
so they are readily available if the operation failed and no further
actions are run.

Now the artifacts must be unique in name. The hyphenation comes in
because edk2 further builds some packages with both architectures in
a single build vs separate builds (e.g. IA32 and X64 vs IA32,X64). To
uniquely name artifacts resulting from those builds, the architecture
is also placed in the artifact name. For builds with multiple
architectures the artifact name captures each architecture separated
by a hyphen.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Joey Vagedes <joey.vagedes@gmail.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
 2024-03-04 18:03:29 +00:00
Michael Kubacki
bff9815b61 BaseTools/GenFds: Resolve absolute workspace INF paths 
Currently, if an INF path is an absolute path on Linux (begins with
"/"), the "/" character will be removed. If the path is an absolute
system path, this creates an invalid path.

An example of when this may be an issue is in external dependencies
where an INF is within the external dependency, the `set_build_var`
flag is set, and DSC files refer to files by its build variable
(e.g. `$(SHARED_BINARIES)/Module.inf`). INFs in a binary distribution
like this example may contain a [Binaries] section and refer to
different section files that can be used by a platform to compose an
FFS file. For example, the PE32 (.efi) and DEPEX (.depex) files.

In this case, `$(SHARED_BINARIES)` will be an absolute path to the
ext dep directory and `FfsInfStatement.__InfParse__` will remove the
leading "/" character so the path is invalid.

This change first checks if the absolute path will resolve into the
current workspace. If it does (as will happen in the shared crypto
ext dep example above), it modifies the path to be relative to the
workspace so later logic dependent on relative paths can operate on
it. If the absolute path is not within the current workspace, it
follows previous behavior for backward compatibility to that
scenario.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
 2024-03-04 16:23:58 +00:00
Himanshu Sharma
1ae5bee967 DynamicTablesPkg/SsdtSerialPortFixupLib: Add Interrupt node for SPIs only 
Add interrupt node to the AML description of the serial-port only if the
IRQ ID from the Configuration Manager is a valid SPI (shared processor
interrupt) or an extended SPI. So, for DBG2 UART ports where interrupt
is not mandatory, adding of an interrupt node in the AML description
using Serial Port Fixup Library can be ignored if the UART is not
defined with a valid SPI, like in N1SDP.

This update generates the interrupt node for the valid SPI range using
the AML Codegen API instead of updating it using the AML Fixup API.

Cc: Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
 2024-03-04 09:58:10 +00:00
Himanshu Sharma
855f528199 ArmPkg/ArmGicArchLib: Add macros for SPI and extended SPI ranges 
Taking reference from Table 2-1 of the Arm Generic Interrupt Controller
Architecture Specification, Issue H, January 2022, add macros for the
SPI and extended SPI ranges with the purpose of reusability on including
the ArmPkg.

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
 2024-03-04 09:58:10 +00:00
Gua Guo
970aacd191 UefiPayloadPkg: UPL arch backward support ELF 
After 11ad164bce merge,
ELF format API won't meet backward requirement.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
 2024-03-04 08:57:18 +00:00
Jason Lou
3775122ede ShellPkg/SmbiosView: Support New ProcessorFamily for SMBIOS Type4 
The patch updates SmbiosView to support new ProcessorFamily for SMBIOS
Type4 based on SMBIOS 3.8.0.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhichao Gao <zhichao.gao@intel.com>
 2024-03-04 07:38:26 +00:00
Jason Lou
47723854fd MdePkg/SmBios.h: Add New ProcessorFamily definitions for SMBIOS Type4 
The patch adds new ProcessorFamily definitions for SMBIOS Type4 based on
SMBIOS 3.8.0.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Benny Lin <benny.lin@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
 2024-03-04 07:38:26 +00:00
Gerd Hoffmann
275d0a39c4 OvmfPkg/ResetVector: wire up 5-level paging for TDX 
BSP workflow is quite simliar to the non-coco case.

TDX_WORK_AREA_PGTBL_READY is used to record the paging mode:
  1 == 4-level paging
  2 == 5-level paging

APs will look at TDX_WORK_AREA_PGTBL_READY to figure whenever
they should enable 5-level paging or not.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240301074402.98625-9-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: move "CheckForSev:" label into "%if PG_5_LEVEL" scope,
 as discussed with Gerd]
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
318b0d714a OvmfPkg/ResetVector: print post codes for 4/5 level paging 
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-8-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
49b7faba1d OvmfPkg/ResetVector: add 5-level paging support 
Add macros to check for 5-level paging and gigabyte page support.
Enable 5-level paging for the non-confidential-computing case.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240301074402.98625-7-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
e3bd782373 OvmfPkg/ResetVector: split SEV and non-CoCo workflows 
Use separate control flows for SEV and non-CoCo cases.

SevClearPageEncMaskForGhcbPage and GetSevCBitMaskAbove31 will now only
be called when running in SEV mode, so the SEV check in these functions
is not needed any more.

No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-6-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
b7a97bfac5 OvmfPkg/ResetVector: split TDX BSP workflow 
Create a separate control flow for TDX BSP.

TdxPostBuildPageTables will now only be called when running in TDX
mode, so the TDX check in that function is not needed any more.

No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-5-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
4329b5b0cd OvmfPkg/ResetVector: add CreatePageTables4Level macro 
Move code to create 4-level page tables to a nasm macro.
No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-4-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
52e44713d2 OvmfPkg/ResetVector: add ClearOvmfPageTables macro 
Move code to clear the page tables to a nasm macro.
No functional change.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-3-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
fded08e744 OvmfPkg/ResetVector: improve page table flag names 
Add comments, rename some of the PAGE_* flags and combined attributes.
Specifically use "LARGEPAGE" instead of "2M" because that bit is used
for both 2M and 1G large pages.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-2-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-03-01 18:47:27 +00:00
Li, Zhihao
371940932d MdeModulePkg/Core/Pei: Improve the copy performance 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4697

EvacuateTempRam function will copy the temporary memory context to the rebased
pages and the raw pages. Migrations of rebased PEIMs is from cache to memory,
while raw PEIMs is from memory to memory. So the migrations of raw PEIMs
is slower than rebased PEIMs. Experimental data indicates that changing the source
address of raw PEIMs migration will improve performance by 35%.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Zhihao Li <zhihao.li@intel.com>
Message-Id: <20240301071147.519-1-zhihao.li@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
 2024-03-01 18:47:27 +00:00
Zhiguang Liu
2ec8f0c640 StandaloneMmPkg: Disallow unregister MMI handler in other MMI handler 
In last patch, we add code support to unregister MMI handler inside
itself. However, the code doesn't support unregister MMI handler
insider other MMI handler. While this is not a must-have usage.
So add check to disallow unregister MMI handler in other MMI handler.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Message-Id: <20240301030133.628-5-zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-03-01 18:47:27 +00:00
Zhiguang Liu
049ff6c39c StandaloneMmPkg: Support to unregister MMI handler inside MMI handler 
To support unregister MMI handler inside MMI handler itself,
get next node before MMI handler is executed, since LIST_ENTRY that
Link points to may be freed if unregister MMI handler in MMI handler
itself.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Message-Id: <20240301030133.628-4-zhiguang.liu@intel.com>
 2024-03-01 18:47:27 +00:00
Zhiguang Liu
17b2872200 MdeModulePkg/SMM: Disallow unregister SMI handler in other SMI handler 
In last patch, we add code support to unregister SMI handler inside
itself. However, the code doesn't support unregister SMI handler
insider other SMI handler. While this is not a must-have usage.
So add check to disallow unregister SMI handler in other SMI handler.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Message-Id: <20240301030133.628-3-zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-03-01 18:47:27 +00:00
Zhiguang Liu
ae1079b386 MdeModulePkg/SMM: Support to unregister SMI handler inside SMI handler 
To support unregister SMI handler inside SMI handler itself,
get next node before SMI handler is executed, since LIST_ENTRY that
Link points to may be freed if unregister SMI handler in SMI handler
itself.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Message-Id: <20240301030133.628-2-zhiguang.liu@intel.com>
 2024-03-01 18:47:27 +00:00
Zhou Jianfeng
dcffad2491 UefiCpuPkg/CpuPageTableLib: qualify page table accesses as volatile 
Add volatile qualifier to page table related variable to prevent
compiler from optimizing away the variables which may lead to
unexpected result.

Signed-off-by: Zhou Jianfeng <jianfeng.zhou@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Zhang Di <di.zhang@intel.com>
Cc: Tan Dun <dun.tan@intel.com>
Cc: Michael Brown <mcb30@ipxe.org>
Message-Id: <20240301025447.41170-1-jianfeng.zhou@intel.com>
Reviewed-by: Michael Brown <mcb30@ipxe.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: reconstruct commit manually, from corrupt patch email
 on-list]
 2024-03-01 18:47:27 +00:00
Zhou Jianfeng
d159e22913 UefiCpuPkg/CpuPageTableLib: Fix IN OUT parameters marked as IN 
Some IN OUT parameters in CpuPageTableMap.c were mistakenly marked as IN.
"IN" replaced with "IN OUT" in the following interfaces:

PageTableLibSetPte4K(): Pte4K
PageTableLibSetPleB():  PleB
PageTableLibSetPle():   Ple
PageTableLibSetPnle():  Pnle

Reviewed-by: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhou Jianfeng <jianfeng.zhou@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240222023922.29275-1-jianfeng.zhou@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-03-01 18:47:27 +00:00
Gerd Hoffmann
dc7cfa9bab UefiCpuPkg/MpInitLib: add struct MP_HAND_OFF_CONFIG 
Move the WaitLoopExecutionMode and StartupSignalValue fields to a
separate HOB with the new struct.

WaitLoopExecutionMode and StartupSignalValue are independent of
processor index ranges; they are global to MpInitLib (i.e., the entire
system). Therefore they shouldn't be repeated in every MpHandOff GUID
HOB.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240228114855.1615788-1-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-02-29 09:56:38 +00:00
Laszlo Ersek
bac9c74080 BaseTools/AutoGen: declare ProcessLibraryConstructorList() for SEC modules 
Most module types have standardized entry point function prototypes. They
are declared in headers like

- MdePkg/Include/Library/PeiCoreEntryPoint.h
- MdePkg/Include/Library/PeimEntryPoint.h
- MdePkg/Include/Library/DxeCoreEntryPoint.h
- MdePkg/Include/Library/UefiDriverEntryPoint.h
- MdePkg/Include/Library/UefiApplicationEntryPoint.h

These header files also declare matching ProcessLibraryConstructorList()
prototypes.

The SEC module type does not have a standardized entry point prototype
(aka parameter list), therefore no header file like the above ones exists
for SEC. Consequently, no header file *declares*
ProcessLibraryConstructorList() for SEC modules, even though AutoGen
always *defines* ProcessLibraryConstructorList() with the same, empty,
parameter list (i.e., just (VOID)).

The lack of a central declaration is a problem because in SEC code,
ProcessLibraryConstructorList() needs to be called manually, and those
calls need a prototype. Most SEC modules in edk2 get around this by
declaring ProcessLibraryConstructorList() manually, while some others use
an incorrect (PEIM) prototype.

Liming suggested in
<https://bugzilla.tianocore.org/show_bug.cgi?id=991#c2> that AutoGen
provide the declaration as well; implement that in this patch.

Mike suggested that the feature be gated with INF_VERSION, for
compatibility reasons. (INF_VERSION >= 1.30) reflects that the latest
(draft) version of the INF specification, as of this writing, is commit
a31e3c842bee / version 1.29.

For example, if we modify "OvmfPkg/Sec/SecMain.inf" as follows:

> diff --git a/OvmfPkg/Sec/SecMain.inf b/OvmfPkg/Sec/SecMain.inf
> index 3c47a664a95d..dca932a474ee 100644
> --- a/OvmfPkg/Sec/SecMain.inf
> +++ b/OvmfPkg/Sec/SecMain.inf
> @@ -8,7 +8,7 @@
>  ##
>
>  [Defines]
> -  INF_VERSION                    = 0x00010005
> +  INF_VERSION                    = 1.30
>    BASE_NAME                      = SecMain
>    FILE_GUID                      = df1ccef6-f301-4a63-9661-fc6030dcc880
>    MODULE_TYPE                    = SEC

then the patch produces the following difference in
"Build/OvmfX64/NOOPT_GCC5/X64/OvmfPkg/Sec/SecMain/DEBUG/AutoGen.h":

> --- AutoGen.h.orig      2024-02-06 23:10:23.469535345 +0100
> +++ AutoGen.h   2024-02-07 00:00:57.361294055 +0100
> @@ -220,6 +220,13 @@
>
>  // Definition of PCDs used in libraries is in AutoGen.c
>
> +// ProcessLibraryConstructorList() declared here because SEC has no standard entry point.
> +VOID
> +EFIAPI
> +ProcessLibraryConstructorList (
> +  VOID
> +  );
> +
>
>  #ifdef __cplusplus
>  }

which presently (as of edk2 commit edc6681206) triggers the following
build error:

> In file included from OvmfPkg/Sec/SecMain.c:14:
> MdePkg/Include/Library/PeimEntryPoint.h:74:1: error: conflicting types for
> ‘ProcessLibraryConstructorList’; have ‘void(void *, const
> EFI_PEI_SERVICES **)’ {aka ‘void(void *, const struct _EFI_PEI_SERVICES
> **)’}
>    74 | ProcessLibraryConstructorList (
>       | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> In file included from <command-line>:
> Build/OvmfX64/NOOPT_GCC5/X64/OvmfPkg/Sec/SecMain/DEBUG/AutoGen.h:226:1: note:
> previous declaration of ‘ProcessLibraryConstructorList’ with type
> ‘void(void)’
>   226 | ProcessLibraryConstructorList (
>       | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

That's a genuine bug in OvmfPkg that needs to be fixed, but we keep
compatibility with existent SEC modules until/unless they upgrade
INF_VERSION to 1.30+.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=991
Suggested-by: Liming Gao <gaoliming@byosoft.com.cn>
Suggested-by: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240224210504.41873-1-lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-02-29 09:56:38 +00:00
Gerd Hoffmann
adebfe121c OvmfPkg/PlatformInitLib: add 5-level paging support 
Adjust physical address space logic for la57 mode (5-level paging).
With a larger logical address space we can identity-map a larger
physical address space.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Message-Id: <20240222105407.75735-4-kraxel@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-02-29 09:56:38 +00:00
Gerd Hoffmann
13fbc16556 MdeModulePkg/DxeIplPeim: rename variable 
Rename Page5LevelSupported to Page5LevelEnabled.

The variable is set to true in case 5-paging level is enabled (64-bit
PEI) or will be enabled (32-bit PEI), it does *not* tell whenever the
5-level paging is supported by the CPU.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Message-Id: <20240222105407.75735-3-kraxel@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-02-29 09:56:38 +00:00
Gerd Hoffmann
73ac735be8 MdeModulePkg/DxeIplPeim: fix PcdUse5LevelPageTable assert 
PcdUse5LevelPageTable documentation says:

  Indicates if 5-Level Paging will be enabled in long mode. 5-Level
  Paging will not be enabled when the PCD is TRUE but CPU doesn't support
  5-Level Paging.

So running in 4-level paging mode with PcdUse5LevelPageTable=TRUE is
possible.  The only invalid combination is 5-level paging being active
with PcdUse5LevelPageTable=FALSE.

Fix the ASSERT accordingly.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Message-Id: <20240222105407.75735-2-kraxel@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
 posting into "Cc:" tags in the commit message, in order to pacify
 "PatchCheck.py"]
 2024-02-29 09:56:38 +00:00
Nickle Wang
d9a6e7b0b8 RedfishPkg/RedfishCrtLib: fix unresolved external symbol issue 
-Fix below compiler error reported in edk2 CI.
ERROR - Linker #2001 from JsonLib.lib(load.obj) : unresolved external
symbol __ftol2
-The file MathFtol.c is copied from IntrinsicLib in CryptoPkg.
-Add MathFtol.c to EccCheck IgnoreFiles.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-02-29 03:25:18 +00:00
Nickle Wang
d4c76fa17d RedfishPkg/RedfishDebugLib: use RedfishHttpLib 
Remove RedfishLib and use RedfishHttpLib for debug printing
Redfish response data.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-02-29 03:25:18 +00:00
Nickle Wang
422dfaab31 RedfishPkg/RedfishLib: include RedfishServiceData.h 
Redfish common structures are moved to RedfishServiceData.h. Remove
them from RedfishLib.h

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-02-29 03:25:18 +00:00
Nickle Wang
9da786c16f RedfishPkg: introduce RedfishHttpLib 
RedfishHttpLib is a wrapper library for Redfish feature drivers to
call Redfish HTTP Protocol easily.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-02-29 03:25:18 +00:00
Nickle Wang
0ce2012c6c RedfishPkg: implement Redfish HTTP protocol 
implement Redfish HTTP protocol driver.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Co-authored-by: Igor Kulchytskyy <igork@ami.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Mike Maslenkin <mike.maslenkin@gmail.com>
 2024-02-29 03:25:18 +00:00
Nickle Wang
1988f2df29 RedfishPkg: introduce Redfish HTTP protocol 
Introduce Redfish HTTP protocol to improve Redfish performance
and communication stability between BIOS and Redfish service.
- Feature drivers often query same Redfish resource multiple
times for different purpose. Implement HTTP cache mechanism to
improve HTTP GET performance. "UseCache" parameter is provided
if application likes to send HTTP GET request to Redfish service
without using cache data.
- This driver will retire stale cache data automatically when
application modify Redfish resource at service side.
- PCD PcdHttpCacheDisabled is used to disable cache mechanism in
this driver for debugging purpose.
- PCD PcdRedfishServiceContentEncoding is used to enable content
encoding while sending data to Redfish service.
- Redfish HTTP protocol also implement retry mechanism to retry
HTTP request when BIOS receive unexpected response from Redfish service.
This function helps BIOS Redfish to finish its job as much as possible.
- PCDs are defined to control how many times BIOS will retry the
request and how many time BIOS will wait between retries.

Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Co-authored-by: Igor Kulchytskyy <igork@ami.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
 2024-02-29 03:25:18 +00:00
Jayaprakash, N
3e91e42136 BaseTools: Syntax warning invalid escape sequence \C 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4666

This commit fixes the issue reported through BZ4666.
The Syntax warning related to invalid escape sequence
for \C is seen on Windows OS based builds of edk2 sources.
On Windows the path seperator needs to prefixed with \
so essentially we need to use \\ as path seperator.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Jayaprakash N <n.jayaprakash@intel.com>
Signed-off-by: Jayaprakash N <n.jayaprakash@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
 2024-02-28 00:23:58 +00:00
Michael D Kinney
6d571c0070 BaseTools/Scripts/PatchCheck: Error if commit modifies multiple packages 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4679

Update PatchCheck.py to evaluate all the files modified in each commit
and generate an error if:
* A commit adds/modifies files in multiple package directories
* A commit adds/modifies files in multiple non-package directories
* A commit adds/modifies files in both a package and a non-package
  directory
* A commit deletes files from multiple package directories
* A commit deletes files from multiple non-package directories
* A commit deletes files from both a package and a non-package
  directory

Modifications to files in the root of the repository are not
evaluated.

This check is skipped if PatchCheck.py is run on a patch file or
input from stdin because this multiple package commit check depends
on information from a git repository.

If --ignore-multi-package option is set, then reduce the multiple
package commit check from an error to a warning for all commits in
the commit range provided to PatchCheck.py.

Add check for a 'Continuous-integration-options:' commit message
tag that allows one or more options to be specified at the individual
commit scope to enable/disable continuous integration checks. This
tag must start at the beginning of a commit message line and may
appear more than once in a commit message.

Add support for a Continuous-integration-options tag value of
'PatchCheck.ignore-multi-package' that reduces the multiple package
commit check from an error to a warning for the specific commits that
specify this option.  Example:

  Continuous-integration-options: PatchCheck.ignore-multi-package

The set of packages are found by searching for DEC files in a git
repository. The list of DEC files in a git repository is collected
with the following git command:

  git ls-files *.dec

The set of files added/modified by each commit is found using the
following git command:

  git diff-tree --no-commit-id --name-only --diff-filter=AM -r <commit>

The set of files deleted by each commit is found using the
following git command:

  git diff-tree --no-commit-id --name-only --diff-filter=D -r <commit>

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
 2024-02-27 19:28:19 +00:00
Michael D Kinney
0bbec15b54 BaseTools/Scripts/PatchCheck: Error if no Cc tags are present 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4694

If no Cc tags are detected in a commit message, then generate an
error. All patches sent for review are required to provide the set
of maintainers and reviewers responsible for the directories/files
modified. The set of maintainers and reviewers are documented in
Maintainers.txt and can be retrieved using the script
BaseTools/Scripts/GetMaintainer.py.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
 2024-02-27 19:28:19 +00:00
Michael D Kinney
45ad13bb64 BaseTools/Scripts/PatchCheck: Return CommitMessageCheck errors 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4693

Commit signatures are checked and error messages are logged but
errors are not captured and returned from find_signatures() in the
CommitMessageCheck class. This causes signature errors to be
silently ignored by CI.

Update logic in CommitMessageCheck class to return errors
detected in commit message signatures.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
 2024-02-27 19:28:19 +00:00
Michael D Kinney
dae8c29dab BaseTools/Scripts/PatchCheck: Update Author checks 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4680

* Reject patches that match Author email "devel@edk2.groups.io"
* Update the current check for " via Groups.Io" to perform a
  case insensitive match. It appears that groups.io has changed the
  format of this string to use all lower case.

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
 2024-02-27 19:28:19 +00:00
Rebecca Cran
e59a40b92c EmbeddedPkg/Scripts/LauterbachT32: Fix EfiLoadDxe.cmm 
There have been many changes since EfiLoadDxe.cmm was last updated in
2011. The EFI_SYSTEM_TABLE can no longer be found by scanning memory on
4KB boundaries, so require users pass in its address instead. Update
various offsets so that the debug information can be found and loaded
with a recent version of TRACE32.

Signed-off-by: Rebecca Cran <rebecca@os.amperecomputing.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
 2024-02-27 17:17:38 +00:00
Gerd Hoffmann
aceb3490a2 OvmfPkg/PlatformPei: log pei memory cap details 
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240214104504.2931339-5-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-02-27 13:29:25 +00:00
Gerd Hoffmann
3ad1d7eb7b OvmfPkg/PlatformPei: rewrite page table calculation 
Consider 5-level paging.  Simplify calculation to make it easier
to understand.  Add some comments, improve ASSERTs.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240214104504.2931339-4-kraxel@redhat.com>
 2024-02-27 13:29:25 +00:00
Gerd Hoffmann
8757e648d1 OvmfPkg/PlatformPei: consider AP stacks for pei memory cap 
Needed to avoid running out of memory when booting
with a large (~2048) number of vcpus.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240214104504.2931339-3-kraxel@redhat.com>
 2024-02-27 13:29:25 +00:00
Gerd Hoffmann
9d32a02a72 OvmfPkg/PlatformPei: log a warning when memory is tight 
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240214104504.2931339-2-kraxel@redhat.com>
 2024-02-27 13:29:25 +00:00
Tuan Phan
ba9c3ceaf8 StandaloneMmPkg: Arm: Update to use the new StandaloneMmCpu driver 
Update entry point library for Arm to use the new architecture independent
StandaloneMmCpu driver.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
 2024-02-27 12:27:58 +00:00
Tuan Phan
e7a7169446 StandaloneMmPkg: Make StandaloneMmCpu driver architecture independent 
StandaloneMmCpu now can supports more architectures like RISC-V besides
ARM/AARCH64.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: levi.yun <yeoreum.yun@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
 2024-02-27 12:27:58 +00:00
Abner Chang
74b5309da9 RedfishPkg/RestJsonStructureDxe: Refine REST JSON C Structure DXE driver 
BZ #: 4711
- Add mode debug messages.
- Remove the references of "Redfish" from this driver.
  As REST JSON C Structure was not designed for Redfish only.
  Any RESTful applications can register the converter and
  provide JSON-C structure conversions through
  EFI_REST_JSON_STRUCTURE_PROTOCOL. Therefore this driver
  shouldn't have a dependency on Redfish package and the
  references of "Redfish" terminology.
- Fix the missing parameter of DEBUG macros used in this
  driver.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
 2024-02-27 07:39:51 +00:00
Michael Kubacki
33c81c25bb MdeModulePkg/TraceHubDebugSysTLib: Use wider type for loop comparisons 
Resolves a new CodeQL error due to the value being incremented in the
loop being a narrower type than the variable it is being compared
against.

The variable is changed to a UINT32 type so it has the same width as
the type it is being compared against.

Issue explanation: In a loop condition, comparison of a value of a
narrow type with a value of a wide type may result in unexpected
behavior if the wider value is sufficiently large (or small). This
is because the narrower value may overflow. This can lead to an
infinite loop.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Prakashan Krishnadas Veliyathuparambil <krishnadas.veliyathuparambil.prakashan@intel.com>
Cc: K N Karthik <karthik.k.n@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
 2024-02-26 23:13:08 +00:00
Gerd Hoffmann
d25421d0d8 UefiCpuPkg/MpInitLib: return early in GetBspNumber() 
After finding the BSP Number return the result instead of
continuing to loop over the remaining processors.

Suggested-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240222160106.686484-7-kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: s/ASSERT (FALSE)/ASSERT_EFI_ERROR (EFI_NOT_FOUND)/ [Ray]]
 2024-02-26 21:56:21 +00:00
Gerd Hoffmann
5e09b5d6d7 UefiCpuPkg/MpInitLib: Add support for multiple HOBs to SaveCpuMpData() 
Add support for splitting Hand-Off data into multiple HOBs.
This is required for VMs with thousands of CPUs.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240222160106.686484-6-kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: define one local variable per line [Ray]]
 2024-02-26 21:56:21 +00:00
Gerd Hoffmann
c8e77454b5 UefiCpuPkg/MpInitLib: Add support for multiple HOBs to MpInitLibInitialize 
Loop over all MP_HAND_OFF HOBs instead of expecting a single HOB
covering all CPUs in the system.

Add a new FirstMpHandOff variable, which caches the first HOB body for
faster lookups.  It is also used to check whenever MP_HAND_OFF HOBs are
present.  Using the MpHandOff pointer for that does not work any more
because the variable will be NULL at the end of HOB loops.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Message-Id: <20240222160106.686484-5-kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-02-26 21:56:21 +00:00
Gerd Hoffmann
e2c9d8eba4 UefiCpuPkg/MpInitLib: Add support for multiple HOBs to SwitchApContext() 
Rename the MpHandOff parameter to FirstMpHandOff.  Add loops so the
function inspects all HOBs present in the system.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240222160106.686484-4-kraxel@redhat.com>
 2024-02-26 21:56:21 +00:00
Gerd Hoffmann
b485230462 UefiCpuPkg/MpInitLib: Add support for multiple HOBs to GetBspNumber() 
Rename the MpHandOff parameter to FirstMpHandOff.  Add a loop so the
function inspects all HOBs present in the system.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240222160106.686484-3-kraxel@redhat.com>
 2024-02-26 21:56:21 +00:00
Gerd Hoffmann
a3ee1eea96 UefiCpuPkg/MpInitLib: Add support for multiple HOBs to GetMpHandOffHob 
Rename the function to GetNextMpHandOffHob(), add MP_HAND_OFF parameter.
When called with NULL pointer return the body of the first HOB, otherwise
return the next in the chain.

Also add the function prototype to the MpLib.h header file.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20240222160106.686484-2-kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-02-26 21:56:21 +00:00
Michael Kubacki
1f161a7915 MdeModulePkg/Bus/Usb/UsbNetwork: Check array index range before access 
Checks that an offset used to access array elements is within the
expected range before accessing the array item.

Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Richard Ho <richardho@ami.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-02-26 20:46:12 +00:00
Junfeng Guan
68238d4f94 MdePkg Updated the comments of EFI_SYSTEM_TABLE and ReadKeyStroke 
1. Refer to Uefi spec 2.10 section 4.3.1, Updated the comments of
EFI_SYSTEM_TABLE to satisfy ConIn/ConOut/StdErr requirements.
2. Refer to Uefi spec 2.10 section 13.3.3, Add a new retval
EFI_UNSUPPORTED to EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.ReadKeyStrokeEx
and EFI_SIMPLE_TEXT_INPUT_PROTOCOL.ReadKeyStroke().

Signed-off-by: Junfeng Guan <junfengx.guan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-02-26 19:18:00 +00:00
Yi Li
44fdc4f398 BaseTools: Update keybaord map based on UEFI spec 2.10 
REF: UEFI SPEC 2.10 34.8.10 EFI_KEY

Add EfiKeyIntl0-9.

Signed-off-by: Yi Li <yi1.li@intel.com>

Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-02-26 15:32:09 +00:00
Yi Li
d0c0e1960a MdePkg: Update keybaord map based on UEFI spec 2.10 
REF: UEFI SPEC 2.10 34.8.10 EFI_KEY

Add EfiKeyIntl0-9.

Signed-off-by: Yi Li <yi1.li@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
 2024-02-26 15:32:09 +00:00
David Woodhouse
ba96acd963 ArmVirtPkg/XenAcpiPlatformDxe: Install FACS table from DT 
The FACS may still exist when the reduced hardware flag is set in FADT;
it is optional. Since it contains the hardware signature field which
indicates that a hibernated system should boot cleanly instead of
attempting to resume, a platform may choose to expose it. Propagate it
correctly.

Also avoid a NULL pointer dereference if the platform doesn't provide
a DSDT.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Message-Id: <881dd0a2558ecbdfa02c844722d8a1103ab97ab3.camel@infradead.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: uncrustify]
 2024-02-25 18:52:27 +00:00
Gerd Hoffmann
f881b4d129 OvmfPkg: only add shell to FV in case secure boot is disabled 
The EFI Shell allows to bypass secure boot, do not allow
to include the shell in the firmware images of secure boot
enabled builds.

This prevents misconfigured downstream builds.

Ref: https://bugs.launchpad.net/ubuntu/+source/edk2/+bug/2040137
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=4641
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-13-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
bc982869dd OvmfPkg/CI: copy shell to virtual drive 
Place the EFI shell as EFI/BOOT/BOOT{ARCH}.EFI on the virtual drive.
This allows the "run to shell" CI test case to work even in case the
shell is not included in the firmware image.

This is needed because an followup patch will exclude the shell from
secure boot enabled firmware images.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-12-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
8d7c48e0e7 OvmfPkg: switch MicrovmX64 to new shell include files 
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-11-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
6bb39cfd00 OvmfPkg: switch IntelTdxX64 to new shell include files 
Note that IntelTdxX64 is compiled without network support, so thanks to
the network conditionals in the include files the build result (network
shell commands excluded) should be identical before and after the patch.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-10-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
a7a0443751 OvmfPkg: switch AmdSevX64 to new shell include files 
Note that AmdSevX64 is compiled without network support, so thanks to
the network conditionals in the include files the build result (network
shell commands excluded) should be identical before and after the patch.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-9-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
796e1b82df OvmfPkg: switch OvmfPkgIa32X64 to new shell include files 
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-8-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
65200edb3a OvmfPkg: switch OvmfPkgIa32 to new shell include files 
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-7-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
bda5b4a6cf OvmfPkg: ShellDxe.fdf.inc: add VariablePolicyDynamicCommand to FV 
Needed to make the new 'varpolicy' EFI shell command
actually available in the OVMF firmware builds.

Fixes: fe6cd1c187 ("OvmfPkg: Add varpolicy shell command")
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-6-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
7f17a15564 OvmfPkg: Shell*.inc: allow building without network support 
Add NETWORK_ENABLE conditionals for the components
which need network support.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-5-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
b25f84d7b3 OvmfPkg: add ShellDxe.fdf.inc 
Move EFI Shell firmware volume files to
the new ShellDxe.fdf.inc file.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-4-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
efca2c6cfc OvmfPkg: add ShellLibs.dsc.inc 
Move EFI Shell libraries from OvmfPkgX64.dsc to
the new ShellComponents.dsc.inc include file.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-3-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gerd Hoffmann
2cb466cc2c OvmfPkg: add ShellComponents.dsc.inc 
Move EFI Shell components from OvmfPkgX64.dsc to
the new ShellComponents.dsc.inc include file.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Message-Id: <20240222101358.67818-2-kraxel@redhat.com>
 2024-02-25 17:38:07 +00:00
Gua Guo
7fa4a984c4 UefiPayloadPkg/Gop: Clean up unused protocol and Guid 
Below Guid is redundant code on UefiPayloadPkg.dec
1. gBmpImageGuid
2. gPlatformGOPPolicyGuid

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: Gua Guo <gua.guo@intel.com>
 2024-02-24 13:13:40 +00:00
Dhaval
11ad164bce UefiPayloadPkg: Make UPL build script arch agnostic 
Current implementation makes assumptions about arch it will be built
for. Need to make it more generic to add follow up support for RISCV.
Right now it does not build for RV until relevant dsc file is available.

Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
 2024-02-23 12:44:58 +00:00
Zhiguang Liu
8ccd63d14d UefiCpuPkg: Fix issue that IsModified is wrongly set in PageTableMap 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4614

About the IsModified, current function doesn't consider that hardware
also may change the pagetable. The issue is that in the first call of
internal function PageTableLibMapInLevel, the function assume page
table is not changed, and add ASSERT to check. But hardware may change
the page table, which cause the ASSERT happens.
Fix the issue by adding addtional condition to only check if the page
table is changed when the software want to modify the page table.
Also, add more comment to explain this behavior.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Crystal Lee <CrystalLee@ami.com.tw>
Cc: Pedro Falcato <pedro.falcato@gmail.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-02-22 03:28:55 +00:00
Zhiguang Liu
c10e5703fe UefiCpuPkg/CpuMpPei: Don't write CR3 in ConvertMemoryPageToNotPresent 
The purpose of writing CR3 in ConvertMemoryPageToNotPresent is just
to flush TLB, because CR3 won't be changed in function
ConvertMemoryPageToNotPresent.
After ConvertMemoryPageToNotPresent, there is always a flush TLB
function. Also, because ConvertMemoryPageToNotPresent in called in a
loop, to improve performance, there is no need to flush TLB
inside ConvertMemoryPageToNotPresent. Just flushing TLB after the loop
is enough.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-02-22 03:28:55 +00:00
Zhiguang Liu
2f4b07b668 UefiCpuPkg/CpuPageTableLib: Enhance function header for PageTableMap() 
PageTableMap() only modifies the PageTable root pointer when creating from zero.
Explicitly explain it in function header.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
 2024-02-22 03:28:55 +00:00
Jiaxin Wu
2ca8d55974 UefiCpuPkg/PiSmmCpuDxeSmm: Check BspIndex first before lock cmpxchg 
This patch is to check BspIndex first before lock cmpxchg operation.
If BspIndex has not been set, then do the lock cmpxchg, otherwise,
the APs don't need to lock cmpxchg the BspIndex value since the BSP
election has been done. It's the optimization to lower the resource
contention caused by the atomic compare exchange operation, so as to
improve the SMI performance for BSP election.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Kinney Michael D <michael.d.kinney@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
 2024-02-21 01:33:51 +00:00
Jiaxin Wu
d698bcfe4f UefiCpuPkg/PiSmmCpuDxeSmm: Avoid BspIndex typecasting 
Use MAX_UINT32 directly instead of typecasting from signed
to unsigned value.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Kinney Michael D <michael.d.kinney@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
 2024-02-21 01:33:51 +00:00
553 changed files with 40484 additions and 4222 deletions
Expand all files Collapse all files

37
.github/workflows/codeql.yml vendored
View File

@ -79,7 +79,7 @@ jobs:
uses: actions/checkout@v4
- name: Install Python
uses: actions/setup-python@v4
uses: actions/setup-python@v5
with:
python-version: '3.11'
cache: 'pip'
@ -136,15 +136,26 @@ jobs:
print(f'ci_setup_supported={str(ci_setup_supported).lower()}', file=fh)
print(f'setup_supported={str(setup_supported).lower()}', file=fh)
- name: Convert Arch to Log Format
id: convert_arch_hyphen
env:
ARCH_LIST: ${{ matrix.ArchList }}
shell: python
run: |
import os
with open(os.environ['GITHUB_OUTPUT'], 'a') as fh:
print(f'arch_list={os.environ["ARCH_LIST"].replace(",", "-")}', file=fh)
- name: Setup
if: steps.get_ci_file_operations.outputs.setup_supported == 'true'
run: stuart_setup -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Upload Setup Log As An Artifact
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v4
if: (success() || failure()) && steps.get_ci_file_operations.outputs.setup_supported == 'true'
with:
name: ${{ matrix.Package }}-Logs
name: ${{ matrix.Package }}-${{ steps.convert_arch_hyphen.outputs.arch_list }}-Setup-Log
path: |
**/SETUPLOG.txt
retention-days: 7
@ -155,10 +166,10 @@ jobs:
run: stuart_ci_setup -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Upload CI Setup Log As An Artifact
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v4
if: (success() || failure()) && steps.get_ci_file_operations.outputs.ci_setup_supported == 'true'
with:
name: ${{ matrix.Package }}-Logs
name: ${{ matrix.Package }}-${{ steps.convert_arch_hyphen.outputs.arch_list }}-CI-Setup-Log
path: |
**/CISETUP.txt
retention-days: 7
@ -168,10 +179,10 @@ jobs:
run: stuart_update -c .pytool/CISettings.py -t DEBUG -a ${{ matrix.ArchList }} TOOL_CHAIN_TAG=VS2019
- name: Upload Update Log As An Artifact
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v4
if: success() || failure()
with:
name: ${{ matrix.Package }}-Logs
name: ${{ matrix.Package }}-${{ steps.convert_arch_hyphen.outputs.arch_list }}-Update-Log
path: |
**/UPDATE_LOG.txt
retention-days: 7
@ -228,7 +239,7 @@ jobs:
- name: Attempt to Load CodeQL CLI From Cache
id: codeqlcli_cache
uses: actions/cache@v3
uses: actions/cache@v4
with:
path: ${{ steps.cache_key_gen.outputs.codeql_cli_ext_dep_dir }}
key: ${{ steps.cache_key_gen.outputs.codeql_cli_cache_key }}
@ -284,10 +295,10 @@ jobs:
delete_dirs(build_path)
- name: Upload Build Logs As An Artifact
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v4
if: success() || failure()
with:
name: ${{ matrix.Package }}-Logs
name: ${{ matrix.Package }}-${{ steps.convert_arch_hyphen.outputs.arch_list }}-Build-Logs
path: |
**/BUILD_REPORT.TXT
**/OVERRIDELOG.TXT
@ -329,10 +340,10 @@ jobs:
print(f'upload_sarif_file=false', file=fh)
- name: Upload CodeQL Results (SARIF) As An Artifact
uses: actions/upload-artifact@v3
uses: actions/upload-artifact@v4
if: steps.env_data.outputs.upload_sarif_file == 'true'
with:
name: ${{ matrix.Package }}-CodeQL-SARIF
name: ${{ matrix.Package }}-${{ steps.convert_arch_hyphen.outputs.arch_list }}-CodeQL-SARIF
path: |
${{ steps.env_data.outputs.emacs_file_path }}
${{ steps.env_data.outputs.sarif_file_path }}
@ -340,7 +351,7 @@ jobs:
if-no-files-found: warn
- name: Upload CodeQL Results (SARIF) To GitHub Code Scanning
uses: github/codeql-action/upload-sarif@v2
uses: github/codeql-action/upload-sarif@v3
if: steps.env_data.outputs.upload_sarif_file == 'true'
with:
# Path to SARIF file relative to the root of the repository.

3
.gitmodules vendored
View File

@ -35,3 +35,6 @@
[submodule "CryptoPkg/Library/MbedTlsLib/mbedtls"]
path = CryptoPkg/Library/MbedTlsLib/mbedtls
url = https://github.com/ARMmbed/mbedtls
[submodule "SecurityPkg/DeviceSecurity/SpdmLib/libspdm"]
path = SecurityPkg/DeviceSecurity/SpdmLib/libspdm
url = https://github.com/DMTF/libspdm.git

2
.pytool/CISettings.py
View File

@ -237,6 +237,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, SetupSettingsManag
"MdePkg/Library/MipiSysTLib/mipisyst", False))
rs.append(RequiredSubmodule(
"CryptoPkg/Library/MbedTlsLib/mbedtls", False))
rs.append(RequiredSubmodule(
"SecurityPkg/DeviceSecurity/SpdmLib/libspdm", False))
return rs
def GetName(self):

10
ArmPkg/ArmPkg.dec
View File

@ -139,11 +139,6 @@
# Define if the GICv3 controller should use the GICv2 legacy
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
## Define the conduit to use for monitor calls.
# Default PcdMonitorConduitHvc = FALSE, conduit = SMC
# If PcdMonitorConduitHvc = TRUE, conduit = HVC
gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047
# Whether to remap all unused memory NX before installing the CPU arch
# protocol driver. This is needed on platforms that map all DRAM with RWX
# attributes initially, and can be disabled otherwise.
@ -317,6 +312,11 @@
gArmTokenSpaceGuid.PcdSystemBiosRelease|0xFFFF|UINT16|0x30000058
gArmTokenSpaceGuid.PcdEmbeddedControllerFirmwareRelease|0xFFFF|UINT16|0x30000059
## Define the conduit to use for monitor calls.
# Default PcdMonitorConduitHvc = FALSE, conduit = SMC
# If PcdMonitorConduitHvc = TRUE, conduit = HVC
gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x00000047
[PcdsFixedAtBuild.common, PcdsDynamic.common]
#
# ARM Architectural Timer

44
ArmPkg/Include/Chipset/ArmCortexA5x.h
View File

@ -1,44 +0,0 @@
/** @file
Copyright (c) 2012 - 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARM_CORTEX_A5X_H_
#define ARM_CORTEX_A5X_H_
//
// Cortex A5x feature bit definitions
//
#define A5X_FEATURE_SMP (1 << 6)
//
// Helper functions to access CPU Extended Control Register
//
UINT64
EFIAPI
ArmReadCpuExCr (
VOID
);
VOID
EFIAPI
ArmWriteCpuExCr (
IN UINT64 Val
);
VOID
EFIAPI
ArmSetCpuExCrBit (
IN UINT64 Bits
);
VOID
EFIAPI
ArmUnsetCpuExCrBit (
IN UINT64 Bits
);
#endif // ARM_CORTEX_A5X_H_

57
ArmPkg/Include/Chipset/ArmCortexA9.h
View File

@ -1,57 +0,0 @@
/** @file
Copyright (c) 2011, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef ARM_CORTEX_A9_H_
#define ARM_CORTEX_A9_H_
#include <Chipset/ArmV7.h>
//
// Cortex A9 feature bit definitions
//
#define A9_FEATURE_PARITY (1<<9)
#define A9_FEATURE_AOW (1<<8)
#define A9_FEATURE_EXCL (1<<7)
#define A9_FEATURE_SMP (1<<6)
#define A9_FEATURE_FOZ (1<<3)
#define A9_FEATURE_DPREF (1<<2)
#define A9_FEATURE_HINT (1<<1)
#define A9_FEATURE_FWD (1<<0)
//
// Cortex A9 Watchdog
//
#define ARM_A9_WATCHDOG_REGION 0x600
#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
#define ARM_A9_WATCHDOG_ENABLE 1
//
// SCU register offsets & masks
//
#define A9_SCU_CONTROL_OFFSET 0x0
#define A9_SCU_CONFIG_OFFSET 0x4
#define A9_SCU_INVALL_OFFSET 0xC
#define A9_SCU_FILT_START_OFFSET 0x40
#define A9_SCU_FILT_END_OFFSET 0x44
#define A9_SCU_SACR_OFFSET 0x50
#define A9_SCU_SSACR_OFFSET 0x54
UINTN
EFIAPI
ArmGetScuBaseAddress (
VOID
);
#endif // ARM_CORTEX_A9_H_

14
ArmPkg/Include/Library/ArmGicArchLib.h
View File

@ -1,9 +1,15 @@
/** @file
*
* Copyright (c) 2015, Linaro Ltd. All rights reserved.
* Copyright (c) 2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
* @par Reference(s):
* - Arm Generic Interrupt Controller Architecture Specification,
* Issue H, January 2022.
* (https://developer.arm.com/documentation/ihi0069/)
*
**/
#ifndef ARM_GIC_ARCH_LIB_H_
@ -23,4 +29,12 @@ ArmGicGetSupportedArchRevision (
VOID
);
//
// GIC SPI and extended SPI ranges
//
#define ARM_GIC_ARCH_SPI_MIN 32
#define ARM_GIC_ARCH_SPI_MAX 1019
#define ARM_GIC_ARCH_EXT_SPI_MIN 4096
#define ARM_GIC_ARCH_EXT_SPI_MAX 5119
#endif // ARM_GIC_ARCH_LIB_H_

2
ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
View File

@ -26,7 +26,7 @@ ArmMonitorCall (
IN OUT ARM_MONITOR_ARGS *Args
)
{
if (FeaturePcdGet (PcdMonitorConduitHvc)) {
if (PcdGetBool (PcdMonitorConduitHvc)) {
ArmCallHvc ((ARM_HVC_ARGS *)Args);
} else {
ArmCallSmc ((ARM_SMC_ARGS *)Args);

10
ArmPlatformPkg/PrePeiCore/PrePeiCore.h
View File

@ -73,14 +73,4 @@ PeiCommonExceptionEntry (
IN UINTN LR
);
/*
* Autogenerated function that calls the library constructors for all of the
* module's dependent libraries.
*/
VOID
EFIAPI
ProcessLibraryConstructorList (
VOID
);
#endif

2
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
View File

@ -8,7 +8,7 @@
#**/
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = ArmPlatformPrePeiCore
FILE_GUID = b78d02bb-d0b5-4389-bc7f-b39ee846c784
MODULE_TYPE = SEC

2
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
View File

@ -8,7 +8,7 @@
#**/
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = ArmPlatformPrePeiCore
FILE_GUID = 469fc080-aec1-11df-927c-0002a5d5c51b
MODULE_TYPE = SEC

2
ArmPlatformPkg/PrePi/PeiMPCore.inf
View File

@ -8,7 +8,7 @@
#**/
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = ArmPlatformPrePiMPCore
FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
MODULE_TYPE = SEC

2
ArmPlatformPkg/PrePi/PeiUniCore.inf
View File

@ -9,7 +9,7 @@
#**/
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = ArmPlatformPrePiUniCore
FILE_GUID = 3e401783-cc94-4fcd-97bc-bd35ac369d2f
MODULE_TYPE = SEC

6
ArmPlatformPkg/PrePi/PrePi.h
View File

@ -79,10 +79,4 @@ ArchInitialize (
VOID
);
VOID
EFIAPI
ProcessLibraryConstructorList (
VOID
);
#endif /* _PREPI_H_ */

5
ArmVirtPkg/ArmVirt.dsc.inc
View File

@ -156,7 +156,9 @@
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
!endif
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
RngLib|MdeModulePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf
ArmTrngLib|ArmPkg/Library/ArmTrngLib/ArmTrngLib.inf
ArmMonitorLib|ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf
#
# Secure Boot dependencies
@ -266,6 +268,7 @@
[LibraryClasses.ARM]
ArmSoftFloatLib|ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
[BuildOptions]
GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG

3
ArmVirtPkg/ArmVirtCloudHv.dsc
View File

@ -201,6 +201,9 @@
[PcdsDynamicHii]
gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|L"ForceNoAcpi"|gOvmfVariableGuid|0x0|FALSE|NV,BS
[PcdsPatchableInModule.common]
gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform

4
ArmVirtPkg/ArmVirtKvmTool.dsc
View File

@ -126,8 +126,6 @@
# Use MMIO for accessing RTC controller registers.
gPcAtChipsetPkgTokenSpaceGuid.PcdRtcUseMmio|TRUE
gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
[PcdsFixedAtBuild.common]
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
@ -167,6 +165,8 @@
#
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16
gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
[PcdsPatchableInModule.common]
#
# This will be overridden in the code

24
ArmVirtPkg/ArmVirtQemu.dsc
View File

@ -49,10 +49,10 @@
!include NetworkPkg/NetworkDefines.dsc.inc
!include ArmVirtPkg/ArmVirt.dsc.inc
!include MdePkg/MdeLibs.dsc.inc
!include ArmVirtPkg/ArmVirt.dsc.inc
[LibraryClasses.common]
ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
@ -60,7 +60,7 @@
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
@ -124,8 +124,6 @@
[BuildOptions]
!if $(CAVIUM_ERRATUM_27456) == TRUE
GCC:*_*_AARCH64_PP_FLAGS = -DCAVIUM_ERRATUM_27456
!else
GCC:*_*_AARCH64_CC_XIPFLAGS ==
!endif
!include NetworkPkg/NetworkBuildOptions.dsc.inc
@ -295,6 +293,10 @@
gEfiNetworkPkgTokenSpaceGuid.PcdIPv4PXESupport|0x01
gEfiNetworkPkgTokenSpaceGuid.PcdIPv6PXESupport|0x01
# whether to use HVC or SMC to issue monitor calls - this typically depends
# on the exception level at which the UEFI system firmware executes
gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
#
# TPM2 support
#
@ -320,11 +322,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5
[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM]
!if $(TPM2_ENABLE) == TRUE
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
!else
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
!endif
################################################################################
#
@ -341,11 +339,11 @@
ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf
ArmPkg/Drivers/CpuPei/CpuPei.inf
!if $(TPM2_ENABLE) == TRUE
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
}
!if $(TPM2_ENABLE) == TRUE
MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf {
<LibraryClasses>
ResetSystemLib|ArmVirtPkg/Library/ArmVirtPsciResetSystemPeiLib/ArmVirtPsciResetSystemPeiLib.inf
@ -434,6 +432,7 @@
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
#
# Status Code Routing
@ -556,6 +555,11 @@
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
#
# Hash2 Protocol Support
#
SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf
#
# TPM2 support
#

2
ArmVirtPkg/ArmVirtQemu.fdf
View File

@ -111,8 +111,8 @@ READ_LOCK_STATUS = TRUE
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
!if $(TPM2_ENABLE) == TRUE
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
!if $(TPM2_ENABLE) == TRUE
INF MdeModulePkg/Universal/ResetSystemPei/ResetSystemPei.inf
INF OvmfPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf

6
ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc
View File

@ -75,6 +75,7 @@ READ_LOCK_STATUS = TRUE
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
INF OvmfPkg/VirtNorFlashDxe/VirtNorFlashDxe.inf
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
#
# FAT filesystem + GPT/MBR partitioning + UDF filesystem + virtio-fs
@ -177,6 +178,11 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
#
# Hash2 Protocol producer
#
INF SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf
#
# TPM2 support
#

14
ArmVirtPkg/ArmVirtQemuKernel.dsc
View File

@ -46,10 +46,10 @@
!include NetworkPkg/NetworkDefines.dsc.inc
!include ArmVirtPkg/ArmVirt.dsc.inc
!include MdePkg/MdeLibs.dsc.inc
!include ArmVirtPkg/ArmVirt.dsc.inc
[LibraryClasses.common]
ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
@ -57,7 +57,7 @@
# Virtio Support
VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
@ -203,6 +203,8 @@
gArmTokenSpaceGuid.PcdFdBaseAddress|0x0
gArmTokenSpaceGuid.PcdFvBaseAddress|0x0
gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
[PcdsDynamicDefault.common]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3
@ -339,6 +341,7 @@
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
}
MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
#
# Status Code Routing
@ -461,6 +464,11 @@
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
#
# Hash2 Protocol Support
#
SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf
#
# ACPI Support
#

6
ArmVirtPkg/ArmVirtXen.dsc
View File

@ -23,10 +23,10 @@
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = ArmVirtPkg/ArmVirtXen.fdf
!include ArmVirtPkg/ArmVirt.dsc.inc
!include MdePkg/MdeLibs.dsc.inc
!include ArmVirtPkg/ArmVirt.dsc.inc
[LibraryClasses]
SerialPortLib|OvmfPkg/Library/XenConsoleSerialPortLib/XenConsoleSerialPortLib.inf
!if $(TARGET) != RELEASE
@ -120,6 +120,8 @@
gArmTokenSpaceGuid.PcdFdBaseAddress|0x0
gArmTokenSpaceGuid.PcdFvBaseAddress|0x0
gArmTokenSpaceGuid.PcdMonitorConduitHvc|TRUE
[PcdsDynamicDefault.common]
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|0x0

14
ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.c
View File

@ -18,6 +18,8 @@
#include <Library/FdtSerialPortAddressLib.h>
#include <libfdt.h>
#include <Chipset/AArch64.h>
#include <Guid/EarlyPL011BaseAddress.h>
#include <Guid/FdtHob.h>
@ -224,5 +226,17 @@ PlatformPeim (
BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
#ifdef MDE_CPU_AARCH64
//
// Set the SMCCC conduit to SMC if executing at EL2, which is typically the
// exception level that services HVCs rather than the one that invokes them.
//
if (ArmReadCurrentEL () == AARCH64_EL2) {
Status = PcdSetBoolS (PcdMonitorConduitHvc, FALSE);
ASSERT_EFI_ERROR (Status);
}
#endif
return EFI_SUCCESS;
}

1
ArmVirtPkg/Library/PlatformPeiLib/PlatformPeiLib.inf
View File

@ -45,6 +45,7 @@
[Pcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdMonitorConduitHvc
gEfiSecurityPkgTokenSpaceGuid.PcdTpmBaseAddress ## SOMETIMES_PRODUCES
gUefiOvmfPkgTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress

2
ArmVirtPkg/PlatformCI/PlatformBuildLib.py
View File

@ -240,6 +240,8 @@ class PlatformBuilder(UefiBuilder, BuildSettingsManager):
args += " -serial stdio"
# Mount disk with startup.nsh
args += f" -drive file=fat:rw:{VirtualDrive},format=raw,media=disk"
# Provides Rng services to the Guest VM
args += " -device virtio-rng-pci"
# Conditional Args
if (self.env.GetValue("QEMU_HEADLESS").upper() == "TRUE"):

2
ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
View File

@ -8,7 +8,7 @@
#**/
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = ArmVirtPrePiUniCoreRelocatable
FILE_GUID = f7d9fd14-9335-4389-80c5-334d6abfcced
MODULE_TYPE = SEC

6
ArmVirtPkg/PrePi/PrePi.c
View File

@ -22,12 +22,6 @@
#include "PrePi.h"
VOID
EFIAPI
ProcessLibraryConstructorList (
VOID
);
VOID
PrePiMain (
IN UINTN UefiMemoryBase,

37
ArmVirtPkg/XenAcpiPlatformDxe/XenAcpiPlatformDxe.c
View File

@ -128,10 +128,12 @@ InstallXenArmTables (
EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE *FadtTable;
EFI_ACPI_DESCRIPTION_HEADER *DsdtTable;
EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *FacsTable;
XenAcpiRsdpStructurePtr = NULL;
FadtTable = NULL;
DsdtTable = NULL;
FacsTable = NULL;
TableHandle = 0;
NumberOfTableEntries = 0;
@ -191,6 +193,8 @@ InstallXenArmTables (
FadtTable = (EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE *)
(UINTN)CurrentTablePointer;
DsdtTable = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)FadtTable->Dsdt;
FacsTable = (EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)
(UINTN)FadtTable->FirmwareCtrl;
}
}
}
@ -198,14 +202,31 @@ InstallXenArmTables (
//
// Install DSDT table.
//
Status = AcpiProtocol->InstallAcpiTable (
AcpiProtocol,
DsdtTable,
DsdtTable->Length,
&TableHandle
);
if (EFI_ERROR (Status)) {
return Status;
if (DsdtTable != NULL) {
Status = AcpiProtocol->InstallAcpiTable (
AcpiProtocol,
DsdtTable,
DsdtTable->Length,
&TableHandle
);
if (EFI_ERROR (Status)) {
return Status;
}
}
//
// Install FACS table.
//
if (FacsTable != NULL) {
Status = AcpiProtocol->InstallAcpiTable (
AcpiProtocol,
FacsTable,
FacsTable->Length,
&TableHandle
);
if (EFI_ERROR (Status)) {
return Status;
}
}
return EFI_SUCCESS;

6
BaseTools/Plugin/CodeQL/codeqlcli_ext_dep.yaml
View File

@ -16,9 +16,9 @@
"scope": "codeql-ext-dep",
"type": "web",
"name": "codeql_cli",
"source": "https://github.com/github/codeql-cli-binaries/releases/download/v2.12.4/codeql.zip",
"version": "2.12.4",
"sha256": "f682f1155d627ad97f10b1bcad97f682011986717bd3823e9cf831ed83ac96e7",
"source": "https://github.com/github/codeql-cli-binaries/releases/download/v2.17.3/codeql.zip",
"version": "2.17.3",
"sha256": "e5ac1d87ab38e405c9af5db234a338b10dffabc98a648903f1664dd2a566dfd5",
"compression_type": "zip",
"internal_path": "/codeql/",
"flags": ["set_shell_var", ],

6
BaseTools/Plugin/CodeQL/codeqlcli_linux_ext_dep.yaml
View File

@ -14,9 +14,9 @@
"scope": "codeql-linux-ext-dep",
"type": "web",
"name": "codeql_linux_cli",
"source": "https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-linux64.zip",
"version": "2.14.5",
"sha256": "72aa5d748ff9ab57cfd86045560683bdc4897e0fe6d9f9a2786d9394674ae733",
"source": "https://github.com/github/codeql-cli-binaries/releases/download/v2.17.3/codeql-linux64.zip",
"version": "2.17.3",
"sha256": "9fba000c4b821534d354bc16821aa066fdb1304446226ea449870e64a8ad3c7a",
"compression_type": "zip",
"internal_path": "/codeql/",
"flags": ["set_shell_var", ],

6
BaseTools/Plugin/CodeQL/codeqlcli_windows_ext_dep.yaml
View File

@ -14,9 +14,9 @@
"scope": "codeql-windows-ext-dep",
"type": "web",
"name": "codeql_windows_cli",
"source": "https://github.com/github/codeql-cli-binaries/releases/download/v2.14.5/codeql-win64.zip",
"version": "2.14.5",
"sha256": "861fcb38365cc311efee0c3a28c77494e93c69a969885b72e53173ad473f61aa",
"source": "https://github.com/github/codeql-cli-binaries/releases/download/v2.17.3/codeql-win64.zip",
"version": "2.17.3",
"sha256": "4c6fbf2ea2eaf0f47bf0347eacf54c6b9d6bdf7acb6b63e17f9e6f2dd83b34e7",
"compression_type": "zip",
"internal_path": "/codeql/",
"flags": ["set_shell_var", ],

2
BaseTools/Scripts/GetUtcDateTime.py
View File

@ -29,7 +29,7 @@ def Main():
print ("ERROR: At least one argument is required!\n")
PARSER.print_help()
today = datetime.datetime.utcnow()
today = datetime.datetime.now(datetime.timezone.utc)
if ARGS.year:
ReversedNumber = str(today.year)[::-1]
print (''.join(hex(ord(HexString))[2:] for HexString in ReversedNumber))

91
BaseTools/Scripts/PatchCheck.py
View File

@ -28,6 +28,7 @@ class Verbose:
class PatchCheckConf:
ignore_change_id = False
ignore_multi_package = False
class EmailAddressCheck:
"""Checks an email address."""
@ -85,7 +86,11 @@ class EmailAddressCheck:
self.error("The email address cannot contain a space: " +
mo.group(3))
if ' via Groups.Io' in name and mo.group(3).endswith('@groups.io'):
if mo.group(3) == 'devel@edk2.groups.io':
self.error("Email rewritten by lists DMARC / DKIM / SPF: " +
email)
if ' via groups.io' in name.lower() and mo.group(3).endswith('@groups.io'):
self.error("Email rewritten by lists DMARC / DKIM / SPF: " +
email)
@ -94,6 +99,7 @@ class CommitMessageCheck:
def __init__(self, subject, message, author_email):
self.ok = True
self.ignore_multi_package = False
if subject is None and message is None:
self.error('Commit message is missing!')
@ -116,6 +122,7 @@ class CommitMessageCheck:
self.check_overall_format()
if not PatchCheckConf.ignore_change_id:
self.check_change_id_format()
self.check_ci_options_format()
self.report_message_result()
url = 'https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format'
@ -198,7 +205,7 @@ class CommitMessageCheck:
if s[2] != ' ':
self.error("There should be a space after '" + sig + ":'")
EmailAddressCheck(s[3], sig)
self.ok &= EmailAddressCheck(s[3], sig).ok
return sigs
@ -225,8 +232,10 @@ class CommitMessageCheck:
)
def check_misc_signatures(self):
for sig in self.sig_types:
self.find_signatures(sig)
for sigtype in self.sig_types:
sigs = self.find_signatures(sigtype)
if sigtype == 'Cc' and len(sigs) == 0:
self.error('No Cc: tags for maintainers/reviewers found!')
cve_re = re.compile('CVE-[0-9]{4}-[0-9]{5}[^0-9]')
@ -318,6 +327,15 @@ class CommitMessageCheck:
self.error('\"%s\" found in commit message:' % cid)
return
def check_ci_options_format(self):
cio='Continuous-integration-options:'
for line in self.msg.splitlines():
if not line.startswith(cio):
continue
options = line.split(':', 1)[1].split()
if 'PatchCheck.ignore-multi-package' in options:
self.ignore_multi_package = True
(START, PRE_PATCH, PATCH) = range(3)
class GitDiffCheck:
@ -555,6 +573,7 @@ class CheckOnePatch:
msg_check = CommitMessageCheck(self.commit_subject, self.commit_msg, self.author_email)
msg_ok = msg_check.ok
self.ignore_multi_package = msg_check.ignore_multi_package
diff_ok = True
if self.diff is not None:
@ -665,6 +684,7 @@ class CheckGitCommits:
"""
def __init__(self, rev_spec, max_count):
dec_files = self.read_dec_files_from_git()
commits = self.read_commit_list_from_git(rev_spec, max_count)
if len(commits) == 1 and Verbose.level > Verbose.ONELINE:
commits = [ rev_spec ]
@ -680,10 +700,66 @@ class CheckGitCommits:
email = self.read_committer_email_address_from_git(commit)
self.ok &= EmailAddressCheck(email, 'Committer').ok
patch = self.read_patch_from_git(commit)
self.ok &= CheckOnePatch(commit, patch).ok
check_patch = CheckOnePatch(commit, patch)
self.ok &= check_patch.ok
ignore_multi_package = check_patch.ignore_multi_package
if PatchCheckConf.ignore_multi_package:
ignore_multi_package = True
prefix = 'WARNING: ' if ignore_multi_package else ''
check_parent = self.check_parent_packages (dec_files, commit, prefix)
if not ignore_multi_package:
self.ok &= check_parent
if not commits:
print("Couldn't find commit matching: '{}'".format(rev_spec))
def check_parent_packages(self, dec_files, commit, prefix):
ok = True
modified = self.get_parent_packages (dec_files, commit, 'AM')
if len (modified) > 1:
print("{}The commit adds/modifies files in multiple packages:".format(prefix))
print(" *", '\n * '.join(modified))
ok = False
deleted = self.get_parent_packages (dec_files, commit, 'D')
if len (deleted) > 1:
print("{}The commit deletes files from multiple packages:".format(prefix))
print(" *", '\n * '.join(deleted))
ok = False
return ok
def get_parent_packages(self, dec_files, commit, filter):
filelist = self.read_files_modified_from_git (commit, filter)
parents = set()
for file in filelist:
dec_found = False
for dec_file in dec_files:
if os.path.commonpath([dec_file, file]):
dec_found = True
parents.add(dec_file)
if not dec_found and os.path.dirname (file):
# No DEC file found and file is in a subdir
# Covers BaseTools, .github, .azurepipelines, .pytool
parents.add(file.split('/')[0])
return list(parents)
def read_dec_files_from_git(self):
# run git ls-files *.dec
out = self.run_git('ls-files', '*.dec')
# return list of .dec files
try:
return out.split()
except:
return []
def read_files_modified_from_git(self, commit, filter):
# run git diff-tree --no-commit-id --name-only -r <commit>
out = self.run_git('diff-tree', '--no-commit-id', '--name-only',
'--diff-filter=' + filter, '-r', commit)
try:
return out.split()
except:
return []
def read_commit_list_from_git(self, rev_spec, max_count):
# Run git to get the commit patch
cmd = [ 'rev-list', '--abbrev-commit', '--no-walk' ]
@ -794,6 +870,9 @@ class PatchCheckApp:
group.add_argument("--ignore-change-id",
action="store_true",
help="Ignore the presence of 'Change-Id:' tags in commit message")
group.add_argument("--ignore-multi-package",
action="store_true",
help="Ignore if commit modifies files in multiple packages")
self.args = parser.parse_args()
if self.args.oneline:
Verbose.level = Verbose.ONELINE
@ -801,6 +880,8 @@ class PatchCheckApp:
Verbose.level = Verbose.SILENT
if self.args.ignore_change_id:
PatchCheckConf.ignore_change_id = True
if self.args.ignore_multi_package:
PatchCheckConf.ignore_multi_package = True
if __name__ == "__main__":
sys.exit(PatchCheckApp().retval)

12
BaseTools/Source/C/Include/Common/UefiInternalFormRepresentation.h
View File

@ -1556,7 +1556,17 @@ typedef enum {
EfiKeyF12,
EfiKeyPrint,
EfiKeySLck,
EfiKeyPause
EfiKeyPause,
EfiKeyIntl0,
EfiKeyIntl1,
EfiKeyIntl2,
EfiKeyIntl3,
EfiKeyIntl4,
EfiKeyIntl5,
EfiKeyIntl6,
EfiKeyIntl7,
EfiKeyIntl8,
EfiKeyIntl9
} EFI_KEY;
typedef struct {

8
BaseTools/Source/Python/AutoGen/GenC.py
View File

@ -1371,6 +1371,14 @@ def CreateLibraryConstructorCode(Info, AutoGenC, AutoGenH):
else:
if Info.ModuleType in [SUP_MODULE_BASE, SUP_MODULE_SEC, SUP_MODULE_USER_DEFINED, SUP_MODULE_HOST_APPLICATION]:
AutoGenC.Append(gLibraryString[SUP_MODULE_BASE].Replace(Dict))
if Info.ModuleType == SUP_MODULE_SEC and Info.AutoGenVersion >= 0x0001001E:
AutoGenH.Append(("\n"
"// ProcessLibraryConstructorList() declared here because SEC has no standard entry point.\n"
"VOID\n"
"EFIAPI\n"
"ProcessLibraryConstructorList (\n"
" VOID\n"
" );\n"))
elif Info.ModuleType in SUP_MODULE_SET_PEI:
AutoGenC.Append(gLibraryString['PEI'].Replace(Dict))
elif Info.ModuleType in [SUP_MODULE_DXE_CORE, SUP_MODULE_DXE_DRIVER, SUP_MODULE_DXE_SMM_DRIVER, SUP_MODULE_DXE_RUNTIME_DRIVER,

2
BaseTools/Source/Python/FMMT/FMMT.py
View File

@ -37,7 +37,7 @@ parser.add_argument("-l", "--LayoutFileName", dest="LayoutFileName", nargs='+',
the file will be generated with default name (Layout_'InputFileName'.txt). \
Currently supports two formats: json, txt. More formats will be added in the future")
parser.add_argument("-c", "--ConfigFilePath", dest="ConfigFilePath", nargs='+',
help="Provide the target FmmtConf.ini file path: '-c C:\Code\FmmtConf.ini' \
help="Provide the target FmmtConf.ini file path: '-c C:\\Code\\FmmtConf.ini' \
FmmtConf file saves the target guidtool used in compress/uncompress process.\
If do not provide, FMMT tool will search the inputfile folder for FmmtConf.ini firstly, if not found,\
the FmmtConf.ini saved in FMMT tool's folder will be used as default.")

3
BaseTools/Source/Python/GenFds/Capsule.py
View File

@ -1,6 +1,7 @@
## @file
# generate capsule
#
# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.<BR>
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
@ -78,6 +79,8 @@ class Capsule (CapsuleClassObject):
Flags |= 0x00010000
elif flag == 'InitiateReset':
Flags |= 0x00040000
if 'OEM_CAPSULE_FLAGS' in self.TokensDict:
Flags |= int(self.TokensDict['OEM_CAPSULE_FLAGS'],16)
Header.write(pack('=I', Flags))
#
# typedef struct {

12
BaseTools/Source/Python/GenFds/FfsInfStatement.py
View File

@ -19,6 +19,7 @@ from .GenFdsGlobalVariable import GenFdsGlobalVariable
from .Ffs import SectionSuffix,FdfFvFileTypeToFileType
import subprocess
import sys
from pathlib import Path
from . import Section
from . import RuleSimpleFile
from . import RuleComplexFile
@ -92,7 +93,7 @@ class FfsInfStatement(FfsInfStatementClassObject):
if ModuleType != SUP_MODULE_USER_DEFINED and ModuleType != SUP_MODULE_HOST_APPLICATION:
for LibraryClass in PlatformDataBase.LibraryClasses.GetKeys():
if LibraryClass.startswith("NULL") and PlatformDataBase.LibraryClasses[LibraryClass, ModuleType]:
if LibraryClass.startswith("NULL") and LibraryClass[4:].isdigit() and PlatformDataBase.LibraryClasses[LibraryClass, ModuleType]:
self.InfModule.LibraryClasses[LibraryClass] = PlatformDataBase.LibraryClasses[LibraryClass, ModuleType]
StrModule = str(self.InfModule)
@ -100,7 +101,7 @@ class FfsInfStatement(FfsInfStatementClassObject):
if StrModule in PlatformDataBase.Modules:
PlatformModule = PlatformDataBase.Modules[StrModule]
for LibraryClass in PlatformModule.LibraryClasses:
if LibraryClass.startswith("NULL"):
if LibraryClass.startswith("NULL") and LibraryClass[4:].isdigit():
self.InfModule.LibraryClasses[LibraryClass] = PlatformModule.LibraryClasses[LibraryClass]
DependencyList = [self.InfModule]
@ -156,7 +157,12 @@ class FfsInfStatement(FfsInfStatementClassObject):
if len(self.InfFileName) > 1 and self.InfFileName[0] == '\\' and self.InfFileName[1] == '\\':
pass
elif self.InfFileName[0] == '\\' or self.InfFileName[0] == '/' :
self.InfFileName = self.InfFileName[1:]
ws_path = Path(GenFdsGlobalVariable.WorkSpaceDir)
inf_path = Path(self.InfFileName)
if ws_path in inf_path.parents:
self.InfFileName = str(inf_path.relative_to(ws_path))
else:
self.InfFileName = self.InfFileName[1:]
if self.InfFileName.find('$') == -1:
InfPath = NormPath(self.InfFileName)

2
BaseTools/Source/Python/Workspace/DscBuildData.py
View File

@ -3033,7 +3033,7 @@ class DscBuildData(PlatformBuildClassObject):
StructuredPcdsData["OBJECTS"][include_file] = os.path.getmtime(include_file)
MakeApp += "$(OBJECTS) : %s\n" % include_file
if sys.platform == "win32":
PcdValueCommonPath = os.path.normpath(mws.join(GlobalData.gGlobalDefines["EDK_TOOLS_PATH"], "Source\C\Common\PcdValueCommon.c"))
PcdValueCommonPath = os.path.normpath(mws.join(GlobalData.gGlobalDefines["EDK_TOOLS_PATH"], "Source\\C\\Common\\PcdValueCommon.c"))
MakeApp = MakeApp + '%s\\PcdValueCommon.c : %s\n' % (self.OutputPath, PcdValueCommonPath)
MakeApp = MakeApp + '\tcopy /y %s $@\n' % (PcdValueCommonPath)
else:

8
BaseTools/Source/Python/Workspace/WorkspaceCommon.py
View File

@ -102,12 +102,12 @@ def GetModuleLibInstances(Module, Platform, BuildDatabase, Arch, Target, Toolcha
#
if Module.ModuleType != SUP_MODULE_USER_DEFINED:
for LibraryClass in Platform.LibraryClasses.GetKeys():
if LibraryClass.startswith("NULL") and Platform.LibraryClasses[LibraryClass, Module.ModuleType]:
if LibraryClass.startswith("NULL") and LibraryClass[4:].isdigit() and Platform.LibraryClasses[LibraryClass, Module.ModuleType]:
Module.LibraryClasses[LibraryClass] = Platform.LibraryClasses[LibraryClass, Module.ModuleType]
# add forced library instances (specified in module overrides)
for LibraryClass in Platform.Modules[str(Module)].LibraryClasses:
if LibraryClass.startswith("NULL"):
if LibraryClass.startswith("NULL") and LibraryClass[4:].isdigit():
Module.LibraryClasses[LibraryClass] = Platform.Modules[str(Module)].LibraryClasses[LibraryClass]
# EdkII module
@ -123,6 +123,8 @@ def GetModuleLibInstances(Module, Platform, BuildDatabase, Arch, Target, Toolcha
while len(LibraryConsumerList) > 0:
M = LibraryConsumerList.pop()
for LibraryClassName in M.LibraryClasses:
if LibraryClassName.startswith("NULL") and LibraryClassName[4:].isdigit() and bool(M.LibraryClass):
continue
if LibraryClassName not in LibraryInstance:
# override library instance for this module
LibraryPath = Platform.Modules[str(Module)].LibraryClasses.get(LibraryClassName,Platform.LibraryClasses[LibraryClassName, ModuleType])
@ -139,7 +141,7 @@ def GetModuleLibInstances(Module, Platform, BuildDatabase, Arch, Target, Toolcha
LibraryModule = BuildDatabase[LibraryPath, Arch, Target, Toolchain]
# for those forced library instance (NULL library), add a fake library class
if LibraryClassName.startswith("NULL"):
if LibraryClassName.startswith("NULL") and LibraryClassName[4:].isdigit():
LibraryModule.LibraryClass.append(LibraryClassObject(LibraryClassName, [ModuleType]))
elif LibraryModule.LibraryClass is None \
or len(LibraryModule.LibraryClass) == 0 \

130
CryptoPkg/Driver/Crypto.c
View File

@ -3589,6 +3589,131 @@ CryptoServicePkcs1v2Encrypt (
return CALL_BASECRYPTLIB (Pkcs.Services.Pkcs1v2Encrypt, Pkcs1v2Encrypt, (PublicKey, PublicKeySize, InData, InDataSize, PrngSeed, PrngSeedSize, EncryptedData, EncryptedDataSize), FALSE);
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
CryptoServiceRsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
return CALL_BASECRYPTLIB (Rsa.Services.RsaOaepEncrypt, RsaOaepEncrypt, (RsaContext, InData, InDataSize, PrngSeed, PrngSeedSize, DigestLen, EncryptedData, EncryptedDataSize), FALSE);
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
CryptoServicePkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
return CALL_BASECRYPTLIB (Pkcs.Services.Pkcs1v2Decrypt, Pkcs1v2Decrypt, (PrivateKey, PrivateKeySize, EncryptedData, EncryptedDataSize, OutData, OutDataSize), FALSE);
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
CryptoServiceRsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
return CALL_BASECRYPTLIB (Rsa.Services.RsaOaepDecrypt, RsaOaepDecrypt, (RsaContext, EncryptedData, EncryptedDataSize, DigestLen, OutData, OutDataSize), FALSE);
}
/**
Get the signer's certificates from PKCS#7 signed data as described in "PKCS #7:
Cryptographic Message Syntax Standard". The input signed data could be wrapped
@ -6987,5 +7112,8 @@ const EDKII_CRYPTO_PROTOCOL mEdkiiCrypto = {
CryptoServiceX509VerifyCertChain,
CryptoServiceX509GetCertFromCertChain,
CryptoServiceAsn1GetTag,
CryptoServiceX509GetExtendedBasicConstraints
CryptoServiceX509GetExtendedBasicConstraints,
CryptoServicePkcs1v2Decrypt,
CryptoServiceRsaOaepEncrypt,
CryptoServiceRsaOaepDecrypt,
};

117
CryptoPkg/Include/Library/BaseCryptLib.h
View File

@ -5,6 +5,7 @@
functionality enabling.
Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>
Copyright (c) Microsoft Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -2147,6 +2148,122 @@ Pkcs1v2Encrypt (
OUT UINTN *EncryptedDataSize
);
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
);
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
);
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
);
/**
The 3rd parameter of Pkcs7GetSigners will return all embedded
X.509 certificate in one given PKCS7 signature. The format is:

4
CryptoPkg/Include/Pcd/PcdCryptoServiceFamilyEnable.h
View File

@ -23,6 +23,7 @@
* Sha1 family
Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
Copyright (c) Microsoft Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -124,6 +125,7 @@ typedef struct {
UINT8 Pkcs7GetCertificatesList : 1;
UINT8 AuthenticodeVerify : 1;
UINT8 ImageTimestampVerify : 1;
UINT8 Pkcs1v2Decrypt : 1;
} Services;
UINT32 Family;
} Pkcs;
@ -158,6 +160,8 @@ typedef struct {
UINT8 Pkcs1Verify : 1;
UINT8 GetPrivateKeyFromPem : 1;
UINT8 GetPublicKeyFromX509 : 1;
UINT8 RsaOaepEncrypt : 1;
UINT8 RsaOaepDecrypt : 1;
} Services;
UINT32 Family;
} Rsa;

614
CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs1Oaep.c
View File

@ -3,7 +3,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
Copyright (C) 2016 Microsoft Corporation. All Rights Reserved.
Copyright (C) Microsoft Corporation. All Rights Reserved.
Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
**/
@ -14,6 +14,37 @@
#include <openssl/x509.h>
#include <Library/MemoryAllocationLib.h>
/**
Retrieve a pointer to EVP message digest object.
@param[in] DigestLen Length of the message digest.
**/
STATIC
const
EVP_MD *
GetEvpMD (
IN UINT16 DigestLen
)
{
switch (DigestLen) {
case SHA1_DIGEST_SIZE:
return EVP_sha1 ();
break;
case SHA256_DIGEST_SIZE:
return EVP_sha256 ();
break;
case SHA384_DIGEST_SIZE:
return EVP_sha384 ();
break;
case SHA512_DIGEST_SIZE:
return EVP_sha512 ();
break;
default:
return NULL;
}
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
@ -26,15 +57,20 @@
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] PublicKey A pointer to the DER-encoded X509 certificate that
@param[in] Pkey A pointer to an EVP_PKEY struct that
will be used to encrypt the data.
@param[in] PublicKeySize Size of the X509 cert buffer.
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@ -45,50 +81,35 @@
**/
BOOLEAN
EFIAPI
Pkcs1v2Encrypt (
IN CONST UINT8 *PublicKey,
IN UINTN PublicKeySize,
InternalPkcs1v2Encrypt (
EVP_PKEY *Pkey,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
BOOLEAN Result;
CONST UINT8 *TempPointer;
X509 *CertData;
EVP_PKEY *InternalPublicKey;
EVP_PKEY_CTX *PkeyCtx;
UINT8 *OutData;
UINTN OutDataSize;
CONST EVP_MD *HashAlg;
//
// Check input parameters.
//
if ((PublicKey == NULL) || (InData == NULL) ||
if ((Pkey == NULL) || (InData == NULL) ||
(EncryptedData == NULL) || (EncryptedDataSize == NULL))
{
return FALSE;
}
//
// Check public key size.
//
if (PublicKeySize > 0xFFFFFFFF) {
//
// Public key size is too large for implementation.
//
return FALSE;
}
*EncryptedData = NULL;
*EncryptedDataSize = 0;
Result = FALSE;
TempPointer = NULL;
CertData = NULL;
InternalPublicKey = NULL;
PkeyCtx = NULL;
OutData = NULL;
OutDataSize = 0;
@ -104,34 +125,10 @@ Pkcs1v2Encrypt (
RandomSeed (NULL, 0);
}
//
// Parse the X509 cert and extract the public key.
//
TempPointer = PublicKey;
CertData = d2i_X509 (&CertData, &TempPointer, (UINT32)PublicKeySize);
if (CertData == NULL) {
//
// Fail to parse X509 cert.
//
goto _Exit;
}
//
// Extract the public key from the x509 cert in a format that
// OpenSSL can use.
//
InternalPublicKey = X509_get_pubkey (CertData);
if (InternalPublicKey == NULL) {
//
// Fail to extract public key.
//
goto _Exit;
}
//
// Create a context for the public key operation.
//
PkeyCtx = EVP_PKEY_CTX_new (InternalPublicKey, NULL);
PkeyCtx = EVP_PKEY_CTX_new (Pkey, NULL);
if (PkeyCtx == NULL) {
//
// Fail to create contex.
@ -151,6 +148,21 @@ Pkcs1v2Encrypt (
goto _Exit;
}
if (DigestLen != 0) {
HashAlg = GetEvpMD (DigestLen);
if (HashAlg == NULL) {
goto _Exit;
}
if (EVP_PKEY_CTX_set_rsa_oaep_md (PkeyCtx, HashAlg) <= 0) {
goto _Exit;
}
if (EVP_PKEY_CTX_set_rsa_mgf1_md (PkeyCtx, HashAlg) <= 0) {
goto _Exit;
}
}
//
// Determine the required buffer length for malloc'ing.
//
@ -196,17 +208,507 @@ _Exit:
//
// Release Resources
//
if (CertData != NULL) {
X509_free (CertData);
}
if (InternalPublicKey != NULL) {
EVP_PKEY_free (InternalPublicKey);
}
if (PkeyCtx != NULL) {
EVP_PKEY_CTX_free (PkeyCtx);
}
return Result;
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to parse X509 certificate.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] PublicKey A pointer to the DER-encoded X509 certificate that
will be used to encrypt the data.
@param[in] PublicKeySize Size of the X509 cert buffer.
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Encrypt (
IN CONST UINT8 *PublicKey,
IN UINTN PublicKeySize,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
BOOLEAN Result;
CONST UINT8 *TempPointer;
X509 *CertData;
EVP_PKEY *Pkey;
//
// Check input parameters.
//
if ((PublicKey == NULL) || (InData == NULL) ||
(EncryptedData == NULL) || (EncryptedDataSize == NULL))
{
return FALSE;
}
//
// Check public key size.
//
if (PublicKeySize > 0xFFFFFFFF) {
//
// Public key size is too large for implementation.
//
return FALSE;
}
*EncryptedData = NULL;
*EncryptedDataSize = 0;
Result = FALSE;
TempPointer = NULL;
CertData = NULL;
Pkey = NULL;
//
// Parse the X509 cert and extract the public key.
//
TempPointer = PublicKey;
CertData = d2i_X509 (&CertData, &TempPointer, (UINT32)PublicKeySize);
if (CertData == NULL) {
//
// Fail to parse X509 cert.
//
goto _Exit;
}
//
// Extract the public key from the x509 cert in a format that
// OpenSSL can use.
//
Pkey = X509_get_pubkey (CertData);
if (Pkey == NULL) {
//
// Fail to extract public key.
//
goto _Exit;
}
Result = InternalPkcs1v2Encrypt (Pkey, InData, InDataSize, PrngSeed, PrngSeedSize, 0, EncryptedData, EncryptedDataSize);
_Exit:
//
// Release Resources
//
if (CertData != NULL) {
X509_free (CertData);
}
if (Pkey != NULL) {
EVP_PKEY_free (Pkey);
}
return Result;
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
BOOLEAN Result;
EVP_PKEY *Pkey;
//
// Check input parameters.
//
if (((RsaContext == NULL) || (InData == NULL)) ||
(EncryptedData == NULL) || (EncryptedDataSize == NULL))
{
return FALSE;
}
*EncryptedData = NULL;
*EncryptedDataSize = 0;
Result = FALSE;
Pkey = NULL;
Pkey = EVP_PKEY_new ();
if (Pkey == NULL) {
goto _Exit;
}
if (EVP_PKEY_set1_RSA (Pkey, (RSA *)RsaContext) == 0) {
goto _Exit;
}
Result = InternalPkcs1v2Encrypt (Pkey, InData, InDataSize, PrngSeed, PrngSeedSize, DigestLen, EncryptedData, EncryptedDataSize);
_Exit:
//
// Release Resources
//
if (Pkey != NULL) {
EVP_PKEY_free (Pkey);
}
return Result;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] Pkey A pointer to an EVP_PKEY which will decrypt that data.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
InternalPkcs1v2Decrypt (
EVP_PKEY *Pkey,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
BOOLEAN Result;
EVP_PKEY_CTX *PkeyCtx;
UINT8 *TempData;
UINTN TempDataSize;
INTN ReturnCode;
CONST EVP_MD *HashAlg;
//
// Check input parameters.
//
if ((Pkey == NULL) || (EncryptedData == NULL) ||
(OutData == NULL) || (OutDataSize == NULL))
{
return FALSE;
}
Result = FALSE;
PkeyCtx = NULL;
TempData = NULL;
TempDataSize = 0;
//
// Create a context for the decryption operation.
//
PkeyCtx = EVP_PKEY_CTX_new (Pkey, NULL);
if (PkeyCtx == NULL) {
//
// Fail to create contex.
//
DEBUG ((DEBUG_ERROR, "[%a] EVP_PKEY_CTK_new() failed\n", __func__));
goto _Exit;
}
//
// Initialize the context and set the desired padding.
//
if ((EVP_PKEY_decrypt_init (PkeyCtx) <= 0) ||
(EVP_PKEY_CTX_set_rsa_padding (PkeyCtx, RSA_PKCS1_OAEP_PADDING) <= 0))
{
//
// Fail to initialize the context.
//
DEBUG ((DEBUG_ERROR, "[%a] EVP_PKEY_decrypt_init() failed\n", __func__));
goto _Exit;
}
if (DigestLen != 0) {
HashAlg = GetEvpMD (DigestLen);
if (HashAlg == NULL) {
goto _Exit;
}
if (EVP_PKEY_CTX_set_rsa_oaep_md (PkeyCtx, HashAlg) <= 0) {
goto _Exit;
}
if (EVP_PKEY_CTX_set_rsa_mgf1_md (PkeyCtx, HashAlg) <= 0) {
goto _Exit;
}
}
//
// Determine the required buffer length for malloc'ing.
//
ReturnCode = EVP_PKEY_decrypt (PkeyCtx, NULL, &TempDataSize, EncryptedData, EncryptedDataSize);
if (ReturnCode <= 0) {
//
// Fail to determine output buffer size.
//
DEBUG ((DEBUG_ERROR, "[%a] EVP_PKEY_decrypt() failed to determine output buffer size (rc=%d)\n", __func__, ReturnCode));
goto _Exit;
}
//
// Allocate a buffer for the output data.
//
TempData = AllocatePool (TempDataSize);
if (TempData == NULL) {
//
// Fail to allocate the output buffer.
//
goto _Exit;
}
//
// Decrypt Data.
//
ReturnCode = EVP_PKEY_decrypt (PkeyCtx, TempData, &TempDataSize, EncryptedData, EncryptedDataSize);
if (ReturnCode <= 0) {
//
// Fail to decrypt data, need to free the output buffer.
//
FreePool (TempData);
TempData = NULL;
TempDataSize = 0;
DEBUG ((DEBUG_ERROR, "[%a] EVP_PKEY_decrypt(TempData) failed to decrypt (rc=%d)\n", __func__, ReturnCode));
goto _Exit;
}
//
// Decrypt done.
//
*OutData = TempData;
*OutDataSize = TempDataSize;
Result = TRUE;
_Exit:
if (PkeyCtx != NULL) {
EVP_PKEY_CTX_free (PkeyCtx);
}
return Result;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
BOOLEAN Result;
EVP_PKEY *Pkey;
CONST UINT8 *TempPointer;
//
// Check input parameters.
//
if ((PrivateKey == NULL) || (EncryptedData == NULL) ||
(OutData == NULL) || (OutDataSize == NULL))
{
return FALSE;
}
Result = FALSE;
Pkey = NULL;
TempPointer = NULL;
//
// Parse the private key.
//
TempPointer = PrivateKey;
Pkey = d2i_PrivateKey (EVP_PKEY_RSA, &Pkey, &TempPointer, (UINT32)PrivateKeySize);
if (Pkey == NULL) {
//
// Fail to parse private key.
//
DEBUG ((DEBUG_ERROR, "[%a] d2i_PrivateKey() failed\n", __func__));
goto _Exit;
}
Result = InternalPkcs1v2Decrypt (Pkey, EncryptedData, EncryptedDataSize, 0, OutData, OutDataSize);
_Exit:
if (Pkey != NULL) {
EVP_PKEY_free (Pkey);
}
return Result;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
BOOLEAN Result;
EVP_PKEY *Pkey;
//
// Check input parameters.
//
if ((RsaContext == NULL) || (EncryptedData == NULL) ||
(OutData == NULL) || (OutDataSize == NULL))
{
return FALSE;
}
Result = FALSE;
Pkey = NULL;
//
// Create a context for the decryption operation.
//
Pkey = EVP_PKEY_new ();
if (Pkey == NULL) {
goto _Exit;
}
if (EVP_PKEY_set1_RSA (Pkey, (RSA *)RsaContext) == 0) {
goto _Exit;
}
Result = InternalPkcs1v2Decrypt (Pkey, EncryptedData, EncryptedDataSize, DigestLen, OutData, OutDataSize);
_Exit:
if (Pkey != NULL) {
EVP_PKEY_free (Pkey);
}
return Result;
}

130
CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs1OaepNull.c
View File

@ -3,7 +3,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
Copyright (C) 2016 Microsoft Corporation. All Rights Reserved.
Copyright (C) Microsoft Corporation. All Rights Reserved.
Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
**/
@ -48,3 +48,131 @@ Pkcs1v2Encrypt (
ASSERT (FALSE);
return FALSE;
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
ASSERT (FALSE);
return FALSE;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
ASSERT (FALSE);
return FALSE;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
ASSERT (FALSE);
return FALSE;
}

9
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptMd5.c
View File

@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "InternalCryptLib.h"
#include <mbedtls/md5.h>
#include <mbedtls/compat-2.x.h>
#ifdef ENABLE_MD5_DEPRECATED_INTERFACES
@ -56,7 +55,7 @@ Md5Init (
mbedtls_md5_init (Md5Context);
Ret = mbedtls_md5_starts_ret (Md5Context);
Ret = mbedtls_md5_starts (Md5Context);
if (Ret != 0) {
return FALSE;
}
@ -129,7 +128,7 @@ Md5Update (
return FALSE;
}
Ret = mbedtls_md5_update_ret (Md5Context, Data, DataSize);
Ret = mbedtls_md5_update (Md5Context, Data, DataSize);
if (Ret != 0) {
return FALSE;
}
@ -170,7 +169,7 @@ Md5Final (
return FALSE;
}
Ret = mbedtls_md5_finish_ret (Md5Context, HashValue);
Ret = mbedtls_md5_finish (Md5Context, HashValue);
mbedtls_md5_free (Md5Context);
if (Ret != 0) {
return FALSE;
@ -215,7 +214,7 @@ Md5HashAll (
return FALSE;
}
Ret = mbedtls_md5_ret (Data, DataSize, HashValue);
Ret = mbedtls_md5 (Data, DataSize, HashValue);
if (Ret != 0) {
return FALSE;
}

9
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptSha1.c
View File

@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "InternalCryptLib.h"
#include <mbedtls/sha1.h>
#include <mbedtls/compat-2.x.h>
#ifndef DISABLE_SHA1_DEPRECATED_INTERFACES
@ -56,7 +55,7 @@ Sha1Init (
mbedtls_sha1_init (Sha1Context);
Ret = mbedtls_sha1_starts_ret (Sha1Context);
Ret = mbedtls_sha1_starts (Sha1Context);
if (Ret != 0) {
return FALSE;
}
@ -129,7 +128,7 @@ Sha1Update (
return FALSE;
}
Ret = mbedtls_sha1_update_ret (Sha1Context, Data, DataSize);
Ret = mbedtls_sha1_update (Sha1Context, Data, DataSize);
if (Ret != 0) {
return FALSE;
}
@ -170,7 +169,7 @@ Sha1Final (
return FALSE;
}
Ret = mbedtls_sha1_finish_ret (Sha1Context, HashValue);
Ret = mbedtls_sha1_finish (Sha1Context, HashValue);
mbedtls_sha1_free (Sha1Context);
if (Ret != 0) {
return FALSE;
@ -215,7 +214,7 @@ Sha1HashAll (
return FALSE;
}
Ret = mbedtls_sha1_ret (Data, DataSize, HashValue);
Ret = mbedtls_sha1 (Data, DataSize, HashValue);
if (Ret != 0) {
return FALSE;
}

9
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptSha256.c
View File

@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "InternalCryptLib.h"
#include <mbedtls/sha256.h>
#include <mbedtls/compat-2.x.h>
/**
Retrieves the size, in bytes, of the context buffer required for SHA-256 hash operations.
@ -51,7 +50,7 @@ Sha256Init (
mbedtls_sha256_init (Sha256Context);
Ret = mbedtls_sha256_starts_ret (Sha256Context, FALSE);
Ret = mbedtls_sha256_starts (Sha256Context, FALSE);
if (Ret != 0) {
return FALSE;
}
@ -124,7 +123,7 @@ Sha256Update (
return FALSE;
}
Ret = mbedtls_sha256_update_ret (Sha256Context, Data, DataSize);
Ret = mbedtls_sha256_update (Sha256Context, Data, DataSize);
if (Ret != 0) {
return FALSE;
}
@ -165,7 +164,7 @@ Sha256Final (
return FALSE;
}
Ret = mbedtls_sha256_finish_ret (Sha256Context, HashValue);
Ret = mbedtls_sha256_finish (Sha256Context, HashValue);
mbedtls_sha256_free (Sha256Context);
if (Ret != 0) {
return FALSE;
@ -210,7 +209,7 @@ Sha256HashAll (
return FALSE;
}
Ret = mbedtls_sha256_ret (Data, DataSize, HashValue, FALSE);
Ret = mbedtls_sha256 (Data, DataSize, HashValue, FALSE);
if (Ret != 0) {
return FALSE;
}

17
CryptoPkg/Library/BaseCryptLibMbedTls/Hash/CryptSha512.c
View File

@ -8,7 +8,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "InternalCryptLib.h"
#include <mbedtls/sha512.h>
#include <mbedtls/compat-2.x.h>
/**
Retrieves the size, in bytes, of the context buffer required for SHA-384 hash operations.
@ -51,7 +50,7 @@ Sha384Init (
mbedtls_sha512_init (Sha384Context);
Ret = mbedtls_sha512_starts_ret (Sha384Context, TRUE);
Ret = mbedtls_sha512_starts (Sha384Context, TRUE);
if (Ret != 0) {
return FALSE;
}
@ -126,7 +125,7 @@ Sha384Update (
return FALSE;
}
Ret = mbedtls_sha512_update_ret (Sha384Context, Data, DataSize);
Ret = mbedtls_sha512_update (Sha384Context, Data, DataSize);
if (Ret != 0) {
return FALSE;
}
@ -167,7 +166,7 @@ Sha384Final (
return FALSE;
}
Ret = mbedtls_sha512_finish_ret (Sha384Context, HashValue);
Ret = mbedtls_sha512_finish (Sha384Context, HashValue);
mbedtls_sha512_free (Sha384Context);
if (Ret != 0) {
return FALSE;
@ -212,7 +211,7 @@ Sha384HashAll (
return FALSE;
}
Ret = mbedtls_sha512_ret (Data, DataSize, HashValue, TRUE);
Ret = mbedtls_sha512 (Data, DataSize, HashValue, TRUE);
if (Ret != 0) {
return FALSE;
}
@ -261,7 +260,7 @@ Sha512Init (
mbedtls_sha512_init (Sha512Context);
Ret = mbedtls_sha512_starts_ret (Sha512Context, FALSE);
Ret = mbedtls_sha512_starts (Sha512Context, FALSE);
if (Ret != 0) {
return FALSE;
}
@ -336,7 +335,7 @@ Sha512Update (
return FALSE;
}
Ret = mbedtls_sha512_update_ret (Sha512Context, Data, DataSize);
Ret = mbedtls_sha512_update (Sha512Context, Data, DataSize);
if (Ret != 0) {
return FALSE;
}
@ -377,7 +376,7 @@ Sha512Final (
return FALSE;
}
Ret = mbedtls_sha512_finish_ret (Sha512Context, HashValue);
Ret = mbedtls_sha512_finish (Sha512Context, HashValue);
mbedtls_sha512_free (Sha512Context);
if (Ret != 0) {
return FALSE;
@ -422,7 +421,7 @@ Sha512HashAll (
return FALSE;
}
Ret = mbedtls_sha512_ret (Data, DataSize, HashValue, FALSE);
Ret = mbedtls_sha512 (Data, DataSize, HashValue, FALSE);
if (Ret != 0) {
return FALSE;
}

135
CryptoPkg/Library/BaseCryptLibMbedTls/Pk/CryptPkcs1OaepNull.c
View File

@ -4,6 +4,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
Copyright (c) Microsoft Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -38,10 +39,8 @@ Pkcs1v2Encrypt (
IN UINTN PublicKeySize,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed,
OPTIONAL
IN UINTN PrngSeedSize,
OPTIONAL
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
@ -49,3 +48,131 @@ Pkcs1v2Encrypt (
ASSERT (FALSE);
return FALSE;
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
ASSERT (FALSE);
return FALSE;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
ASSERT (FALSE);
return FALSE;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
ASSERT (FALSE);
return FALSE;
}

74
CryptoPkg/Library/BaseCryptLibMbedTls/Pk/CryptRsaPss.c
View File

@ -11,6 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "InternalCryptLib.h"
#include <mbedtls/rsa.h>
#include <mbedtls/sha256.h>
#include <mbedtls/sha512.h>
/**
Verifies the RSA signature with RSASSA-PSS signature scheme defined in RFC 8017.
@ -43,11 +45,8 @@ RsaPssVerify (
)
{
INT32 Ret;
mbedtls_md_type_t md_alg;
mbedtls_md_type_t MdAlg;
UINT8 HashValue[SHA512_DIGEST_SIZE];
BOOLEAN Status;
UINTN ShaCtxSize;
VOID *ShaCtx;
mbedtls_rsa_context *RsaKey;
if (RsaContext == NULL) {
@ -75,78 +74,27 @@ RsaPssVerify (
switch (DigestLen) {
case SHA256_DIGEST_SIZE:
md_alg = MBEDTLS_MD_SHA256;
ShaCtxSize = Sha256GetContextSize ();
ShaCtx = AllocateZeroPool (ShaCtxSize);
Status = Sha256Init (ShaCtx);
if (!Status) {
MdAlg = MBEDTLS_MD_SHA256;
if (mbedtls_sha256 (Message, MsgSize, HashValue, FALSE) != 0) {
return FALSE;
}
Status = Sha256Update (ShaCtx, Message, MsgSize);
if (!Status) {
FreePool (ShaCtx);
return FALSE;
}
Status = Sha256Final (ShaCtx, HashValue);
if (!Status) {
FreePool (ShaCtx);
return FALSE;
}
FreePool (ShaCtx);
break;
case SHA384_DIGEST_SIZE:
md_alg = MBEDTLS_MD_SHA384;
ShaCtxSize = Sha384GetContextSize ();
ShaCtx = AllocateZeroPool (ShaCtxSize);
Status = Sha384Init (ShaCtx);
if (!Status) {
MdAlg = MBEDTLS_MD_SHA384;
if (mbedtls_sha512 (Message, MsgSize, HashValue, TRUE) != 0) {
return FALSE;
}
Status = Sha384Update (ShaCtx, Message, MsgSize);
if (!Status) {
FreePool (ShaCtx);
return FALSE;
}
Status = Sha384Final (ShaCtx, HashValue);
if (!Status) {
FreePool (ShaCtx);
return FALSE;
}
FreePool (ShaCtx);
break;
case SHA512_DIGEST_SIZE:
md_alg = MBEDTLS_MD_SHA512;
ShaCtxSize = Sha512GetContextSize ();
ShaCtx = AllocateZeroPool (ShaCtxSize);
Status = Sha512Init (ShaCtx);
if (!Status) {
MdAlg = MBEDTLS_MD_SHA512;
if (mbedtls_sha512 (Message, MsgSize, HashValue, FALSE) != 0) {
return FALSE;
}
Status = Sha512Update (ShaCtx, Message, MsgSize);
if (!Status) {
FreePool (ShaCtx);
return FALSE;
}
Status = Sha512Final (ShaCtx, HashValue);
if (!Status) {
FreePool (ShaCtx);
return FALSE;
}
FreePool (ShaCtx);
break;
default:
@ -157,11 +105,11 @@ RsaPssVerify (
return FALSE;
}
mbedtls_rsa_set_padding (RsaContext, MBEDTLS_RSA_PKCS_V21, md_alg);
mbedtls_rsa_set_padding (RsaContext, MBEDTLS_RSA_PKCS_V21, MdAlg);
Ret = mbedtls_rsa_rsassa_pss_verify (
RsaContext,
md_alg,
MdAlg,
(UINT32)DigestLen,
HashValue,
Signature

6
CryptoPkg/Library/BaseCryptLibMbedTls/Pk/CryptX509Null.c
View File

@ -377,8 +377,7 @@ EFIAPI
X509GetSerialNumber (
IN CONST UINT8 *Cert,
IN UINTN CertSize,
OUT UINT8 *SerialNumber,
OPTIONAL
OUT UINT8 *SerialNumber OPTIONAL,
IN OUT UINTN *SerialNumberSize
)
{
@ -441,8 +440,7 @@ EFIAPI
X509GetSignatureAlgorithm (
IN CONST UINT8 *Cert,
IN UINTN CertSize,
OUT UINT8 *Oid,
OPTIONAL
OUT UINT8 *Oid OPTIONAL,
IN OUT UINTN *OidSize
)
{

130
CryptoPkg/Library/BaseCryptLibNull/Pk/CryptPkcs1OaepNull.c
View File

@ -3,7 +3,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
Copyright (C) 2016 Microsoft Corporation. All Rights Reserved.
Copyright (C) Microsoft Corporation. All Rights Reserved.
Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
**/
@ -48,3 +48,131 @@ Pkcs1v2Encrypt (
ASSERT (FALSE);
return FALSE;
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
ASSERT (FALSE);
return FALSE;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
ASSERT (FALSE);
return FALSE;
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
ASSERT (FALSE);
return FALSE;
}

114
CryptoPkg/Library/BaseCryptLibOnProtocolPpi/CryptLib.c
View File

@ -2825,6 +2825,119 @@ Pkcs1v2Encrypt (
CALL_CRYPTO_SERVICE (Pkcs1v2Encrypt, (PublicKey, PublicKeySize, InData, InDataSize, PrngSeed, PrngSeedSize, EncryptedData, EncryptedDataSize), FALSE);
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
Pkcs1v2Decrypt (
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
CALL_CRYPTO_SERVICE (Pkcs1v2Decrypt, (PrivateKey, PrivateKeySize, EncryptedData, EncryptedDataSize, OutData, OutDataSize), FALSE);
}
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepEncrypt (
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
)
{
CALL_CRYPTO_SERVICE (RsaOaepEncrypt, (RsaContext, InData, InDataSize, PrngSeed, PrngSeedSize, DigestLen, EncryptedData, EncryptedDataSize), FALSE);
}
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
BOOLEAN
EFIAPI
RsaOaepDecrypt (
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
)
{
CALL_CRYPTO_SERVICE (RsaOaepDecrypt, (RsaContext, EncryptedData, EncryptedDataSize, DigestLen, OutData, OutDataSize), FALSE);
}
/**
Get the signer's certificates from PKCS#7 signed data as described in "PKCS #7:
Cryptographic Message Syntax Standard". The input signed data could be wrapped
@ -2850,6 +2963,7 @@ Pkcs1v2Encrypt (
@retval FALSE Error occurs during the operation.
@retval FALSE This interface is not supported.
**/
BOOLEAN
EFIAPI

109
CryptoPkg/Private/Protocol/Crypto.h
View File

@ -21,7 +21,7 @@
/// the EDK II Crypto Protocol is extended, this version define must be
/// increased.
///
#define EDKII_CRYPTO_VERSION 16
#define EDKII_CRYPTO_VERSION 17
///
/// EDK II Crypto Protocol forward declaration
@ -688,6 +688,110 @@ BOOLEAN
OUT UINTN *EncryptedDataSize
);
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] PrivateKey A pointer to the DER-encoded private key.
@param[in] PrivateKeySize Size of the private key buffer.
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
typedef
BOOLEAN
(EFIAPI *EDKII_CRYPTO_PKCS1V2_DECRYPT)(
IN CONST UINT8 *PrivateKey,
IN UINTN PrivateKeySize,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
);
/**
Encrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
encrypted message in a newly allocated buffer.
Things that can cause a failure include:
- X509 key size does not match any known key size.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
- Data size is too large for the provided key size (max size is a function of key size
and hash digest size).
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a public key using RsaSetKey().
@param[in] InData Data to be encrypted.
@param[in] InDataSize Size of the data buffer.
@param[in] PrngSeed [Optional] If provided, a pointer to a random seed buffer
to be used when initializing the PRNG. NULL otherwise.
@param[in] PrngSeedSize [Optional] If provided, size of the random seed buffer.
0 otherwise.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] EncryptedData Pointer to an allocated buffer containing the encrypted
message.
@param[out] EncryptedDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
typedef
BOOLEAN
(EFIAPI *EDKII_CRYPTO_RSA_OAEP_ENCRYPT)(
IN VOID *RsaContext,
IN UINT8 *InData,
IN UINTN InDataSize,
IN CONST UINT8 *PrngSeed OPTIONAL,
IN UINTN PrngSeedSize OPTIONAL,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **EncryptedData,
OUT UINTN *EncryptedDataSize
);
/**
Decrypts a blob using PKCS1v2 (RSAES-OAEP) schema. On success, will return the
decrypted message in a newly allocated buffer.
Things that can cause a failure include:
- Fail to parse private key.
- Fail to allocate an intermediate buffer.
- Null pointer provided for a non-optional parameter.
@param[in] RsaContext A pointer to an RSA context created by RsaNew() and
provisioned with a private key using RsaSetKey().
@param[in] EncryptedData Data to be decrypted.
@param[in] EncryptedDataSize Size of the encrypted buffer.
@param[in] DigestLen [Optional] If provided, size of the hash used:
SHA1_DIGEST_SIZE
SHA256_DIGEST_SIZE
SHA384_DIGEST_SIZE
SHA512_DIGEST_SIZE
0 to use default (SHA1)
@param[out] OutData Pointer to an allocated buffer containing the encrypted
message.
@param[out] OutDataSize Size of the encrypted message buffer.
@retval TRUE Encryption was successful.
@retval FALSE Encryption failed.
**/
typedef
BOOLEAN
(EFIAPI *EDKII_CRYPTO_RSA_OAEP_DECRYPT)(
IN VOID *RsaContext,
IN UINT8 *EncryptedData,
IN UINTN EncryptedDataSize,
IN UINT16 DigestLen OPTIONAL,
OUT UINT8 **OutData,
OUT UINTN *OutDataSize
);
// ---------------------------------------------
// PKCS5
@ -5603,6 +5707,9 @@ struct _EDKII_CRYPTO_PROTOCOL {
EDKII_CRYPTO_X509_GET_CERT_FROM_CERT_CHAIN X509GetCertFromCertChain;
EDKII_CRYPTO_ASN1_GET_TAG Asn1GetTag;
EDKII_CRYPTO_X509_GET_EXTENDED_BASIC_CONSTRAINTS X509GetExtendedBasicConstraints;
EDKII_CRYPTO_PKCS1V2_DECRYPT Pkcs1v2Decrypt;
EDKII_CRYPTO_RSA_OAEP_ENCRYPT RsaOaepEncrypt;
EDKII_CRYPTO_RSA_OAEP_DECRYPT RsaOaepDecrypt;
};
extern GUID gEdkiiCryptoProtocolGuid;

822
CryptoPkg/Test/UnitTest/Library/BaseCryptLib/OaepEncryptTests.c
View File

@ -1,20 +1,21 @@
/** @file
This is a unit test for RSA OAEP encrypt.
This is a unit test for RSA OAEP encrypt/decrypt.
Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
Copyright (c) Microsoft Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "TestBaseCryptLib.h"
CONST UINT8 RandSeed[] = "This is the random seed for PRNG verification.";
STATIC CONST UINT8 RandSeed[] = "This is the random seed for PRNG verification.";
//
// Self signed X509 certificate
// CN = ca.self
// O = Intel
//
GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT8 SelfTestCert[] = {
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 SelfTestCert[] = {
0x30, 0x82, 0x03, 0x90, 0x30, 0x82, 0x02, 0x78, 0x02, 0x09, 0x00, 0xE4, 0xDF, 0x47, 0x80, 0xEF,
0x4B, 0x3C, 0x6D, 0x30, 0x0D, 0x06, 0x09, 0x2A, 0x86, 0x48, 0x86, 0xF7, 0x0D, 0x01, 0x01, 0x0B,
0x05, 0x00, 0x30, 0x81, 0x89, 0x31, 0x0B, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02,
@ -75,7 +76,7 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT8 SelfTestCert[] = {
0x5B, 0x64, 0x81, 0x13,
};
GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT8 PrivateKey[] = {
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 PrivateKey[] = {
0x30, 0x82, 0x04, 0xA4, 0x02, 0x01, 0x00, 0x02, 0x82, 0x01, 0x01, 0x00, 0xBC, 0xE4, 0x67, 0xDC,
0xC7, 0xEA, 0x6F, 0x8A, 0xA7, 0xCC, 0xB2, 0x54, 0x47, 0x48, 0x6A, 0xE2, 0x39, 0xFF, 0xC2, 0x48,
0x58, 0x34, 0x07, 0x03, 0x6D, 0x39, 0xB3, 0x67, 0x46, 0x4C, 0xBC, 0xA0, 0xFA, 0x4E, 0x64, 0x23,
@ -153,114 +154,442 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST UINT8 PrivateKey[] = {
0x86, 0x10, 0x09, 0x88, 0x6C, 0x35, 0x60, 0xF2,
};
// The following RSA key componets were extracted from the above private key with openssl.
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 RsaN[] = {
0x00,
0xbc,0xe4, 0x67, 0xdc, 0xc7, 0xea, 0x6f, 0x8a, 0xa7, 0xcc, 0xb2, 0x54, 0x47, 0x48, 0x6a, 0xe2,
0x39,0xff, 0xc2, 0x48, 0x58, 0x34, 0x07, 0x03, 0x6d, 0x39, 0xb3, 0x67, 0x46, 0x4c, 0xbc, 0xa0,
0xfa,0x4e, 0x64, 0x23, 0x56, 0x47, 0x7b, 0xc9, 0x1a, 0x2a, 0x55, 0x42, 0x54, 0x10, 0x18, 0x30,
0x92,0x60, 0x30, 0x5b, 0x9e, 0xc0, 0x65, 0xd2, 0xd4, 0x05, 0x4a, 0xa6, 0x10, 0x66, 0x04, 0xa9,
0x54,0x4e, 0xee, 0x49, 0x39, 0x43, 0x65, 0x1e, 0x2e, 0x28, 0xde, 0x79, 0x24, 0xa9, 0x7e, 0xd8,
0x5b,0xbc, 0x2f, 0x46, 0x6a, 0xb7, 0xb6, 0x0d, 0x17, 0x88, 0x37, 0x52, 0x5c, 0xfe, 0x93, 0xc0,
0xe2,0xfd, 0x6a, 0x08, 0x1b, 0xfb, 0xd1, 0x87, 0xbd, 0xbd, 0x58, 0x57, 0x2c, 0x06, 0x5d, 0xd2,
0x7d,0x52, 0xe2, 0x49, 0x8e, 0xdc, 0xe5, 0x26, 0xbd, 0x92, 0x60, 0xb0, 0x3f, 0x58, 0x5e, 0x52,
0xd7,0x91, 0xda, 0x93, 0x62, 0x8d, 0x71, 0x80, 0x53, 0xba, 0x15, 0xc4, 0x1f, 0xf3, 0xbd, 0xe0,
0xc5,0xa4, 0xb8, 0xd3, 0x64, 0x12, 0x14, 0x1b, 0x11, 0x6b, 0x7b, 0xc2, 0x92, 0xc7, 0xe2, 0x94,
0x0b,0xb8, 0x67, 0x38, 0x48, 0x63, 0x11, 0x74, 0x25, 0x7c, 0x37, 0xc3, 0xb2, 0xae, 0xd9, 0xa7,
0x17,0x9c, 0x4b, 0x9d, 0x6c, 0x27, 0xb0, 0x87, 0x16, 0x6b, 0xf2, 0x96, 0xe5, 0x1d, 0x37, 0x27,
0xde,0xf2, 0x98, 0xb7, 0x81, 0x08, 0xd9, 0x7a, 0xba, 0x84, 0x14, 0x61, 0x60, 0x48, 0xce, 0xce,
0x51,0x73, 0xf4, 0xdb, 0xf1, 0x5f, 0x7a, 0x17, 0x71, 0x4f, 0xc1, 0x0b, 0xce, 0xc7, 0x31, 0xc1,
0x4e,0xa3, 0xee, 0x6f, 0x72, 0x97, 0x90, 0xfb, 0x8b, 0x54, 0x9f, 0x82, 0x5b, 0x48, 0x5a, 0xf1,
0xad,0x8b, 0x3a, 0xcd, 0xca, 0xb2, 0x8b, 0x7a, 0x53, 0xd4, 0xf7, 0x71, 0x16, 0x75, 0xa7, 0x35,
};
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 RsaE[] = {
0x01, 0x00, 0x01
};
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 RsaD[] = {
0x13, 0xf7, 0xd1, 0x42, 0xf5, 0x9f, 0x42, 0xcb, 0x55, 0x91, 0xbe, 0x08, 0x4a, 0xc0, 0xcd, 0x0b,
0xbd, 0x35, 0xdc, 0x43, 0xe9, 0x8f, 0x16, 0x6e, 0xb6, 0x4d, 0x33, 0x39, 0xe7, 0xa4, 0x95, 0x0c,
0x2f, 0x69, 0xba, 0x0c, 0x42, 0x42, 0xac, 0x43, 0x46, 0x10, 0xd3, 0x92, 0x7f, 0x70, 0x74, 0x1e,
0x2e, 0x5b, 0x1c, 0xc1, 0x92, 0xb6, 0xa4, 0x0c, 0xf5, 0x7c, 0xd9, 0xb7, 0x54, 0x64, 0x74, 0x79,
0xb1, 0xff, 0xe6, 0x10, 0xb7, 0x8c, 0xf8, 0x53, 0x88, 0x6d, 0xa9, 0x97, 0x04, 0xd9, 0x26, 0x1f,
0x99, 0x12, 0xfb, 0xac, 0x65, 0xfb, 0xa5, 0xb3, 0x1c, 0x99, 0xb9, 0xbf, 0x6b, 0x35, 0x3e, 0x49,
0x55, 0xb5, 0x94, 0x4f, 0xe7, 0x25, 0x67, 0xb1, 0x01, 0xcd, 0xd2, 0x58, 0xe4, 0xbe, 0x87, 0x8c,
0x88, 0xd3, 0x0a, 0x38, 0xdc, 0x71, 0x5d, 0x88, 0x0a, 0xe2, 0x3e, 0x76, 0x63, 0x3b, 0xe4, 0x3c,
0x8f, 0x2f, 0x29, 0x1d, 0xd1, 0x66, 0x8d, 0xc0, 0x4a, 0x68, 0x15, 0x90, 0x4c, 0x95, 0x61, 0xf4,
0xfd, 0xe8, 0xfa, 0x9c, 0x6c, 0x00, 0x22, 0x23, 0xd5, 0x17, 0x6e, 0xee, 0xa8, 0xd8, 0x70, 0xc5,
0x74, 0xea, 0x09, 0x13, 0x7f, 0x0c, 0x37, 0x4d, 0x50, 0xcd, 0xe9, 0x16, 0xc2, 0xd5, 0xde, 0x5e,
0xc3, 0xfc, 0x46, 0x08, 0xf1, 0x99, 0xc0, 0xb4, 0x28, 0xfd, 0x2b, 0x29, 0xef, 0x76, 0xd7, 0x04,
0x4f, 0x02, 0x54, 0x16, 0x54, 0x55, 0x20, 0xec, 0xbc, 0xbf, 0x85, 0x5f, 0x12, 0xcc, 0xfc, 0x0d,
0xf2, 0xef, 0xfc, 0x4d, 0x3e, 0xa2, 0x5e, 0x97, 0xfe, 0x35, 0x10, 0x0f, 0x53, 0x1f, 0x80, 0xd5,
0xc0, 0xb4, 0xe9, 0xe9, 0x31, 0x4c, 0x89, 0x14, 0x72, 0x39, 0x65, 0x89, 0xef, 0x7a, 0x51, 0x4a,
0xb9, 0xa9, 0xcc, 0x1b, 0x52, 0xb0, 0x02, 0x52, 0x65, 0x2f, 0x0b, 0x89, 0x41, 0x70, 0x1e, 0x01,
};
// test case = "123\0"
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 Msg1230[] = {
0x31, 0x32, 0x33, 0x00
};
// Ciphertext of the test case using RSAES-OAEP2048 with SHA1 MD/BGF1 created with openssl.
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 Ct1230RsaesOaepMdSha1Mgf1Sha1[] = {
0x88, 0x5d, 0xf3, 0x00, 0x66, 0x77, 0x91, 0x94, 0x5c, 0x8d, 0x45, 0xb6, 0xb2, 0x24, 0x26, 0x26,
0x37, 0xbe, 0xe0, 0x87, 0x4f, 0x50, 0xbf, 0x88, 0xde, 0x5d, 0xe9, 0xe0, 0xb2, 0x7e, 0x66, 0xfa,
0x6c, 0xfd, 0x0d, 0x19, 0x48, 0x41, 0xfe, 0x7a, 0x86, 0xa8, 0x28, 0xc2, 0x01, 0xcf, 0x76, 0xd7,
0xea, 0xab, 0x6d, 0xc3, 0x5e, 0x2c, 0x36, 0x04, 0xc0, 0x54, 0xc2, 0x68, 0x67, 0xe7, 0x04, 0x27,
0x56, 0xbe, 0x53, 0xb5, 0x80, 0x94, 0xd8, 0xde, 0x8c, 0x75, 0x69, 0x42, 0xba, 0x55, 0xd6, 0x2c,
0xda, 0x22, 0xe6, 0x09, 0xf6, 0x90, 0x27, 0x4b, 0x10, 0x54, 0x40, 0xa0, 0x74, 0x31, 0xdb, 0x5f,
0x80, 0x06, 0xc7, 0x67, 0x96, 0xe8, 0x45, 0xea, 0x7f, 0x72, 0x18, 0x24, 0xe8, 0x0d, 0x46, 0xc2,
0xa0, 0x83, 0xca, 0x71, 0xca, 0x91, 0x4b, 0x89, 0x80, 0x61, 0x01, 0x8e, 0xcf, 0xa1, 0x68, 0x81,
0x2d, 0xf2, 0x08, 0xd2, 0x02, 0x9e, 0xc0, 0xa4, 0x91, 0x71, 0x90, 0x84, 0x2f, 0x4e, 0x18, 0x37,
0x9b, 0x61, 0x0b, 0xf5, 0x88, 0xf7, 0x6b, 0x87, 0xb9, 0x4e, 0x31, 0xda, 0xf3, 0xb5, 0xe2, 0x60,
0x4d, 0xd9, 0x52, 0x99, 0x6b, 0x19, 0x98, 0xa2, 0x28, 0xaa, 0xeb, 0x5a, 0x33, 0xef, 0xf1, 0x4e,
0x29, 0x86, 0xbf, 0x70, 0x08, 0xfd, 0x34, 0x8a, 0x8c, 0x6d, 0xef, 0xc4, 0xa1, 0xfe, 0xdf, 0x4d,
0xeb, 0xf0, 0x2c, 0x4c, 0xf5, 0xb3, 0xe8, 0xf8, 0xc3, 0x45, 0xc7, 0x6b, 0x59, 0x1c, 0x9b, 0xd9,
0x52, 0xdf, 0x65, 0x87, 0x18, 0xd2, 0x6d, 0xff, 0x8b, 0x98, 0x2a, 0x97, 0xeb, 0x93, 0xea, 0x6a,
0x23, 0x23, 0xc6, 0x32, 0xf5, 0xea, 0x45, 0xe3, 0x99, 0xa0, 0x4d, 0x4b, 0x8f, 0xf8, 0x1d, 0xad,
0xa9, 0x97, 0xa2, 0xd6, 0xaf, 0x5e, 0x11, 0xf7, 0x5f, 0x28, 0xfb, 0x38, 0x80, 0x38, 0x50, 0xc4,
};
// Ciphertext of the test case using RSAES-OAEP2048 with SHA256 MD/BGF1 created with openssl.
GLOBAL_REMOVE_IF_UNREFERENCED STATIC CONST UINT8 Ct1230RsaesOaep2048MdSha256Mgf1Sha256[] = {
0xa7, 0x20, 0xa9, 0x31, 0xb5, 0xad, 0x83, 0x0a, 0x07, 0xee, 0x36, 0x46, 0xa5, 0x78, 0x3a, 0xda,
0x9d, 0xdf, 0xe6, 0x05, 0x0f, 0x7c, 0x46, 0xfe, 0x5f, 0xd6, 0x58, 0x16, 0xb6, 0xaa, 0x82, 0x7c,
0x58, 0x8a, 0x52, 0x14, 0x12, 0x29, 0x6f, 0x62, 0x80, 0xa7, 0x61, 0xfe, 0x29, 0x72, 0x6f, 0x73,
0xf6, 0x2f, 0x54, 0x38, 0x58, 0x7b, 0xbd, 0xa1, 0x2f, 0x9d, 0x12, 0x83, 0x72, 0xbc, 0x3d, 0x29,
0x65, 0x39, 0xcb, 0x93, 0x95, 0x3e, 0x73, 0xc9, 0x6f, 0xb9, 0xe8, 0xd5, 0x8b, 0x91, 0x0d, 0x87,
0x7e, 0x22, 0xb5, 0x93, 0x3d, 0xa8, 0x4a, 0xd9, 0x1a, 0x13, 0xf7, 0xf4, 0x7f, 0x16, 0x42, 0xfe,
0x63, 0x10, 0x7e, 0xa1, 0xe5, 0x04, 0xcf, 0xed, 0x93, 0x2d, 0x16, 0x3b, 0x79, 0x1f, 0x53, 0x41,
0xe3, 0xca, 0x69, 0x18, 0x6a, 0xe5, 0xec, 0x9a, 0xce, 0xbc, 0x47, 0xf6, 0x77, 0x9a, 0x5c, 0xea,
0xac, 0x7e, 0x28, 0xeb, 0x1e, 0xfe, 0x75, 0xa6, 0xbf, 0x1e, 0xfd, 0x1c, 0x63, 0x69, 0x47, 0x04,
0xaf, 0x69, 0x7e, 0x1c, 0xa1, 0x7f, 0x00, 0xcf, 0xec, 0x16, 0x34, 0xd9, 0xde, 0x91, 0x0e, 0x0f,
0x0b, 0x1e, 0x66, 0xc3, 0x41, 0x88, 0x43, 0xbe, 0xa3, 0x2a, 0x7c, 0x87, 0xff, 0xc0, 0x67, 0xdc,
0xc7, 0xeb, 0x28, 0x07, 0x00, 0x72, 0x85, 0x17, 0xca, 0x05, 0x9f, 0x29, 0x6b, 0xad, 0xc6, 0xae,
0x1c, 0x4a, 0xf2, 0xfe, 0x97, 0xc7, 0x6e, 0x4b, 0xbf, 0xfd, 0x46, 0xbe, 0xf8, 0x76, 0xc9, 0x70,
0x58, 0x3a, 0x73, 0xcc, 0x34, 0xda, 0xfe, 0x5b, 0x6d, 0x98, 0x74, 0x95, 0x85, 0xc7, 0xc9, 0x84,
0x02, 0xa8, 0x97, 0x13, 0xa3, 0x83, 0xcb, 0x28, 0x3d, 0xbb, 0x2b, 0x3b, 0x45, 0xf1, 0x6e, 0xc5,
0x37, 0x23, 0x21, 0xe6, 0x74, 0x2d, 0x48, 0x19, 0x97, 0xaf, 0xee, 0x3d, 0x9b, 0xd0, 0x05, 0xc7
};
typedef struct _OAEP_ENC_DEC_TEST_CONTEXT OAEP_ENC_DEC_TEST_CONTEXT;
typedef
BOOLEAN
(EFIAPI *OAEP_TEST_ENCRYPT)(
IN OAEP_ENC_DEC_TEST_CONTEXT *TestContext,
IN CONST UINT8 *ClearText,
IN UINTN ClearTextSize,
IN CONST UINT8 *PrngSeed,
IN UINTN PrngSeedSize,
IN UINT16 DigestLen,
OUT UINT8 **CipherText,
OUT UINTN *CipherTextSize
);
typedef
BOOLEAN
(EFIAPI *OAEP_TEST_DECRYPT)(
IN OAEP_ENC_DEC_TEST_CONTEXT *TestContext,
IN CONST UINT8 *CipherText,
IN UINTN CipherTextSize,
IN UINT16 DigestLen,
OUT UINT8 **ClearText,
OUT UINTN *ClearTextSize
);
typedef struct _OAEP_ENC_DEC_TEST_CONTEXT {
CONST UINT8 *SelfTestCert;
UINTN SelfTestCertSize;
CONST UINT8 *PrivateKey;
UINTN PrivateKeySize;
CONST UINT8 *RsaN;
UINTN RsaNSize;
CONST UINT8 *RsaE;
UINTN RsaESize;
CONST UINT8 *RsaD;
UINTN RsaDSize;
CONST UINT8 *PrngSeed;
UINTN PrngSeedSize;
CONST UINT8 *ClearText;
UINTN ClearTextSize;
CONST UINT8 *CipherText;
UINTN CipherTextSize;
UINT16 DigestLen;
OAEP_TEST_ENCRYPT Encrypt;
OAEP_TEST_DECRYPT Decrypt;
UNIT_TEST_STATUS Expect;
} OAEP_ENC_DEC_TEST_CONTEXT;
BOOLEAN
EFIAPI
CallPkcs1v2Encrypt (
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx,
CONST UINT8 *ClearText,
UINTN ClearTextSize,
CONST UINT8 *PrngSeed,
UINTN PrngSeedSize,
UINT16 DigestLen,
UINT8 **CipherText,
UINTN *CipherTextSize
)
{
BOOLEAN Status;
Status = Pkcs1v2Encrypt (
TestCtx->SelfTestCert,
TestCtx->SelfTestCertSize,
(UINT8 *)ClearText,
ClearTextSize,
PrngSeed,
PrngSeedSize,
CipherText,
CipherTextSize
);
return Status;
}
BOOLEAN
EFIAPI
CallPkcs1v2Decrypt (
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx,
CONST UINT8 *CipherText,
UINTN CipherTextSize,
UINT16 DigestLen,
UINT8 **ClearText,
UINTN *ClearTextSize
)
{
BOOLEAN Status;
Status = Pkcs1v2Decrypt (
TestCtx->PrivateKey,
TestCtx->PrivateKeySize,
(UINT8 *)CipherText,
CipherTextSize,
ClearText,
ClearTextSize
);
return Status;
}
BOOLEAN
EFIAPI
CallRsaOaepEncrypt (
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx,
CONST UINT8 *ClearText,
UINTN ClearTextSize,
CONST UINT8 *RandSeedIn,
UINTN RandSeedSizeIn,
UINT16 DigestLen,
UINT8 **CipherText,
UINTN *CipherTextSize
)
{
VOID *RsaContext = NULL;
BOOLEAN Status;
RsaContext = RsaNew ();
UT_ASSERT_FALSE (RsaContext == NULL);
Status = RsaSetKey (RsaContext, RsaKeyN, TestCtx->RsaN, TestCtx->RsaNSize);
UT_ASSERT_TRUE (Status);
Status = RsaSetKey (RsaContext, RsaKeyE, TestCtx->RsaE, TestCtx->RsaESize);
UT_ASSERT_TRUE (Status);
Status = RsaOaepEncrypt (
RsaContext,
(UINT8 *)ClearText,
ClearTextSize,
RandSeedIn,
RandSeedSizeIn,
DigestLen,
CipherText,
CipherTextSize
);
return Status;
}
BOOLEAN
EFIAPI
CallRsaOaepDecrypt (
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx,
CONST UINT8 *CipherText,
UINTN CipherTextSize,
UINT16 DigestLen,
UINT8 **ClearText,
UINTN *ClearTextSize
)
{
VOID *RsaContext = NULL;
BOOLEAN Status;
RsaContext = RsaNew ();
UT_ASSERT_FALSE (RsaContext == NULL);
Status = RsaSetKey (RsaContext, RsaKeyN, TestCtx->RsaN, TestCtx->RsaNSize);
UT_ASSERT_TRUE (Status);
Status = RsaSetKey (RsaContext, RsaKeyE, TestCtx->RsaE, TestCtx->RsaESize);
UT_ASSERT_TRUE (Status);
Status = RsaSetKey (RsaContext, RsaKeyD, TestCtx->RsaD, TestCtx->RsaDSize);
UT_ASSERT_TRUE (Status);
Status = RsaOaepDecrypt (
RsaContext,
(UINT8 *)CipherText,
CipherTextSize,
DigestLen,
ClearText,
ClearTextSize
);
return Status;
}
UNIT_TEST_STATUS
EFIAPI
TestVerifyOaepEncrypt (
TestVerifyEncrypt (
IN UNIT_TEST_CONTEXT Context
)
{
BOOLEAN Status;
UINT8 *OutBuffer = NULL;
UINTN OutBufferSize = 0;
UINT8 *OutBuffer2 = NULL;
UINTN OutBuffer2Size = 0;
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx;
TestCtx = (OAEP_ENC_DEC_TEST_CONTEXT *)Context;
Status = TestCtx->Encrypt (
TestCtx,
TestCtx->ClearText,
TestCtx->ClearTextSize,
TestCtx->PrngSeed,
TestCtx->PrngSeedSize,
TestCtx->DigestLen,
&OutBuffer,
&OutBufferSize
);
UT_ASSERT_TRUE (Status);
Status = TestCtx->Encrypt (
TestCtx,
TestCtx->ClearText,
TestCtx->ClearTextSize,
TestCtx->PrngSeed,
TestCtx->PrngSeedSize,
TestCtx->DigestLen,
&OutBuffer2,
&OutBuffer2Size
);
UT_ASSERT_TRUE (Status);
// TRUE - the two OutBuffers are indentical. That means the Oaep encrypt result is incorrect.
Status = (CompareMem (OutBuffer, OutBuffer2, OutBufferSize >= OutBuffer2Size ? OutBufferSize : OutBuffer2Size) == 0);
UT_ASSERT_FALSE (Status);
if (OutBuffer) {
FreePool (OutBuffer);
OutBuffer = NULL;
OutBufferSize = 0;
}
if (OutBuffer2) {
FreePool (OutBuffer2);
OutBuffer2 = NULL;
OutBuffer2Size = 0;
}
return UNIT_TEST_PASSED;
}
UNIT_TEST_STATUS
EFIAPI
TestVerifyDecrypt (
IN UNIT_TEST_CONTEXT Context
)
{
BOOLEAN Status;
UINT8 *OutBuffer = NULL;
UINTN OutBufferSize = 0;
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx;
TestCtx = Context;
Status = TestCtx->Decrypt (
TestCtx,
TestCtx->CipherText,
TestCtx->CipherTextSize,
TestCtx->DigestLen,
&OutBuffer,
&OutBufferSize
);
UT_ASSERT_TRUE (Status);
UT_ASSERT_TRUE (CompareMem (OutBuffer, TestCtx->ClearText, OutBufferSize >= TestCtx->ClearTextSize ? OutBufferSize : TestCtx->ClearTextSize) == 0);
UT_ASSERT_TRUE (OutBufferSize == TestCtx->ClearTextSize);
if (OutBuffer) {
FreePool (OutBuffer);
OutBuffer = NULL;
OutBufferSize = 0;
}
return UNIT_TEST_PASSED;
}
UNIT_TEST_STATUS
EFIAPI
TestVerifyEncryptDecrypt (
IN UNIT_TEST_CONTEXT Context
)
{
BOOLEAN Status;
UINT8 *ClearText = NULL;
UINTN ClearTextSize = 0;
UINT8 *CipherText = NULL;
UINTN CipherTextSize = 0;
OAEP_ENC_DEC_TEST_CONTEXT *TestCtx;
TestCtx = Context;
Status = TestCtx->Encrypt (
TestCtx,
TestCtx->ClearText,
TestCtx->ClearTextSize,
TestCtx->PrngSeed,
TestCtx->PrngSeedSize,
TestCtx->DigestLen,
&CipherText,
&CipherTextSize
);
UT_ASSERT_TRUE (Status);
Status = TestCtx->Decrypt (
TestCtx,
CipherText,
CipherTextSize,
TestCtx->DigestLen,
&ClearText,
&ClearTextSize
);
if (TestCtx->Expect == UNIT_TEST_PASSED) {
UT_ASSERT_TRUE (Status);
} else {
UT_ASSERT_FALSE (Status);
}
if (TestCtx->Expect == UNIT_TEST_PASSED) {
UT_ASSERT_TRUE (CompareMem (ClearText, TestCtx->ClearText, ClearTextSize >= TestCtx->ClearTextSize ? ClearTextSize : TestCtx->ClearTextSize) == 0);
UT_ASSERT_TRUE (ClearTextSize == TestCtx->ClearTextSize);
}
if (CipherText) {
FreePool (CipherText);
CipherText = NULL;
CipherTextSize = 0;
}
if (ClearText) {
FreePool (ClearText);
ClearText = NULL;
ClearTextSize = 0;
}
return UNIT_TEST_PASSED;
}
UNIT_TEST_STATUS
EFIAPI
TestVerifyPkcs1v2EncryptInterface (
IN UNIT_TEST_CONTEXT Context
)
{
BOOLEAN Status;
UINT8 File[4];
UINT8 *OutBuffer;
UINTN OutBufferSize;
UINT8 *OutBuffer2;
UINTN OutBuffer2Size;
// Create a file and add content '123' in it
File[0] = '1';
File[1] = '2';
File[2] = '3';
File[3] = 0;
OutBuffer = NULL;
OutBufferSize = 0;
OutBuffer2 = NULL;
OutBuffer2Size = 0;
Status = Pkcs1v2Encrypt (
SelfTestCert,
(UINTN)sizeof (SelfTestCert),
File,
(UINTN)sizeof (File),
NULL,
0,
&OutBuffer,
(UINTN *)&OutBufferSize
);
UT_ASSERT_TRUE (Status);
Status = Pkcs1v2Encrypt (
SelfTestCert,
(UINTN)sizeof (SelfTestCert),
File,
(UINTN)4,
NULL,
0,
&OutBuffer2,
(UINTN *)&OutBuffer2Size
);
UT_ASSERT_TRUE (Status);
// TRUE - the two OutBuffers are indentical. That means the Oaep encrypt result is incorrect.
Status = (CompareMem (OutBuffer, OutBuffer2, OutBufferSize >= OutBuffer2Size ? OutBufferSize : OutBuffer2Size) == 0);
UT_ASSERT_FALSE (Status);
if (OutBuffer) {
FreePool (OutBuffer);
OutBuffer = NULL;
OutBufferSize = 0;
}
if (OutBuffer2) {
FreePool (OutBuffer2);
OutBuffer2 = NULL;
OutBuffer2Size = 0;
}
Status = Pkcs1v2Encrypt (
SelfTestCert,
(UINTN)sizeof (SelfTestCert),
File,
(UINTN)4,
RandSeed,
(UINTN)sizeof (RandSeed),
&OutBuffer,
(UINTN *)&OutBufferSize
);
UT_ASSERT_TRUE (Status);
Status = Pkcs1v2Encrypt (
SelfTestCert,
(UINTN)sizeof (SelfTestCert),
File,
(UINTN)4,
RandSeed,
(UINTN)sizeof (RandSeed),
&OutBuffer2,
(UINTN *)&OutBuffer2Size
);
UT_ASSERT_TRUE (Status);
// TRUE - the two OutBuffers are indentical. That means the Oaep encrypt result is incorrect.
Status = (CompareMem (OutBuffer, OutBuffer2, OutBufferSize >= OutBuffer2Size ? OutBufferSize : OutBuffer2Size) == 0);
UT_ASSERT_FALSE (Status);
if (OutBuffer) {
FreePool (OutBuffer);
OutBuffer = NULL;
OutBufferSize = 0;
}
if (OutBuffer2) {
FreePool (OutBuffer2);
OutBuffer2 = NULL;
OutBuffer2Size = 0;
}
Status = Pkcs1v2Encrypt (
NULL,
(UINTN)sizeof (SelfTestCert),
File,
(UINT8 *)Msg1230,
(UINTN)4,
NULL,
0,
@ -272,7 +601,7 @@ TestVerifyOaepEncrypt (
Status = Pkcs1v2Encrypt (
SelfTestCert,
(UINTN)sizeof (SelfTestCert),
File,
(UINT8 *)Msg1230,
(UINTN)4,
NULL,
0,
@ -284,7 +613,7 @@ TestVerifyOaepEncrypt (
Status = Pkcs1v2Encrypt (
SelfTestCert,
(UINTN)sizeof (SelfTestCert),
File,
(UINT8 *)Msg1230,
(UINTN)4,
NULL,
0,
@ -296,11 +625,298 @@ TestVerifyOaepEncrypt (
return UNIT_TEST_PASSED;
}
UNIT_TEST_STATUS
EFIAPI
TestVerifyRsaOaepEncryptInterface (
IN UNIT_TEST_CONTEXT Context
)
{
VOID *RsaContext = NULL;
BOOLEAN Status;
UINT8 *OutBuffer;
UINTN OutBufferSize;
RsaContext = RsaNew ();
UT_ASSERT_FALSE (RsaContext == NULL);
Status = RsaSetKey (RsaContext, RsaKeyN, RsaN, sizeof (RsaN));
UT_ASSERT_TRUE (Status);
Status = RsaSetKey (RsaContext, RsaKeyE, RsaE, sizeof (RsaE));
UT_ASSERT_TRUE (Status);
Status = RsaOaepEncrypt (
NULL,
(UINT8 *)Msg1230,
(UINTN)4,
NULL,
0,
0,
&OutBuffer,
(UINTN *)&OutBufferSize
);
UT_ASSERT_FALSE (Status);
Status = RsaOaepEncrypt (
RsaContext,
(UINT8 *)Msg1230,
(UINTN)4,
NULL,
0,
0,
(UINT8 **)NULL,
(UINTN *)&OutBufferSize
);
UT_ASSERT_FALSE (Status);
Status = RsaOaepEncrypt (
RsaContext,
(UINT8 *)Msg1230,
(UINTN)4,
NULL,
0,
0,
&OutBuffer,
(UINTN *)NULL
);
UT_ASSERT_FALSE (Status);
return UNIT_TEST_PASSED;
}
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyPkcs1v2Msg1230 = {
.SelfTestCert = SelfTestCert,
.SelfTestCertSize = sizeof (SelfTestCert),
.PrivateKey = PrivateKey,
.PrivateKeySize = sizeof (PrivateKey),
.RsaN = NULL,
.RsaNSize = 0,
.RsaE = NULL,
.RsaESize = 0,
.RsaD = NULL,
.RsaDSize = 0,
.PrngSeed = NULL,
.PrngSeedSize = 0,
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallPkcs1v2Encrypt,
.Decrypt = CallPkcs1v2Decrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyPkcs1v2Msg1230PrngSeed = {
.SelfTestCert = SelfTestCert,
.SelfTestCertSize = sizeof (SelfTestCert),
.PrivateKey = PrivateKey,
.PrivateKeySize = sizeof (PrivateKey),
.RsaN = NULL,
.RsaNSize = 0,
.RsaE = NULL,
.RsaESize = 0,
.RsaD = NULL,
.RsaDSize = 0,
.PrngSeed = RandSeed,
.PrngSeedSize = sizeof (RandSeed),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallPkcs1v2Encrypt,
.Decrypt = CallPkcs1v2Decrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyRsaOaepMsg1230 = {
.SelfTestCert = NULL,
.SelfTestCertSize = 0,
.PrivateKey = NULL,
.PrivateKeySize = 0,
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.PrngSeed = NULL,
.PrngSeedSize = 0,
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallRsaOaepEncrypt,
.Decrypt = CallRsaOaepDecrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyRsaOaepMsg1230PrngSeed = {
.SelfTestCert = NULL,
.SelfTestCertSize = 0,
.PrivateKey = NULL,
.PrivateKeySize = 0,
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.PrngSeed = RandSeed,
.PrngSeedSize = sizeof (RandSeed),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallRsaOaepEncrypt,
.Decrypt = CallRsaOaepDecrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyPkcs1v2EncryptRsaOaepDecrypt = {
.SelfTestCert = SelfTestCert,
.SelfTestCertSize = sizeof (SelfTestCert),
.PrivateKey = PrivateKey,
.PrivateKeySize = sizeof (PrivateKey),
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallPkcs1v2Encrypt,
.Decrypt = CallRsaOaepDecrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyRsaOaepEncryptPkcs1v2Decrypt = {
.SelfTestCert = SelfTestCert,
.SelfTestCertSize = sizeof (SelfTestCert),
.PrivateKey = PrivateKey,
.PrivateKeySize = sizeof (PrivateKey),
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallRsaOaepEncrypt,
.Decrypt = CallPkcs1v2Decrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyRsaesOaep2048MdDefaultBgf1Default = {
.SelfTestCert = NULL,
.SelfTestCertSize = 0,
.PrivateKey = NULL,
.PrivateKeySize = 0,
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = 0,
.Encrypt = CallRsaOaepEncrypt,
.Decrypt = CallRsaOaepDecrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyRsaesOaep2048MdSha1Mgf1Sha1 = {
.SelfTestCert = NULL,
.SelfTestCertSize = 0,
.PrivateKey = NULL,
.PrivateKeySize = 0,
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaepMdSha1Mgf1Sha1,
.CipherTextSize = sizeof (Ct1230RsaesOaepMdSha1Mgf1Sha1),
.DigestLen = SHA1_DIGEST_SIZE,
.Encrypt = CallRsaOaepEncrypt,
.Decrypt = CallRsaOaepDecrypt,
.Expect = UNIT_TEST_PASSED
};
OAEP_ENC_DEC_TEST_CONTEXT mTestVerifyRsaesOaep2048MdSha256Mgf1Sha256 = {
.SelfTestCert = NULL,
.SelfTestCertSize = 0,
.PrivateKey = NULL,
.PrivateKeySize = 0,
.RsaN = RsaN,
.RsaNSize = sizeof (RsaN),
.RsaE = RsaE,
.RsaESize = sizeof (RsaE),
.RsaD = RsaD,
.RsaDSize = sizeof (RsaD),
.ClearText = Msg1230,
.ClearTextSize = sizeof (Msg1230),
.CipherText = Ct1230RsaesOaep2048MdSha256Mgf1Sha256,
.CipherTextSize = sizeof (Ct1230RsaesOaep2048MdSha256Mgf1Sha256),
.DigestLen = SHA256_DIGEST_SIZE,
.Encrypt = CallRsaOaepEncrypt,
.Decrypt = CallRsaOaepDecrypt,
.Expect = UNIT_TEST_PASSED
};
TEST_DESC mOaepTest[] = {
//
// -----Description--------------------------------------Class----------------------Function-----------------Pre---Post--Context
//
{ "TestVerifyOaepEncrypt()", "CryptoPkg.BaseCryptLib.Pkcs1v2Encrypt", TestVerifyOaepEncrypt, NULL, NULL, NULL },
// Pkcs1v2Encrypt / Decrypt
{ "Pkcs1v2Encrypt (Interface)", "CryptoPkg.BaseCryptLib.Pkcs1v2Encrypt.Interface", TestVerifyPkcs1v2EncryptInterface, NULL, NULL, &mTestVerifyPkcs1v2Msg1230 },
{ "Pkcs1v2Encrypt (NoSeed)", "CryptoPkg.BaseCryptLib.Pkcs1v2Encrypt.NoSeed", TestVerifyEncrypt, NULL, NULL, &mTestVerifyPkcs1v2Msg1230 },
{ "Pkcs1v2Encrypt (Seeded)", "CryptoPkg.BaseCryptLib.Pkcs1v2Encrypt.Seeded", TestVerifyEncrypt, NULL, NULL, &mTestVerifyPkcs1v2Msg1230PrngSeed },
{ "Pkcs1v2Decrypt", "CryptoPkg.BaseCryptLib.Pkcs1v2Decrypt", TestVerifyDecrypt, NULL, NULL, &mTestVerifyPkcs1v2Msg1230 },
{ "Pkcs1v2EncryptDecrypt", "CryptoPkg.BaseCryptLib.Pkcs1v2EncryptDecrypt", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyPkcs1v2Msg1230 },
// RsaOaepEncrypt / Decrypt
{ "RsaOaepEncrypt (Interface)", "CryptoPkg.BaseCryptLib.RsaOaepEncrypt.Interface", TestVerifyRsaOaepEncryptInterface, NULL, NULL, &mTestVerifyRsaOaepMsg1230 },
{ "RsaOaepEncrypt (NoSeed)", "CryptoPkg.BaseCryptLib.RsaOaepEncrypt.NoSeed", TestVerifyEncrypt, NULL, NULL, &mTestVerifyRsaOaepMsg1230 },
{ "RsaOaepEncrypt (Seeded)", "CryptoPkg.BaseCryptLib.RsaOaepEncrypt.Seeded", TestVerifyEncrypt, NULL, NULL, &mTestVerifyRsaOaepMsg1230PrngSeed },
{ "RsaOaepDecrypt", "CryptoPkg.BaseCryptLib.RsaOaepDecrypt", TestVerifyDecrypt, NULL, NULL, &mTestVerifyRsaOaepMsg1230 },
{ "RsaOaepEncryptDecrypt", "CryptoPkg.BaseCryptLib.RsaOaepEncryptDecrypt", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyRsaOaepMsg1230 },
// Mix interfaces
{ "RsaOaepEncryptPkcs1v2Decrypt", "CryptoPkg.BaseCryptLib.RsaOaepEncryptPkcs1v2Decrypt", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyRsaOaepEncryptPkcs1v2Decrypt },
{ "Pkcs1v2EncryptRsaOaepDecrypt", "CryptoPkg.BaseCryptLib.Pkcs1v2EncryptRsaOaepDecrypt", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyPkcs1v2EncryptRsaOaepDecrypt },
// Message digest default / MGF1 default (SHA1)
{ "RsaOaepEncrypt (MdDefaultMgf1Default)", "CryptoPkg.BaseCryptLib.RsaOaepEncrypt.MdDefaultMgf1Default", TestVerifyEncrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdDefaultBgf1Default },
{ "RsaOaepDecrypt (MdDefaultMgf1Default)", "CryptoPkg.BaseCryptLib.RsaOaepDecrypt.MdDefaultMgf1Default", TestVerifyDecrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdDefaultBgf1Default },
{ "RsaOaepEncryptDecrypt (MdDefaultMgf1Default)", "CryptoPkg.BaseCryptLib.RsaOaepEncryptDecrypt.MdDefaultMgf1Default", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdDefaultBgf1Default },
// Message digest SHA1 / MGF1 SHA1
{ "RsaOaepEncrypt (MdSha1Bgf1Sha1", "CryptoPkg.BaseCryptLib.RsaOaepEncrypt.MdSha1Bgf1Sha1", TestVerifyEncrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdSha1Mgf1Sha1 },
{ "RsaOaepDecrypt (MdSha1Bgf1Sha1)", "CryptoPkg.BaseCryptLib.RsaOaepDecrypt.MdSha1Bgf1Sha1", TestVerifyDecrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdSha1Mgf1Sha1 },
{ "RsaOaepEncryptDecrypt (MdSha1Bgf1Sha1)", "CryptoPkg.BaseCryptLib.RsaOaepEncryptDecrypt.MdSha1Bgf1Sha1", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdSha1Mgf1Sha1 },
// Message digest SHA256 / MGF1 SHA256
{ "RsaOaepEncrypt (MdSha256Bgf1Sha256)", "CryptoPkg.BaseCryptLib.RsaOaepEncrypt.MdSha256Bgf1Sha256", TestVerifyEncrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdSha256Mgf1Sha256 },
{ "RsaOaepDecrypt (MdSha256Bgf1Sha256)", "CryptoPkg.BaseCryptLib.RsaOaepDecrypt.MdSha256Bgf1Sha256", TestVerifyDecrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdSha256Mgf1Sha256 },
{ "RsaOaepEncryptDecrypt (MdSha256Bgf1Sha256)", "CryptoPkg.BaseCryptLib.RsaOaepEncryptDecryptMdSha256Bgf1Sha256", TestVerifyEncryptDecrypt, NULL, NULL, &mTestVerifyRsaesOaep2048MdSha256Mgf1Sha256 },
};
UINTN mOaepTestNum = ARRAY_SIZE (mOaepTest);

7
DynamicTablesPkg/Include/ArmNameSpaceObjects.h
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017 - 2024, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@ -317,7 +317,10 @@ typedef struct CmArmSerialPortInfo {
/// The physical base address for the serial port
UINT64 BaseAddress;
/// The serial port interrupt
/** The serial port interrupt.
0 indicates that the serial port does not
have an interrupt wired.
*/
UINT32 Interrupt;
/// The serial port baud rate

41
DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
View File

@ -2,7 +2,7 @@
AML Lib.
Copyright (c) 2019 - 2023, Arm Limited. All rights reserved.<BR>
Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -1743,6 +1743,45 @@ AmlAddNameStringToNamedPackage (
IN AML_OBJECT_NODE_HANDLE NamedNode
);
/** Add an integer value to the named package node.
AmlCodeGenNamePackage ("_CID", NULL, &PackageNode);
AmlGetEisaIdFromString ("PNP0A03", &EisaId);
AmlAddIntegerToNamedPackage (EisaId, NameNode);
AmlGetEisaIdFromString ("PNP0A08", &EisaId);
AmlAddIntegerToNamedPackage (EisaId, NameNode);
equivalent of the following ASL code:
Name (_CID, Package (0x02) // _CID: Compatible ID
{
EisaId ("PNP0A03"),
EisaId ("PNP0A08")
})
The package is added at the tail of the list of the input package node
name:
Name ("NamePackageNode", Package () {
[Pre-existing package entries],
[Newly created integer entry]
})
@ingroup CodeGenApis
@param [in] Integer Integer value that need to be added to package node.
@param [in, out] NameNode Package named node to add the object to.
@retval EFI_SUCCESS Success.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@retval Others Error occurred during the operation.
**/
EFI_STATUS
EFIAPI
AmlAddIntegerToNamedPackage (
IN UINT32 Integer,
IN OUT AML_OBJECT_NODE_HANDLE NameNode
);
/** AML code generation to invoke/call another method.
This method is a subset implementation of MethodInvocation

32
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
View File

@ -1072,6 +1072,7 @@ CreateAmlProcessorContainer (
@param [in] IsLeaf The ProcNode is a leaf.
@param [in] NodeToken NodeToken of the ProcNode.
@param [in] ParentNodeToken Parent NodeToken of the ProcNode.
@param [in] PackageNodeSeen A parent of the ProcNode has the physical package flag set.
@retval EFI_SUCCESS Success.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@ -1083,23 +1084,24 @@ CheckProcNode (
UINT32 NodeFlags,
BOOLEAN IsLeaf,
CM_OBJECT_TOKEN NodeToken,
CM_OBJECT_TOKEN ParentNodeToken
CM_OBJECT_TOKEN ParentNodeToken,
BOOLEAN PackageNodeSeen
)
{
BOOLEAN InvalidFlags;
BOOLEAN HasPhysicalPackageBit;
BOOLEAN IsTopLevelNode;
HasPhysicalPackageBit = (NodeFlags & EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL) ==
EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL;
IsTopLevelNode = (ParentNodeToken == CM_NULL_TOKEN);
// A top-level node is a Physical Package and conversely.
InvalidFlags = HasPhysicalPackageBit ^ IsTopLevelNode;
// Only one Physical Package flag is allowed in the hierarchy
InvalidFlags = HasPhysicalPackageBit && PackageNodeSeen;
// Check Leaf specific flags.
if (IsLeaf) {
InvalidFlags |= ((NodeFlags & PPTT_LEAF_MASK) != PPTT_LEAF_MASK);
// Must have Physical Package flag somewhere in the hierarchy
InvalidFlags |= !(HasPhysicalPackageBit || PackageNodeSeen);
} else {
InvalidFlags |= ((NodeFlags & PPTT_LEAF_MASK) != 0);
}
@ -1130,6 +1132,7 @@ CheckProcNode (
node to.
@param [in,out] ProcContainerIndex Pointer to the current processor container
index to be used as UID.
@param [in] PackageNodeSeen A parent of the ProcNode has the physical package flag set.
@retval EFI_SUCCESS Success.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@ -1143,7 +1146,8 @@ CreateAmlCpuTopologyTree (
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN CM_OBJECT_TOKEN NodeToken,
IN AML_NODE_HANDLE ParentNode,
IN OUT UINT32 *ProcContainerIndex
IN OUT UINT32 *ProcContainerIndex,
IN BOOLEAN PackageNodeSeen
)
{
EFI_STATUS Status;
@ -1153,6 +1157,7 @@ CreateAmlCpuTopologyTree (
AML_OBJECT_NODE_HANDLE ProcContainerNode;
UINT32 Uid;
UINT16 Name;
BOOLEAN HasPhysicalPackageBit;
ASSERT (Generator != NULL);
ASSERT (Generator->ProcNodeList != NULL);
@ -1175,7 +1180,8 @@ CreateAmlCpuTopologyTree (
Generator->ProcNodeList[Index].Flags,
TRUE,
Generator->ProcNodeList[Index].Token,
NodeToken
NodeToken,
PackageNodeSeen
);
if (EFI_ERROR (Status)) {
ASSERT (0);
@ -1208,7 +1214,8 @@ CreateAmlCpuTopologyTree (
Generator->ProcNodeList[Index].Flags,
FALSE,
Generator->ProcNodeList[Index].Token,
NodeToken
NodeToken,
PackageNodeSeen
);
if (EFI_ERROR (Status)) {
ASSERT (0);
@ -1249,13 +1256,17 @@ CreateAmlCpuTopologyTree (
ProcContainerName++;
}
HasPhysicalPackageBit = (Generator->ProcNodeList[Index].Flags & EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL) ==
EFI_ACPI_6_3_PPTT_PACKAGE_PHYSICAL;
// Recursively continue creating an AML tree.
Status = CreateAmlCpuTopologyTree (
Generator,
CfgMgrProtocol,
Generator->ProcNodeList[Index].Token,
ProcContainerNode,
ProcContainerIndex
ProcContainerIndex,
(PackageNodeSeen || HasPhysicalPackageBit)
);
if (EFI_ERROR (Status)) {
ASSERT (0);
@ -1311,7 +1322,8 @@ CreateTopologyFromProcHierarchy (
CfgMgrProtocol,
CM_NULL_TOKEN,
ScopeNode,
&ProcContainerIndex
&ProcContainerIndex,
FALSE
);
if (EFI_ERROR (Status)) {
ASSERT (0);

67
DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlCodeGen.c
View File

@ -3871,6 +3871,73 @@ exit_handler:
return Status;
}
/** Add an integer value to the named package node.
AmlCodeGenNamePackage ("_CID", NULL, &PackageNode);
AmlGetEisaIdFromString ("PNP0A03", &EisaId);
AmlAddIntegerToNamedPackage (EisaId, NameNode);
AmlGetEisaIdFromString ("PNP0A08", &EisaId);
AmlAddIntegerToNamedPackage (EisaId, NameNode);
equivalent of the following ASL code:
Name (_CID, Package (0x02) // _CID: Compatible ID
{
EisaId ("PNP0A03"),
EisaId ("PNP0A08")
})
The package is added at the tail of the list of the input package node
name:
Name ("NamePackageNode", Package () {
[Pre-existing package entries],
[Newly created integer entry]
})
@ingroup CodeGenApis
@param [in] Integer Integer value that need to be added to package node.
@param [in, out] NameNode Package named node to add the object to.
@retval EFI_SUCCESS Success.
@retval EFI_INVALID_PARAMETER Invalid parameter.
@retval Others Error occurred during the operation.
**/
EFI_STATUS
EFIAPI
AmlAddIntegerToNamedPackage (
IN UINT32 Integer,
IN OUT AML_OBJECT_NODE_HANDLE NameNode
)
{
EFI_STATUS Status;
AML_OBJECT_NODE *PackageNode;
if (NameNode == NULL) {
ASSERT_EFI_ERROR (FALSE);
return EFI_INVALID_PARAMETER;
}
PackageNode = (AML_OBJECT_NODE_HANDLE)AmlGetFixedArgument (
NameNode,
EAmlParseIndexTerm1
);
if ((PackageNode == NULL) ||
(AmlGetNodeType ((AML_NODE_HANDLE)PackageNode) != EAmlNodeObject) ||
(!AmlNodeHasOpCode (PackageNode, AML_PACKAGE_OP, 0)))
{
ASSERT_EFI_ERROR (FALSE);
return EFI_INVALID_PARAMETER;
}
Status = AmlAddRegisterOrIntegerToPackage (NULL, Integer, PackageNode);
if (EFI_ERROR (Status)) {
ASSERT_EFI_ERROR (Status);
}
return Status;
}
/** AML code generation to invoke/call another method.
This method is a subset implementation of MethodInvocation

58
DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.c
View File

@ -1,7 +1,7 @@
/** @file
SSDT Serial Port Fixup Library.
Copyright (c) 2019 - 2021, Arm Limited. All rights reserved.<BR>
Copyright (c) 2019 - 2024, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@ -9,6 +9,9 @@
- Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR".
- Microsoft Debug Port Table 2 (DBG2) Specification - December 10, 2015.
- ACPI for Arm Components 1.0 - 2020
- Arm Generic Interrupt Controller Architecture Specification,
Issue H, January 2022.
(https://developer.arm.com/documentation/ihi0069/)
**/
#include <IndustryStandard/DebugPort2Table.h>
@ -27,6 +30,10 @@
#include <Library/AmlLib/AmlLib.h>
#include <Protocol/ConfigurationManagerProtocol.h>
#if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
#include <Library/ArmGicArchLib.h>
#endif
/** C array containing the compiled AML template.
This symbol is defined in the auto generated C file
containing the AML bytecode array.
@ -100,6 +107,26 @@ ValidateSerialPortInfo (
return EFI_INVALID_PARAMETER;
}
#if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
// If an interrupt is not wired to the serial port, the Configuration
// Manager specifies the interrupt as 0.
// Any other value must be within the SPI or extended SPI range.
if ((SerialPortInfo->Interrupt != 0) &&
!(((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_SPI_MIN) &&
(SerialPortInfo->Interrupt <= ARM_GIC_ARCH_SPI_MAX)) ||
((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_EXT_SPI_MIN) &&
(SerialPortInfo->Interrupt <= ARM_GIC_ARCH_EXT_SPI_MAX))))
{
DEBUG ((
DEBUG_ERROR,
"ERROR: Invalid UART port interrupt ID. Interrupt = %lu\n",
SerialPortInfo->Interrupt
));
return EFI_INVALID_PARAMETER;
}
#endif
DEBUG ((DEBUG_INFO, "UART Configuration:\n"));
DEBUG ((
DEBUG_INFO,
@ -270,7 +297,6 @@ FixupCrs (
EFI_STATUS Status;
AML_OBJECT_NODE_HANDLE NameOpCrsNode;
AML_DATA_NODE_HANDLE QWordRdNode;
AML_DATA_NODE_HANDLE InterruptRdNode;
// Get the "_CRS" object defined by the "Name ()" statement.
Status = AmlFindNode (
@ -303,20 +329,22 @@ FixupCrs (
return Status;
}
// Get the Interrupt node.
// It is the second Resource Data element in the NameOpCrsNode's
// variable list of arguments.
Status = AmlNameOpGetNextRdNode (QWordRdNode, &InterruptRdNode);
if (EFI_ERROR (Status)) {
return Status;
}
// Generate an interrupt node as the second Resource Data element in the
// NameOpCrsNode, if the interrupt for the serial-port is a valid SPI from
// Table 2-1 in Arm Generic Interrupt Controller Architecture Specification.
Status = AmlCodeGenRdInterrupt (
TRUE, // Resource Consumer
FALSE, // Level Triggered
FALSE, // Active High
FALSE, // Exclusive
(UINT32 *)&SerialPortInfo->Interrupt,
1,
NameOpCrsNode,
NULL
);
ASSERT_EFI_ERROR (Status);
if (InterruptRdNode == NULL) {
return EFI_INVALID_PARAMETER;
}
// Update the interrupt number.
return AmlUpdateRdInterrupt (InterruptRdNode, SerialPortInfo->Interrupt);
return Status;
}
/** Fixup the Serial Port device name.

5
DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortFixupLib.inf
View File

@ -18,12 +18,15 @@
SsdtSerialPortFixupLib.c
SsdtSerialPortTemplate.asl
[Packages]
[Packages.common]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
DynamicTablesPkg/DynamicTablesPkg.dec
[Packages.ARM, Packages.AARCH64]
ArmPkg/ArmPkg.dec
[LibraryClasses]
AcpiHelperLib
AmlLib

29
DynamicTablesPkg/Library/Common/SsdtSerialPortFixupLib/SsdtSerialPortTemplate.asl
View File

@ -1,7 +1,7 @@
/** @file
SSDT Serial Template
Copyright (c) 2019 - 2020, Arm Limited. All rights reserved.<BR>
Copyright (c) 2019 - 2024, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@ -10,6 +10,7 @@
@par Glossary:
- {template} - Data fixed up using AML Fixup APIs.
- {codegen} - Data generated using AML Codegen APIs.
**/
DefinitionBlock ("SsdtSerialPortTemplate.aml", "SSDT", 2, "ARMLTD", "SERIAL", 1) {
@ -43,17 +44,21 @@ DefinitionBlock ("SsdtSerialPortTemplate.aml", "SSDT", 2, "ARMLTD", "SERIAL", 1)
, // MemoryRangeType
// TranslationType
) // QWordMemory
Interrupt (
ResourceConsumer, // ResourceUsage
Level, // EdgeLevel
ActiveHigh, // ActiveLevel
Exclusive, // Shared
, // ResourceSourceIndex
, // ResourceSource
// DescriptorName
) {
0xA5 // {template}
} // Interrupt
// The Interrupt information is generated using AmlCodegen.
//
// Interrupt ( // {codegen}
// ResourceConsumer, // ResourceUsage
// Level, // EdgeLevel
// ActiveHigh, // ActiveLevel
// Exclusive, // Shared
// , // ResourceSourceIndex
// , // ResourceSource
// // DescriptorName
// ) {
// <IRQ> // <spi>
// } // Interrupt
}) // Name
} // Device
} // Scope (_SB)

2
EmbeddedPkg/Drivers/NonCoherentIoMmuDxe/NonCoherentIoMmuDxe.c
View File

@ -70,7 +70,7 @@ NonCoherentIoMmuSetAttribute (
IN UINT64 IoMmuAccess
)
{
return EFI_UNSUPPORTED;
return EFI_SUCCESS;
}
/**

10
EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboard.c
View File

@ -694,11 +694,12 @@ KeyboardReadKeyStrokeWorker (
/**
Read out the scan code of the key that has just been stroked.
@param This Pointer of simple text Protocol.
@param Key Pointer for store the key that read out.
@param This Pointer of simple text Protocol.
@param Key Pointer for store the key that read out.
@retval EFI_SUCCESS The key is read out successfully.
@retval other The key reading failed.
@retval EFI_SUCCESS The key is read out successfully.
@retval other The key reading failed.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS
@ -752,6 +753,7 @@ VirtualKeyboardReadKeyStroke (
@retval EFI_DEVICE_ERROR The keystroke information was not returned
due to hardware errors.
@retval EFI_INVALID_PARAMETER KeyData is NULL.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS

10
EmbeddedPkg/Drivers/VirtualKeyboardDxe/VirtualKeyboard.h
View File

@ -496,11 +496,12 @@ KeyNotifyProcessHandler (
/**
Read out the scan code of the key that has just been stroked.
@param This Pointer of simple text Protocol.
@param Key Pointer for store the key that read out.
@param This Pointer of simple text Protocol.
@param Key Pointer for store the key that read out.
@retval EFI_SUCCESS The key is read out successfully.
@retval other The key reading failed.
@retval EFI_SUCCESS The key is read out successfully.
@retval other The key reading failed.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS
@ -523,6 +524,7 @@ VirtualKeyboardReadKeyStroke (
@retval EFI_DEVICE_ERROR The keystroke information was not returned due to
hardware errors.
@retval EFI_INVALID_PARAMETER KeyData is NULL.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS

77
EmbeddedPkg/Scripts/LauterbachT32/EfiLoadDxe.cmm
View File

@ -1,79 +1,22 @@
;
; Copyright (c) 2024, Ampere Computing LLC. All rights reserved.<BR>
; Copyright (c) 2011, Hewlett-Packard Company. All rights reserved.<BR>
;
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
LOCAL &maxmem &systbl &memsize
&memsize=0x20000000 ; default to 512MB
gosub FindSystemTable &memsize
ENTRY &systbl
if &systbl!=0
(
print "found system table at &systbl"
gosub FindDebugInfo &systbl
)
else
(
print "ERROR: system table not found, check memory size"
)
PARAMETERS &systbl
gosub FindDebugInfo &systbl
enddo
FindSystemTable:
LOCAL &TopOfRam &offset
ENTRY &TopOfRam
print "FindSystemTable"
print "top of mem is &TopOfRam$"
&offset=&TopOfRam
; align to highest 4MB boundary
&offset=&offset&0xFFC00000
; start at top and look on 4MB boundaries for system table ptr structure
while &offset>0
(
; low signature match
if Data.Long(a:&offset)==0x20494249
(
; high signature match
if Data.Long(a:&offset+4)==0x54535953
(
; less than 4GB?
if Data.Long(a:&offset+0x0c)==0
(
; less than top of ram?
if Data.Long(a:&offset+8)<&TopOfRam
(
return Data.Long(a:&offset+8)
)
)
)
)
if &offset<0x400000
(
return 0
)
&offset=&offset-0x400000
)
return 0
FindDebugInfo:
LOCAL &SystemTable &CfgTableEntries &ConfigTable &i &offset &dbghdr &dbgentries &dbgptr &dbginfo &loadedimg
ENTRY &SystemTable
print "FindDebugInfo"
&dbgentries=0
&CfgTableEntries=Data.Long(a:&SystemTable+0x40)
&ConfigTable=Data.Long(a:&SystemTable+0x44)
&CfgTableEntries=Data.Long(a:&SystemTable+0x68)
&ConfigTable=Data.Long(a:&SystemTable+0x70)
print "config table is at &ConfigTable (&CfgTableEntries entries)"
@ -82,7 +25,7 @@ FindDebugInfo:
&i=0
while &i<&CfgTableEntries
(
&offset=&ConfigTable+(&i*0x14)
&offset=&ConfigTable+(&i*0x18)
if Data.Long(a:&offset)==0x49152E77
(
if Data.Long(a:&offset+4)==0x47641ADA
@ -120,8 +63,10 @@ FindDebugInfo:
(
if Data.Long(a:&dbginfo)==1 ; normal debug info type
(
&loadedimg=Data.Long(a:&dbginfo+4)
do EfiProcessPeImage Data.Long(a:&loadedimg+0x20)
&loadedimg=Data.Long(a:&dbginfo+8)
&imagebaseptr=&loadedimg+0x40
&imagebase=Data.Long(a:&imagebaseptr)
do ~~~~/EfiProcessPeImage.cmm "&imagebase"
)
)
&i=&i+1

7
EmbeddedPkg/Scripts/LauterbachT32/EfiProcessPeImage.cmm
View File

@ -1,4 +1,5 @@
;
; Copyright (c) 2024, Ampere Computing LLC. All rights reserved.<BR>
; Copyright (c) 2011, Hewlett-Packard Company. All rights reserved.<BR>
;
; SPDX-License-Identifier: BSD-2-Clause-Patent
@ -10,11 +11,11 @@
&imgstart=&imgstart
print "PE32 image found at &imgstart"
; offset from dos hdr to PE file hdr
; offset from dos hdr to PE file hdr (i.e. 'PE\0\0' signature)
&filehdrstart=&imgstart+Data.Long(c:&imgstart+0x3C)
; offset to debug dir in PE hdrs
&debugdirentryrva=Data.Long(c:&filehdrstart+0xA8)
&debugdirentryrva=Data.Long(c:&imgstart+0xf10)
if &debugdirentryrva==0
(
print "no debug dir for image at &imgstart"
@ -62,7 +63,7 @@
&elfbase=&baseofdata;
)
print "found path &elfpath"
print "found path &elfpath with address &elfbase"
ON ERROR GOSUB
return
data.load.elf &elfpath &elfbase /NOCODE /NOCLEAR

8
EmbeddedPkg/Scripts/LauterbachT32/Readme.md
View File

@ -1,10 +1,10 @@
# DXE Phase Debug
Update the memsize variable in EfiLoadDxe.cmm for the actual amount of memory
available in your system. Allow your system to boot to the point that the DXE
Allow your system to boot to the point that the DXE
core is initialized (so that the System Table and Debug Information table is
present in memory) and execute this script (using the toolbar button or
'do EfiLoadDxe' from the command area). It will scan memory for the debug info
table and load modules in it.
'do EfiLoadDxe "0xGST_ADDRESS"' from the command area). 'GST_ADDRESS' is the
address of the EFI_SYSTEM_TABLE, and can be found by the global `gST`.
The script will scan memory for the debug info table and load modules in it.
# SEC/PEI Phase Debug
There is no way to autodetect where these images reside so you must pass an

2
EmulatorPkg/EmuGopDxe/GopInput.c
View File

@ -156,6 +156,7 @@ EmuGopSimpleTextInReset (
@retval EFI_NOT_READY There was no keystroke data available.
@retval EFI_DEVICE_ERROR The keystroke information was not returned due to
hardware errors.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS
@ -339,6 +340,7 @@ EmuGopSimpleTextInExResetEx (
EFI_DEVICE_ERROR The keystroke
information was not returned due to
hardware errors.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/

35
EmulatorPkg/EmulatorPkg.dsc
View File

@ -127,11 +127,12 @@
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
RngLib|MdeModulePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
SecureBootVariableLib|SecurityPkg/Library/SecureBootVariableLib/SecureBootVariableLib.inf
@ -278,6 +279,27 @@
gEfiRedfishPkgTokenSpaceGuid.PcdRedfishRestExServiceDevicePath.DevicePath|{DEVICE_PATH("MAC(000000000000,0x1)")}
gEfiRedfishPkgTokenSpaceGuid.PcdRedfishRestExServiceAccessModeInBand|False
gEfiRedfishPkgTokenSpaceGuid.PcdRedfishDiscoverAccessModeInBand|False
gEmulatorPkgTokenSpaceGuid.PcdRedfishServiceStopIfSecureBootDisabled|False
gEmulatorPkgTokenSpaceGuid.PcdRedfishServiceStopIfExitbootService|False
gEfiRedfishClientPkgTokenSpaceGuid.PcdRedfishServiceEtagSupported|False
#
# Redfish Debug enablement
#
# 0x0000000000000001 RedfishPlatformConfigDxe driver debug enabled.
gEfiRedfishPkgTokenSpaceGuid.PcdRedfishDebugCategory|0
# 0x00000001 x-uefi-redfish string database message enabled
# 0x00000002 Debug Message for dumping formset
# 0x00000004 Debug Message for x-uefi-redfish searching result
# 0x00000008 Debug Message for x-uefi-redfish Regular Expression searching result
gEfiRedfishPkgTokenSpaceGuid.PcdRedfishPlatformConfigDebugProperty|0
# Redfish Platform Configure DXE driver feature enablement
# 0x00000001 Enable building Redfish Attribute Registry menu path.
# 0x00000002 Allow supressed HII option to be exposed on Redfish.
gEfiRedfishPkgTokenSpaceGuid.PcdRedfishPlatformConfigFeatureProperty|0
!endif
[PcdsDynamicDefault.common.DEFAULT]
@ -377,6 +399,15 @@
EmulatorPkg/PlatformSmbiosDxe/PlatformSmbiosDxe.inf
EmulatorPkg/TimerDxe/Timer.inf
#
# Rng Protocol producer
#
SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
#
# Hash2 Protocol producer
#
SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf
!if $(SECURE_BOOT_ENABLE) == TRUE
SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
!endif

11
EmulatorPkg/EmulatorPkg.fdf
View File

@ -193,6 +193,16 @@ INF RuleOverride = UI MdeModulePkg/Application/UiApp/UiApp.inf
INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf
INF MdeModulePkg/Universal/DriverSampleDxe/DriverSampleDxe.inf
#
# Rng Protocol producer
#
INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf
#
# Hash2 Protocol producer
#
INF SecurityPkg/Hash2DxeCrypto/Hash2DxeCrypto.inf
#
# Secure Boot Key Enroll
#
@ -320,4 +330,3 @@ INF ShellPkg/Application/Shell/Shell.inf
UI STRING="$(MODULE_NAME)" Optional
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
}

9
EmulatorPkg/Sec/Sec.h
View File

@ -20,15 +20,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Ppi/TemporaryRamSupport.h>
//
// I think this should be defined in a MdePkg include file?
//
VOID
EFIAPI
ProcessLibraryConstructorList (
VOID
);
EFI_STATUS
EFIAPI
SecTemporaryRamSupport (

2
EmulatorPkg/Sec/Sec.inf
View File

@ -11,7 +11,7 @@
##
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = EmuSec
FILE_GUID = BCAF98C9-22B0-3B4F-9CBD-C8A6B4DBCEE9
MODULE_TYPE = SEC

3
IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
View File

@ -8,7 +8,7 @@
##
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = Fsp24SecCoreM
FILE_GUID = C5BC0719-4A23-4F6E-94DA-05FB6A0DFA9C
MODULE_TYPE = SEC
@ -60,6 +60,7 @@
FspSecPlatformLib
CpuLib
FspMultiPhaseLib
FspPlatformLib
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES

3
IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
View File

@ -8,7 +8,7 @@
##
[Defines]
INF_VERSION = 0x00010005
INF_VERSION = 1.30
BASE_NAME = FspSecCoreM
FILE_GUID = C2F9AE46-3437-4FEF-9CB1-9A568B282FEE
MODULE_TYPE = SEC
@ -59,6 +59,7 @@
FspCommonLib
FspSecPlatformLib
CpuLib
FspPlatformLib
[Pcd]
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES

1
IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
View File

@ -11,7 +11,6 @@
; Following are fixed PCDs
;
extern ASM_PFX(PcdGet32(PcdTemporaryRamBase))
extern ASM_PFX(PcdGet32(PcdTemporaryRamSize))
extern ASM_PFX(PcdGet32(PcdFspTemporaryRamSize))
extern ASM_PFX(PcdGet8 (PcdFspHeapSizePercentage))

1
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
View File

@ -11,7 +11,6 @@
; Following are fixed PCDs
;
extern ASM_PFX(PcdGet32(PcdTemporaryRamBase))
extern ASM_PFX(PcdGet32(PcdTemporaryRamSize))
extern ASM_PFX(PcdGet32(PcdFspTemporaryRamSize))
extern ASM_PFX(PcdGet8 (PcdFspHeapSizePercentage))

60
IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
View File

@ -109,7 +109,8 @@ struc LoadMicrocodeParamsFsp24
.FsptArchReserved: resb 3
.FsptArchLength: resd 1
.FspDebugHandler resq 1
.FsptArchUpd: resd 4
.FspTemporaryRamSize: resd 1 ; Supported only if ArchRevison is >= 3
.FsptArchUpd: resd 3
; }
; FSPT_CORE_UPD {
.MicrocodeCodeAddr: resq 1
@ -267,7 +268,7 @@ ASM_PFX(LoadMicrocodeDefault):
cmp byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
jb Fsp20UpdHeader
cmp byte [esp + LoadMicrocodeParamsFsp22.FsptArchRevision], 2
je Fsp24UpdHeader
jae Fsp24UpdHeader
jmp Fsp22UpdHeader
Fsp20UpdHeader:
@ -405,7 +406,7 @@ CheckAddress:
cmp byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
jb Fsp20UpdHeader1
cmp byte [esp + LoadMicrocodeParamsFsp22.FsptArchRevision], 2
je Fsp24UpdHeader1;
jae Fsp24UpdHeader1;
jmp Fsp22UpdHeader1
Fsp20UpdHeader1:
@ -497,7 +498,8 @@ ASM_PFX(EstablishStackFsp):
; Enable FSP STACK
;
mov esp, DWORD [ASM_PFX(PcdGet32 (PcdTemporaryRamBase))]
add esp, DWORD [ASM_PFX(PcdGet32 (PcdTemporaryRamSize))]
LOAD_TEMPORARY_RAM_SIZE ecx
add esp, ecx
push DATA_LEN_OF_MCUD ; Size of the data region
push 4455434Dh ; Signature of the data region 'MCUD'
@ -506,7 +508,7 @@ ASM_PFX(EstablishStackFsp):
cmp byte [edx + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2
jb Fsp20UpdHeader2
cmp byte [esp + LoadMicrocodeParamsFsp22.FsptArchRevision], 2
je Fsp24UpdHeader2
jae Fsp24UpdHeader2
jmp Fsp22UpdHeader2
Fsp20UpdHeader2:
@ -554,12 +556,13 @@ ContinueAfterUpdPush:
;
; Set ECX/EDX to the BootLoader temporary memory range
;
mov ecx, [ASM_PFX(PcdGet32 (PcdTemporaryRamBase))]
mov edx, ecx
add edx, [ASM_PFX(PcdGet32 (PcdTemporaryRamSize))]
mov edx, [ASM_PFX(PcdGet32 (PcdTemporaryRamBase))]
LOAD_TEMPORARY_RAM_SIZE ecx
add edx, ecx
sub edx, [ASM_PFX(PcdGet32 (PcdFspReservedBufferSize))]
mov ecx, [ASM_PFX(PcdGet32 (PcdTemporaryRamBase))]
cmp ecx, edx ;If PcdFspReservedBufferSize >= PcdTemporaryRamSize, then error.
cmp ecx, edx ;If PcdFspReservedBufferSize >= TemporaryRamSize, then error.
jb EstablishStackFspSuccess
mov eax, 80000003h ;EFI_UNSUPPORTED
jmp EstablishStackFspExit
@ -599,6 +602,45 @@ ASM_PFX(TempRamInitApi):
CALL_EBP ASM_PFX(LoadUpdPointerToECX) ; ECX for UPD param
SAVE_ECX ; save UPD param to slot 3 in xmm6
mov edx, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))
mov edx, DWORD [edx]
;
; Read Fsp Arch2 revision
;
cmp byte [ecx + LoadMicrocodeParamsFsp24.FsptArchRevision], 3
jb UseTemporaryRamSizePcd
;
; Read ARCH2 UPD input value.
;
mov ebx, DWORD [ecx + LoadMicrocodeParamsFsp24.FspTemporaryRamSize]
;
; As per spec, if Bootloader pass zero, use Fsp defined Size
;
cmp ebx, 0
jz UseTemporaryRamSizePcd
xor eax, eax
mov ax, WORD [esi + 020h] ; Read ImageAttribute
test ax, 16 ; check if Bit4 is set
jnz ConsumeInputConfiguration
;
; Sometimes user may change input value even if it is not supported
; return error if input is Non-Zero and not same as PcdTemporaryRamSize.
;
cmp ebx, edx
je UseTemporaryRamSizePcd
mov eax, 080000002h ; RETURN_INVALID_PARAMETER
jmp TempRamInitExit
ConsumeInputConfiguration:
;
; Read ARCH2 UPD value and Save.
;
SAVE_TEMPORARY_RAM_SIZE ebx
jmp GotTemporaryRamSize
UseTemporaryRamSizePcd:
SAVE_TEMPORARY_RAM_SIZE edx
GotTemporaryRamSize:
LOAD_ECX
;
; Sec Platform Init
;

11
IntelFsp2Pkg/FspSecCore/Ia32/SaveRestoreSseNasm.inc
View File

@ -128,6 +128,17 @@
SXMMN xmm5, 1, eax
%endmacro
;
; XMM5 slot 2 for TemporaryRamSize
;
%macro LOAD_TEMPORARY_RAM_SIZE 1
LXMMN xmm5, %1, 2
%endmacro
%macro SAVE_TEMPORARY_RAM_SIZE 1
SXMMN xmm5, 2, %1
%endmacro
%macro ENABLE_SSE 0
;
; Initialize floating point units

9
IntelFsp2Pkg/FspSecCore/SecFsp.c
View File

@ -54,6 +54,7 @@ SecGetPlatformData (
UINT32 TopOfCar;
UINT32 *StackPtr;
UINT32 DwordSize;
UINT32 TemporaryRamSize;
FspPlatformData = &FspData->PlatformData;
@ -67,12 +68,20 @@ SecGetPlatformData (
FspPlatformData->MicrocodeRegionSize = 0;
FspPlatformData->CodeRegionBase = 0;
FspPlatformData->CodeRegionSize = 0;
TemporaryRamSize = 0;
//
// Pointer to the size field
//
TopOfCar = PcdGet32 (PcdTemporaryRamBase) + PcdGet32 (PcdTemporaryRamSize);
StackPtr = (UINT32 *)(TopOfCar - sizeof (UINT32));
if ((*(StackPtr - 1) != FSP_MCUD_SIGNATURE) && (FspData->FspInfoHeader->ImageAttribute & BIT4)) {
ReadTemporaryRamSize (PcdGet32 (PcdTemporaryRamBase), &TemporaryRamSize);
if (TemporaryRamSize) {
TopOfCar = PcdGet32 (PcdTemporaryRamBase) + TemporaryRamSize;
StackPtr = (UINT32 *)(TopOfCar - sizeof (UINT32));
}
}
if (*(StackPtr - 1) == FSP_MCUD_SIGNATURE) {
while (*StackPtr != 0) {

1
IntelFsp2Pkg/FspSecCore/SecFsp.h
View File

@ -17,6 +17,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/FspCommonLib.h>
#include <Library/FspSecPlatformLib.h>
#include <Library/FspPlatformLib.h>
#define FSP_MCUD_SIGNATURE SIGNATURE_32 ('M', 'C', 'U', 'D')
#define FSP_PER0_SIGNATURE SIGNATURE_32 ('P', 'E', 'R', '0')

12
IntelFsp2Pkg/FspSecCore/SecMain.h
View File

@ -110,18 +110,6 @@ SecStartup (
IN UINT32 ApiIdx
);
/**
Autogenerated function that calls the library constructors for all of the module's
dependent libraries. This function must be called by the SEC Core once a stack has
been established.
**/
VOID
EFIAPI
ProcessLibraryConstructorList (
VOID
);
/**
Return value of esp.

67
IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm
View File

@ -76,7 +76,8 @@ struc LoadMicrocodeParamsFsp24
.FsptArchReserved: resb 3
.FsptArchLength: resd 1
.FspDebugHandler resq 1
.FsptArchUpd: resd 4
.FspTemporaryRamSize: resd 1 ; Supported only if ArchRevison is >= 3
.FsptArchUpd: resd 3
; }
; FSPT_CORE_UPD {
.MicrocodeCodeAddr: resq 1
@ -163,7 +164,7 @@ ASM_PFX(LoadMicrocodeDefault):
cmp byte [rsp + LoadMicrocodeParamsFsp24.FspUpdHeaderRevision], 2
jb ParamError
cmp byte [rsp + LoadMicrocodeParamsFsp24.FsptArchRevision], 2
jne ParamError
jb ParamError
; UPD structure is compliant with FSP spec 2.4
mov rax, qword [rsp + LoadMicrocodeParamsFsp24.MicrocodeCodeSize]
@ -273,7 +274,7 @@ CheckAddress:
cmp byte [rsp + LoadMicrocodeParamsFsp24.FspUpdHeaderRevision], 2
jb ParamError
cmp byte [rsp + LoadMicrocodeParamsFsp24.FsptArchRevision], 2
jne ParamError
jb ParamError
; UPD structure is compliant with FSP spec 2.4
; Is automatic size detection ?
@ -337,8 +338,8 @@ ASM_PFX(EstablishStackFsp):
;
mov rax, ASM_PFX(PcdGet32 (PcdTemporaryRamBase))
mov esp, DWORD[rax]
mov rax, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))
add esp, DWORD[rax]
LOAD_TEMPORARY_RAM_SIZE rax
add esp, eax
sub esp, 4
mov dword[esp], DATA_LEN_OF_MCUD ; Size of the data region
@ -349,7 +350,7 @@ ASM_PFX(EstablishStackFsp):
cmp byte [rdx + LoadMicrocodeParamsFsp24.FspUpdHeaderRevision], 2
jb ParamError1
cmp byte [rdx + LoadMicrocodeParamsFsp24.FsptArchRevision], 2
je Fsp24UpdHeader
jnb Fsp24UpdHeader
ParamError1:
mov rax, 08000000000000002h
@ -397,8 +398,8 @@ ContinueAfterUpdPush:
;
mov rcx, ASM_PFX(PcdGet32 (PcdTemporaryRamBase))
mov edx, [ecx]
mov rcx, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))
add edx, [ecx]
LOAD_TEMPORARY_RAM_SIZE rcx
add edx, ecx
mov rcx, ASM_PFX(PcdGet32 (PcdFspReservedBufferSize))
sub edx, [ecx]
mov rcx, ASM_PFX(PcdGet32 (PcdTemporaryRamBase))
@ -439,6 +440,14 @@ ASM_PFX(TempRamInitApi):
;
SAVE_BFV rbp
;
; Save timestamp into YMM6
;
rdtsc
shl rdx, 32
or rax, rdx
SAVE_TS rax
;
; Save Input Parameter in YMM10
;
@ -455,14 +464,46 @@ ASM_PFX(TempRamInitApi):
ParamValid:
SAVE_RCX
mov rdx, ASM_PFX(PcdGet32 (PcdTemporaryRamSize))
mov edx, DWORD [rdx]
;
; Save timestamp into YMM6
; Read Fsp Arch2 revision
;
rdtsc
shl rdx, 32
or rax, rdx
SAVE_TS rax
cmp byte [ecx + LoadMicrocodeParamsFsp24.FsptArchRevision], 3
jb UseTemporaryRamSizePcd
;
; Read ARCH2 UPD input value.
;
mov ebx, DWORD [ecx + LoadMicrocodeParamsFsp24.FspTemporaryRamSize]
;
; As per spec, if Bootloader pass zero, use Fsp defined Size
;
cmp ebx, 0
jz UseTemporaryRamSizePcd
xor rax, rax
mov ax, WORD [rsi + 020h] ; Read ImageAttribute
test ax, 16 ; check if Bit4 is set
jnz ConsumeInputConfiguration
;
; Sometimes user may change input value even if it is not supported
; return error if input is Non-Zero and not same as PcdTemporaryRamSize.
;
cmp ebx, edx
je UseTemporaryRamSizePcd
mov rax, 08000000000000002h ; RETURN_INVALID_PARAMETER
jmp TempRamInitExit
ConsumeInputConfiguration:
;
; Read ARCH2 UPD value and Save.
; Only low-32 bits of rbx/rdx holds the temporary ram size.
;
SAVE_TEMPORARY_RAM_SIZE rbx
jmp GotTemporaryRamSize
UseTemporaryRamSizePcd:
SAVE_TEMPORARY_RAM_SIZE rdx
GotTemporaryRamSize:
;
; Sec Platform Init
;

12
IntelFsp2Pkg/Include/FspEas/FspApi.h
View File

@ -139,7 +139,7 @@ typedef struct {
///
typedef struct {
///
/// Revision of the structure is 2 for this version of the specification.
/// Revision of the structure is 3 for this version of the specification.
///
UINT8 Revision;
UINT8 Reserved[3];
@ -152,7 +152,15 @@ typedef struct {
/// occurring during FSP execution.
///
EFI_PHYSICAL_ADDRESS FspDebugHandler;
UINT8 Reserved1[16];
///
/// FspTemporaryRamSize is Optional & valid only when
/// FSP image attribute (BIT4) is set. If Programmed as Zero, Platform
/// recommended value will be used, otherwise input value will be used
/// to configure TemporaryRamSize. Refer FSP Integration guide for valid
/// TemporaryRamSize range for each platform.
///
UINT32 FspTemporaryRamSize;
UINT8 Reserved1[12];
} FSPT_ARCH2_UPD;
///

13
IntelFsp2Pkg/Include/Library/FspPlatformLib.h
View File

@ -121,4 +121,17 @@ FspTempRamExitDone2 (
IN EFI_STATUS Status
);
/**
Calculate TemporaryRam Size using Base address.
@param[in] TemporaryRamBase the address of target memory
@param[out] TemporaryRamSize the size of target memory
**/
VOID
EFIAPI
ReadTemporaryRamSize (
IN UINT32 TemporaryRamBase,
OUT UINT32 *TemporaryRamSize
);
#endif

21
IntelFsp2Pkg/Include/SaveRestoreSseAvxNasm.inc
View File

@ -201,6 +201,27 @@
movq rcx, xmm5
%endmacro
;
; Save TemporaryRamSize to YMM10[192:255]
; arg 1:general purpose register which holds TemporaryRamSize
; Modified: XMM5 and YMM10[192:255]
;
%macro SAVE_TEMPORARY_RAM_SIZE 1
LYMMN ymm10, xmm5, 1
SXMMN xmm5, 1, %1
SYMMN ymm10, 1, xmm5
%endmacro
;
; Restore TemporaryRamSize from YMM10[192:255]
; arg 1:general purpose register where to save TemporaryRamSize
; Modified: XMM5 and %1
;
%macro LOAD_TEMPORARY_RAM_SIZE 1
LYMMN ymm10, xmm5, 1
LXMMN xmm5, %1, 1
%endmacro
;
; YMM7[128:191] for calling stack
; arg 1:Entry

4
IntelFsp2Pkg/IntelFsp2Pkg.dsc
View File

@ -46,9 +46,9 @@
FspSecPlatformLib|IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf
FspMultiPhaseLib|IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
[LibraryClasses.common.PEIM]
[LibraryClasses.common.PEIM, LibraryClasses.common.SEC]
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf

38
IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
View File

@ -6,6 +6,7 @@
**/
#include <PiPei.h>
#include <Register/Intel/Msr.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
@ -119,3 +120,40 @@ FspGetSystemMemorySize (
Hob.Raw = GET_NEXT_HOB (Hob);
}
}
/**
Calculate TemporaryRam Size using Base address.
@param[in] TemporaryRamBase the address of target memory
@param[out] TemporaryRamSize the size of target memory
**/
VOID
EFIAPI
ReadTemporaryRamSize (
IN UINT32 TemporaryRamBase,
OUT UINT32 *TemporaryRamSize
)
{
MSR_IA32_MTRRCAP_REGISTER Msr;
UINT32 MsrNum;
UINT32 MsrNumEnd;
if (TemporaryRamBase == 0) {
return;
}
*TemporaryRamSize = 0;
Msr.Uint64 = AsmReadMsr64 (MSR_IA32_MTRRCAP);
MsrNumEnd = MSR_IA32_MTRR_PHYSBASE0 + (2 * (Msr.Bits.VCNT));
for (MsrNum = MSR_IA32_MTRR_PHYSBASE0; MsrNum < MsrNumEnd; MsrNum += 2) {
if ((AsmReadMsr64 (MsrNum+1) & BIT11) != 0 ) {
if (TemporaryRamBase == (AsmReadMsr64 (MsrNum) & 0xFFFFF000)) {
*TemporaryRamSize = (~(AsmReadMsr64 (MsrNum + 1) & 0xFFFFF000) + 1);
break;
}
}
}
return;
}

96
IntelFsp2Pkg/Tools/GenCfgOpt.py
View File

@ -136,7 +136,7 @@ class CLogicalExpression:
var = var.strip()
if re.match('^0x[a-fA-F0-9]+$', var):
value = int(var, 16)
elif re.match('^[+-]?\d+$', var):
elif re.match(r'^[+-]?\d+$', var):
value = int(var, 10)
else:
value = None
@ -147,7 +147,7 @@ class CLogicalExpression:
var = ''
while not self.isLast():
char = self.getCurr()
if re.match('^[\w.]', char):
if re.match(r'^[\w.]', char):
var += char
self.moveNext()
else:
@ -161,7 +161,7 @@ class CLogicalExpression:
def parseSingleOp(self):
self.skipSpace()
if re.match('^NOT\W', self.getCurr(-1)):
if re.match(r'^NOT\W', self.getCurr(-1)):
self.moveNext(3)
op = self.parseBrace()
val = self.getNumber (op)
@ -225,7 +225,7 @@ class CLogicalExpression:
value = self.parseCompare()
while True:
self.skipSpace()
if re.match('^AND\W', self.getCurr(-1)):
if re.match(r'^AND\W', self.getCurr(-1)):
self.moveNext(3)
result = self.parseCompare()
test = self.getNonNumber(result, value)
@ -243,10 +243,10 @@ class CLogicalExpression:
while True:
self.skipSpace()
op = None
if re.match('^XOR\W', self.getCurr(-1)):
if re.match(r'^XOR\W', self.getCurr(-1)):
self.moveNext(3)
op = '^'
elif re.match('^OR\W', self.getCurr(-1)):
elif re.match(r'^OR\W', self.getCurr(-1)):
self.moveNext(2)
op = '|'
else:
@ -330,11 +330,11 @@ EndList
continue
if IsExpression:
IsExpression = False
Match = re.match("(\w+)=(.+)", Macro)
Match = re.match(r"(\w+)=(.+)", Macro)
if Match:
self._MacroDict[Match.group(1)] = Match.group(2)
else:
Match = re.match("(\w+)", Macro)
Match = re.match(r"(\w+)", Macro)
if Match:
self._MacroDict[Match.group(1)] = ''
if len(self._MacroDict) == 0:
@ -355,7 +355,7 @@ EndList
def ExpandMacros (self, Input, Preserve = False):
Line = Input
Match = re.findall("\$\(\w+\)", Input)
Match = re.findall(r"\$\(\w+\)", Input)
if Match:
for Each in Match:
Variable = Each[2:-1]
@ -370,7 +370,7 @@ EndList
def ExpandPcds (self, Input):
Line = Input
Match = re.findall("(\w+\.\w+)", Input)
Match = re.findall(r"(\w+\.\w+)", Input)
if Match:
for PcdName in Match:
if PcdName in self._PcdsDict:
@ -390,7 +390,7 @@ EndList
return Result
def ValueToByteArray (self, ValueStr, Length):
Match = re.match("\{\s*FILE:(.+)\}", ValueStr)
Match = re.match(r"\{\s*FILE:(.+)\}", ValueStr)
if Match:
FileList = Match.group(1).split(',')
Result = bytearray()
@ -427,7 +427,7 @@ EndList
if Each[0] in ['"', "'"]:
Result.extend(list(bytearray(Each[1:-1], 'utf-8')))
elif ':' in Each:
Match = re.match("(.+):(\d+)b", Each)
Match = re.match(r"(.+):(\d+)b", Each)
if Match is None:
raise Exception("Invald value list format '%s' !" % Each)
InBitField = True
@ -539,7 +539,7 @@ EndList
continue
Handle = False
Match = re.match("^\[(.+)\]", DscLine)
Match = re.match(r"^\[(.+)\]", DscLine)
if Match is not None:
IsDefSect = False
IsPcdSect = False
@ -575,7 +575,7 @@ EndList
Match = False if DscLine[0] != '!' else True
if Match:
Match = re.match("^!(else|endif|ifdef|ifndef|if|elseif|include)\s*(.+)?$", DscLine.split("#")[0])
Match = re.match(r"^!(else|endif|ifdef|ifndef|if|elseif|include)\s*(.+)?$", DscLine.split("#")[0])
Keyword = Match.group(1) if Match else ''
Remaining = Match.group(2) if Match else ''
Remaining = '' if Remaining is None else Remaining.strip()
@ -620,7 +620,7 @@ EndList
else:
Handle = True
if Handle:
Match = re.match("!include\s+(.+)", DscLine)
Match = re.match(r"!include\s+(.+)", DscLine)
if Match:
IncludeFilePath = Match.group(1)
IncludeFilePath = self.ExpandMacros(IncludeFilePath)
@ -660,7 +660,7 @@ EndList
#DEFINE FSP_T_UPD_TOOL_GUID = 34686CA3-34F9-4901-B82A-BA630F0714C6
#DEFINE FSP_M_UPD_TOOL_GUID = 39A250DB-E465-4DD1-A2AC-E2BD3C0E2385
#DEFINE FSP_S_UPD_TOOL_GUID = CAE3605B-5B34-4C85-B3D7-27D54273C40F
Match = re.match("^\s*(?:DEFINE\s+)*(\w+)\s*=\s*(.+)", DscLine)
Match = re.match(r"^\s*(?:DEFINE\s+)*(\w+)\s*=\s*(.+)", DscLine)
if Match:
self._MacroDict[Match.group(1)] = self.ExpandMacros(Match.group(2))
if self.Debug:
@ -668,21 +668,21 @@ EndList
elif IsPcdSect:
#gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE
#gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE
Match = re.match("^\s*([\w\.]+)\s*\|\s*(\w+)", DscLine)
Match = re.match(r"^\s*([\w\.]+)\s*\|\s*(\w+)", DscLine)
if Match:
self._PcdsDict[Match.group(1)] = Match.group(2)
if self.Debug:
print ("INFO : PCD %s = [ %s ]" % (Match.group(1), Match.group(2)))
i = 0
while i < len(BuildOptionPcd):
Match = re.match("\s*([\w\.]+)\s*\=\s*(\w+)", BuildOptionPcd[i])
Match = re.match(r"\s*([\w\.]+)\s*\=\s*(\w+)", BuildOptionPcd[i])
if Match:
self._PcdsDict[Match.group(1)] = Match.group(2)
i += 1
elif IsTmpSect:
# !BSF DEFT:{GPIO_TMPL:START}
Match = re.match("^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|END)}", DscLine)
Match = re.match(r"^\s*#\s+(!BSF)\s+DEFT:{(.+?):(START|END)}", DscLine)
if Match:
if Match.group(3) == 'START' and not TemplateName:
TemplateName = Match.group(2).strip()
@ -691,33 +691,33 @@ EndList
TemplateName = ''
else:
if TemplateName:
Match = re.match("^!include\s*(.+)?$", DscLine)
Match = re.match(r"^!include\s*(.+)?$", DscLine)
if Match:
continue
self._BsfTempDict[TemplateName].append(DscLine)
else:
Match = re.match("^\s*#\s+(!BSF|@Bsf|!HDR)\s+(.+)", DscLine)
Match = re.match(r"^\s*#\s+(!BSF|@Bsf|!HDR)\s+(.+)", DscLine)
if Match:
Remaining = Match.group(2)
if Match.group(1) == '!BSF' or Match.group(1) == '@Bsf':
Match = re.match("(?:^|.+\s+)PAGES:{(.+?)}", Remaining)
Match = re.match(r"(?:^|.+\s+)PAGES:{(.+?)}", Remaining)
if Match:
# !BSF PAGES:{HSW:"Haswell System Agent", LPT:"Lynx Point PCH"}
PageList = Match.group(1).split(',')
for Page in PageList:
Page = Page.strip()
Match = re.match("(\w+):\"(.+)\"", Page)
Match = re.match(r"(\w+):\"(.+)\"", Page)
if Match != None:
self._CfgPageDict[Match.group(1)] = Match.group(2)
Match = re.match("(?:^|.+\s+)BLOCK:{NAME:\"(.+)\"\s*,\s*VER:\"(.+)\"\s*}", Remaining)
Match = re.match(r"(?:^|.+\s+)BLOCK:{NAME:\"(.+)\"\s*,\s*VER:\"(.+)\"\s*}", Remaining)
if Match:
self._CfgBlkDict['name'] = Match.group(1)
self._CfgBlkDict['ver'] = Match.group(2)
for Key in self._BsfKeyList:
Match = re.match("(?:^|.+\s+)%s:{(.+?)}" % Key, Remaining)
Match = re.match(r"(?:^|.+\s+)%s:{(.+?)}" % Key, Remaining)
if Match:
if Key in ['NAME', 'HELP', 'OPTION'] and Match.group(1).startswith('+'):
ConfigDict[Key.lower()] += Match.group(1)[1:]
@ -725,15 +725,15 @@ EndList
ConfigDict[Key.lower()] = Match.group(1)
else:
for Key in self._HdrKeyList:
Match = re.match("(?:^|.+\s+)%s:{(.+?)}" % Key, Remaining)
Match = re.match(r"(?:^|.+\s+)%s:{(.+?)}" % Key, Remaining)
if Match:
ConfigDict[Key.lower()] = Match.group(1)
Match = re.match("^\s*#\s+@Prompt\s+(.+)", DscLine)
Match = re.match(r"^\s*#\s+@Prompt\s+(.+)", DscLine)
if Match:
ConfigDict['name'] = Match.group(1)
Match = re.match("^\s*#\s*@ValidList\s*(.+)\s*\|\s*(.+)\s*\|\s*(.+)\s*", DscLine)
Match = re.match(r"^\s*#\s*@ValidList\s*(.+)\s*\|\s*(.+)\s*\|\s*(.+)\s*", DscLine)
if Match:
if Match.group(2).strip() in self._BuidinOption:
ConfigDict['option'] = Match.group(2).strip()
@ -749,22 +749,22 @@ EndList
ConfigDict['option'] += ', '
ConfigDict['type'] = "Combo"
Match = re.match("^\s*#\s*@ValidRange\s*(.+)\s*\|\s*(.+)\s*-\s*(.+)\s*", DscLine)
Match = re.match(r"^\s*#\s*@ValidRange\s*(.+)\s*\|\s*(.+)\s*-\s*(.+)\s*", DscLine)
if Match:
if "0x" in Match.group(2) or "0x" in Match.group(3):
ConfigDict['type'] = "EditNum, HEX, (%s,%s)" % (Match.group(2), Match.group(3))
else:
ConfigDict['type'] = "EditNum, DEC, (%s,%s)" % (Match.group(2), Match.group(3))
Match = re.match("^\s*##\s+(.+)", DscLine)
Match = re.match(r"^\s*##\s+(.+)", DscLine)
if Match:
ConfigDict['help'] = Match.group(1)
# Check VPD/UPD
if IsUpdSect:
Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+|\*)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
Match = re.match(r"^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+|\*)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
else:
Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)(?:\s*\|\s*(.+))?", DscLine)
Match = re.match(r"^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)(?:\s*\|\s*(.+))?", DscLine)
if Match:
ConfigDict['space'] = Match.group(1)
ConfigDict['cname'] = Match.group(2)
@ -796,13 +796,13 @@ EndList
Value = ''
Value = Value.strip()
if '|' in Value:
Match = re.match("^.+\s*\|\s*(.+)", Value)
Match = re.match(r"^.+\s*\|\s*(.+)", Value)
if Match:
Value = Match.group(1)
Length = -1
ConfigDict['length'] = Length
Match = re.match("\$\((\w+)\)", Value)
Match = re.match(r"\$\((\w+)\)", Value)
if Match:
if Match.group(1) in self._MacroDict:
Value = self._MacroDict[Match.group(1)]
@ -879,7 +879,7 @@ EndList
# !BSF FIELD:{SerialDebugPortAddress0:1}
# or
# @Bsf FIELD:{SerialDebugPortAddress0:1b}
Match = re.match("^\s*#\s+(!BSF|@Bsf)\s+FIELD:{(.+):(\d+)([Bb])?}", DscLine)
Match = re.match(r"^\s*#\s+(!BSF|@Bsf)\s+FIELD:{(.+):(\d+)([Bb])?}", DscLine)
if Match:
SubCfgDict = ConfigDict.copy()
if (Match.group(4) == None) or (Match.group(4) == 'B'):
@ -1023,7 +1023,7 @@ EndList
self._VarDict['_LENGTH_'] = '%d' % (Item['offset'] + Item['length'])
for Item in self._CfgItemList:
Embed = Item['embed']
Match = re.match("^(\w+):(\w+):(START|END)", Embed)
Match = re.match(r"^(\w+):(\w+):(START|END)", Embed)
if Match:
StructName = Match.group(1)
VarName = '_%s_%s_' % (Match.group(3), StructName)
@ -1215,7 +1215,7 @@ EndList
IsUpdHeader = False
for Line in TextBody:
SplitToLines = Line.splitlines()
MatchComment = re.match("^/\*\sCOMMENT:(\w+):([\w|\W|\s]+)\s\*/\s([\s\S]*)", SplitToLines[0])
MatchComment = re.match(r"^/\*\sCOMMENT:(\w+):([\w|\W|\s]+)\s\*/\s([\s\S]*)", SplitToLines[0])
if MatchComment:
if MatchComment.group(1) == 'FSP_UPD_HEADER':
IsUpdHeader = True
@ -1226,7 +1226,7 @@ EndList
NewTextBody.append("/**" + CommentLine + "**/\n")
Line = Line[(len(SplitToLines[0]) + 1):]
Match = re.match("^/\*\sEMBED_STRUCT:(\w+):(\w+):(START|END)\s\*/\s([\s\S]*)", Line)
Match = re.match(r"^/\*\sEMBED_STRUCT:(\w+):(\w+):(START|END)\s\*/\s([\s\S]*)", Line)
if Match:
Line = Match.group(4)
if Match.group(1) == 'FSP_UPD_HEADER':
@ -1239,7 +1239,7 @@ EndList
NewTextBody.append ('typedef struct {\n')
StructName = Match.group(1)
VariableName = Match.group(2)
MatchOffset = re.search('/\*\*\sOffset\s0x([a-fA-F0-9]+)', Line)
MatchOffset = re.search(r'/\*\*\sOffset\s0x([a-fA-F0-9]+)', Line)
if MatchOffset:
Offset = int(MatchOffset.group(1), 16)
else:
@ -1318,12 +1318,12 @@ EndList
CommentLine = ""
for Item in self._CfgItemList:
if Item["comment"] != '' and Item["offset"] >= UpdOffsetTable[UpdIdx]:
MatchComment = re.match("^(U|V)PD_DATA_REGION:([\w|\W|\s]+)", Item["comment"])
MatchComment = re.match(r"^(U|V)PD_DATA_REGION:([\w|\W|\s]+)", Item["comment"])
if MatchComment and MatchComment.group(1) == Region[0]:
CommentLine = " " + MatchComment.group(2) + "\n"
TxtBody.append("/**" + CommentLine + "**/\n")
elif Item["offset"] >= UpdOffsetTable[UpdIdx] and Item["comment"] == '':
Match = re.match("^FSP([\w|\W|\s])_UPD", UpdStructure[UpdIdx])
Match = re.match(r"^FSP([\w|\W|\s])_UPD", UpdStructure[UpdIdx])
if Match:
TxtBody.append("/** Fsp " + Match.group(1) + " UPD Configuration\n**/\n")
TxtBody.append("typedef struct {\n")
@ -1441,7 +1441,7 @@ EndList
Export = False
for Line in IncLines:
Match = re.search ("!EXPORT\s+([A-Z]+)\s+EXTERNAL_BOOTLOADER_STRUCT_(BEGIN|END)\s+", Line)
Match = re.search (r"!EXPORT\s+([A-Z]+)\s+EXTERNAL_BOOTLOADER_STRUCT_(BEGIN|END)\s+", Line)
if Match:
if Match.group(2) == "BEGIN" and Match.group(1) == UpdRegionCheck[item]:
Export = True
@ -1464,7 +1464,7 @@ EndList
Match = re.match("(typedef struct {)", Line)
if Match:
StartIndex = Index - 1
Match = re.match("}\s([_A-Z0-9]+);", Line)
Match = re.match(r"}\s([_A-Z0-9]+);", Line)
if Match and (UpdRegionCheck[item] in Match.group(1) or UpdConfigCheck[item] in Match.group(1)) and (ExcludedSpecificUpd[item] not in Match.group(1)) and (ExcludedSpecificUpd1[item] not in Match.group(1)):
EndIndex = Index
StructStart.append(StartIndex)
@ -1474,7 +1474,7 @@ EndList
Index += 1
for Item in range(len(StructStart)):
if Index == StructStart[Item]:
Match = re.match("^(/\*\*\s*)", Line)
Match = re.match(r"^(/\*\*\s*)", Line)
if Match:
StructStartWithComment.append(StructStart[Item])
else:
@ -1510,7 +1510,7 @@ EndList
Match = re.match("(typedef struct {)", Line)
if Match:
StartIndex = Index - 1
Match = re.match("#define\s([_A-Z0-9]+)\s*", Line)
Match = re.match(r"#define\s([_A-Z0-9]+)\s*", Line)
if Match and (UpdSignatureCheck[item] in Match.group(1) or UpdSignatureCheck[item] in Match.group(1)):
StructStart.append(Index - 1)
StructEnd.append(Index)
@ -1519,7 +1519,7 @@ EndList
Index += 1
for Item in range(len(StructStart)):
if Index == StructStart[Item]:
Match = re.match("^(/\*\*\s*)", Line)
Match = re.match(r"^(/\*\*\s*)", Line)
if Match:
StructStartWithComment.append(StructStart[Item])
else:
@ -1543,7 +1543,7 @@ EndList
else:
Space = Item['space']
Line = " $%s_%s" % (Space, Item['cname'])
Match = re.match("\s*\{([x0-9a-fA-F,\s]+)\}\s*", Item['value'])
Match = re.match(r"\s*\{([x0-9a-fA-F,\s]+)\}\s*", Item['value'])
if Match:
DefaultValue = Match.group(1).strip()
else:
@ -1576,7 +1576,7 @@ EndList
BsfFd.write(' %s $%s, "%s", &%s,\n' % (Item['type'], PcdName, Item['name'], Options))
WriteHelp = 1
elif Item['type'].startswith("EditNum"):
Match = re.match("EditNum\s*,\s*(HEX|DEC)\s*,\s*\((\d+|0x[0-9A-Fa-f]+)\s*,\s*(\d+|0x[0-9A-Fa-f]+)\)", Item['type'])
Match = re.match(r"EditNum\s*,\s*(HEX|DEC)\s*,\s*\((\d+|0x[0-9A-Fa-f]+)\s*,\s*(\d+|0x[0-9A-Fa-f]+)\)", Item['type'])
if Match:
BsfFd.write(' EditNum $%s, "%s", %s,\n' % (PcdName, Item['name'], Match.group(1)))
WriteHelp = 2

24
IntelFsp2Pkg/Tools/PatchFv.py
View File

@ -143,7 +143,7 @@ class Symbols:
fdIn.close()
fvInfo['Base'] = 0
for rptLine in rptLines:
match = re.match("^EFI_BASE_ADDRESS\s*=\s*(0x[a-fA-F0-9]+)", rptLine)
match = re.match(r"^EFI_BASE_ADDRESS\s*=\s*(0x[a-fA-F0-9]+)", rptLine)
if match:
fvInfo['Base'] = int(match.group(1), 16)
break
@ -312,7 +312,7 @@ class Symbols:
self.fdBase = 0xFFFFFFFF
while (rptLine != "" ):
#EFI_BASE_ADDRESS = 0xFFFDF400
match = re.match("^EFI_BASE_ADDRESS\s*=\s*(0x[a-fA-F0-9]+)", rptLine)
match = re.match(r"^EFI_BASE_ADDRESS\s*=\s*(0x[a-fA-F0-9]+)", rptLine)
if match is not None:
self.fdBase = int(match.group(1), 16) - fvOffset
break
@ -340,7 +340,7 @@ class Symbols:
fdIn = open(fvTxtFile, "r")
rptLine = fdIn.readline()
while (rptLine != "" ):
match = re.match("(0x[a-fA-F0-9]+)\s([0-9a-fA-F\-]+)", rptLine)
match = re.match(r"(0x[a-fA-F0-9]+)\s([0-9a-fA-F\-]+)", rptLine)
if match is not None:
if match.group(2) in self.dictFfsOffset:
self.dictFfsOffset[fvName + ':' + match.group(2)] = "0x%08X" % (int(match.group(1), 16) + fvOffset)
@ -374,10 +374,10 @@ class Symbols:
while (rptLine != "" ):
if rptLine[0] != ' ':
#DxeIpl (Fixed Flash Address, BaseAddress=0x00fffb4310, EntryPoint=0x00fffb4958,Type=PE)
match = re.match("([_a-zA-Z0-9\-]+)\s\(.+BaseAddress=(0x[0-9a-fA-F]+),\s+EntryPoint=(0x[0-9a-fA-F]+),\s*Type=\w+\)", rptLine)
match = re.match(r"([_a-zA-Z0-9\-]+)\s\(.+BaseAddress=(0x[0-9a-fA-F]+),\s+EntryPoint=(0x[0-9a-fA-F]+),\s*Type=\w+\)", rptLine)
if match is None:
#DxeIpl (Fixed Flash Address, BaseAddress=0x00fffb4310, EntryPoint=0x00fffb4958)
match = re.match("([_a-zA-Z0-9\-]+)\s\(.+BaseAddress=(0x[0-9a-fA-F]+),\s+EntryPoint=(0x[0-9a-fA-F]+)\)", rptLine)
match = re.match(r"([_a-zA-Z0-9\-]+)\s\(.+BaseAddress=(0x[0-9a-fA-F]+),\s+EntryPoint=(0x[0-9a-fA-F]+)\)", rptLine)
if match is not None:
foundModHdr = True
modName = match.group(1)
@ -386,7 +386,7 @@ class Symbols:
self.dictModBase['%s:BASE' % modName] = int (match.group(2), 16)
self.dictModBase['%s:ENTRY' % modName] = int (match.group(3), 16)
#(GUID=86D70125-BAA3-4296-A62F-602BEBBB9081 .textbaseaddress=0x00fffb4398 .databaseaddress=0x00fffb4178)
match = re.match("\(GUID=([A-Z0-9\-]+)\s+\.textbaseaddress=(0x[0-9a-fA-F]+)\s+\.databaseaddress=(0x[0-9a-fA-F]+)\)", rptLine)
match = re.match(r"\(GUID=([A-Z0-9\-]+)\s+\.textbaseaddress=(0x[0-9a-fA-F]+)\s+\.databaseaddress=(0x[0-9a-fA-F]+)\)", rptLine)
if match is not None:
if foundModHdr:
foundModHdr = False
@ -399,7 +399,7 @@ class Symbols:
else:
# 0x00fff8016c __ModuleEntryPoint
foundModHdr = False
match = re.match("^\s+(0x[a-z0-9]+)\s+([_a-zA-Z0-9]+)", rptLine)
match = re.match(r"^\s+(0x[a-z0-9]+)\s+([_a-zA-Z0-9]+)", rptLine)
if match is not None:
self.dictSymbolAddress["%s:%s"%(modName, match.group(2))] = match.group(1)
rptLine = fdIn.readline()
@ -432,14 +432,14 @@ class Symbols:
if reportLine.strip().find("Archive member included") != -1:
#GCC
# 0x0000000000001d55 IoRead8
patchMapFileMatchString = "\s+(0x[0-9a-fA-F]{16})\s+([^\s][^0x][_a-zA-Z0-9\-]+)\s"
patchMapFileMatchString = r"\s+(0x[0-9a-fA-F]{8,16})\s+([^\s][^0x][_a-zA-Z0-9\-]+)\s"
matchKeyGroupIndex = 2
matchSymbolGroupIndex = 1
prefix = '_'
else:
#MSFT
#0003:00000190 _gComBase 00007a50 SerialPo
patchMapFileMatchString = "^\s[0-9a-fA-F]{4}:[0-9a-fA-F]{8}\s+(\w+)\s+([0-9a-fA-F]{8,16}\s+)"
patchMapFileMatchString = r"^\s[0-9a-fA-F]{4}:[0-9a-fA-F]{8}\s+(\w+)\s+([0-9a-fA-F]{8,16}\s+)"
matchKeyGroupIndex = 1
matchSymbolGroupIndex = 2
prefix = ''
@ -458,11 +458,11 @@ class Symbols:
if handleNext:
handleNext = False
pcdName = match.group(1)
match = re.match("\s+(0x[0-9a-fA-F]{16})\s+", reportLine)
match = re.match(r"\s+(0x[0-9a-fA-F]{16})\s+", reportLine)
if match is not None:
modSymbols[prefix + pcdName] = match.group(1)
else:
match = re.match("^\s\.data\.(_gPcd_BinaryPatch[_a-zA-Z0-9\-]+)", reportLine)
match = re.match(r"^\s\.data\.(_gPcd_BinaryPatch[_a-zA-Z0-9\-]+)", reportLine)
if match is not None:
handleNext = True
continue
@ -507,7 +507,7 @@ class Symbols:
fdIn = open(xrefFile, "r")
rptLine = fdIn.readline()
while (rptLine != "" ):
match = re.match("([0-9a-fA-F\-]+)\s([_a-zA-Z0-9]+)", rptLine)
match = re.match(r"([0-9a-fA-F\-]+)\s([_a-zA-Z0-9]+)", rptLine)
if match is not None:
self.dictGuidNameXref[match.group(1).upper()] = match.group(2)
rptLine = fdIn.readline()

8
IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
View File

@ -197,12 +197,20 @@ FspmWrapperInit (
MeasurementExcludedFvPpi = AllocatePool (sizeof (*MeasurementExcludedFvPpi));
ASSERT (MeasurementExcludedFvPpi != NULL);
if (MeasurementExcludedFvPpi == NULL) {
return EFI_OUT_OF_RESOURCES;
}
MeasurementExcludedFvPpi->Count = 1;
MeasurementExcludedFvPpi->Fv[0].FvBase = PcdGet32 (PcdFspmBaseAddress);
MeasurementExcludedFvPpi->Fv[0].FvLength = ((EFI_FIRMWARE_VOLUME_HEADER *)(UINTN)PcdGet32 (PcdFspmBaseAddress))->FvLength;
MeasurementExcludedPpiList = AllocatePool (sizeof (*MeasurementExcludedPpiList));
ASSERT (MeasurementExcludedPpiList != NULL);
if (MeasurementExcludedPpiList == NULL) {
return EFI_OUT_OF_RESOURCES;
}
MeasurementExcludedPpiList->Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
MeasurementExcludedPpiList->Guid = &gEfiPeiFirmwareVolumeInfoMeasurementExcludedPpiGuid;
MeasurementExcludedPpiList->Ppi = MeasurementExcludedFvPpi;

4
IntelFsp2WrapperPkg/Library/BaseFspMeasurementLib/FspMeasurementLib.c
View File

@ -197,6 +197,10 @@ MeasureFspFirmwareBlobWithCfg (
(UINTN)sizeof (DigestList),
EDKII_TCG_PRE_HASH_LOG_ONLY
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "TpmMeasureAndLogDataWithFlags failed - %r\n", Status));
return Status;
}
Status = TpmMeasureAndLogData (
1,

12
IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
View File

@ -34,8 +34,11 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
// UPD header revision must be equal or greater than 2 when the structure is compliant with FSP spec 2.2.
//
0x02,
{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00
}
},
//
// If FSP spec version < 2.2, remove FSPT_ARCH_UPD structure.
@ -43,14 +46,15 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
// Else, use FSPT_ARCH2_UPD structure.
//
{
0x02,
0x03,
{
0x00, 0x00, 0x00
},
0x00000020,
0x00000000,
0x00000000,
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00
}
},

18
Maintainers.txt
View File

@ -151,7 +151,6 @@ ArmVirtPkg
F: ArmVirtPkg/
W: https://github.com/tianocore/tianocore.github.io/wiki/ArmVirtPkg
M: Ard Biesheuvel <ardb+tianocore@kernel.org> [ardbiesheuvel]
M: Laszlo Ersek <lersek@redhat.com> [lersek]
R: Leif Lindholm <quic_llindhol@quicinc.com> [leiflindholm]
R: Sami Mujawar <sami.mujawar@arm.com> [samimujawar]
R: Gerd Hoffmann <kraxel@redhat.com> [kraxel]
@ -418,6 +417,11 @@ M: Abner Chang <abner.chang@amd.com> [changab]
R: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> [abdattar]
R: Nickle Wang <nicklew@nvidia.com> [nicklela]
MdeModulePkg: SPI driver stack
F: MdeModulePkg/Bus/Spi/
M: Abner Chang <abner.chang@amd.com> [changab]
R: Brit Chesley <brit.chesley@amd.com> [BritChesley]
MdePkg
F: MdePkg/
W: https://github.com/tianocore/tianocore.github.io/wiki/MdePkg
@ -451,6 +455,12 @@ M: Abner Chang <abner.chang@amd.com> [changab]
R: Abdul Lateef Attar <AbdulLateef.Attar@amd.com> [abdattar]
R: Nickle Wang <nicklew@nvidia.com> [nicklela]
MdePkg: SPI related C header files
F: MdePkg/Include/Protocol/Spi*.h
F: MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h
M: Abner Chang <abner.chang@amd.com> [changab]
R: Brit Chesley <brit.chesley@amd.com> [BritChesley]
NetworkPkg
F: NetworkPkg/
W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
@ -462,7 +472,6 @@ F: OvmfPkg/
W: http://www.tianocore.org/ovmf/
M: Ard Biesheuvel <ardb+tianocore@kernel.org> [ardbiesheuvel]
M: Jiewen Yao <jiewen.yao@intel.com> [jyao1]
M: Laszlo Ersek <lersek@redhat.com> [lersek]
R: Gerd Hoffmann <kraxel@redhat.com> [kraxel]
S: Maintained
@ -558,7 +567,7 @@ F: OvmfPkg/XenIoPvhDxe/
F: OvmfPkg/XenPlatformPei/
F: OvmfPkg/XenPvBlkDxe/
F: OvmfPkg/XenResetVector/
R: Anthony Perard <anthony.perard@citrix.com> [tperard]
R: Anthony Perard <anthony@xenproject.org> [tperard]
OvmfPkg: RISC-V Qemu Virt Platform
F: OvmfPkg/RiscVVirt
@ -617,14 +626,15 @@ F: StandaloneMmPkg/
M: Ard Biesheuvel <ardb+tianocore@kernel.org> [ardbiesheuvel]
M: Sami Mujawar <sami.mujawar@arm.com> [samimujawar]
M: Ray Ni <ray.ni@intel.com> [niruiyu]
R: Jiaxin Wu <jiaxin.wu@intel.com> [jiaxinwu]
UefiCpuPkg
F: UefiCpuPkg/
W: https://github.com/tianocore/tianocore.github.io/wiki/UefiCpuPkg
M: Ray Ni <ray.ni@intel.com> [niruiyu]
M: Laszlo Ersek <lersek@redhat.com> [lersek]
R: Rahul Kumar <rahul1.kumar@intel.com> [rahul1-kumar]
R: Gerd Hoffmann <kraxel@redhat.com> [kraxel]
R: Jiaxin Wu <jiaxin.wu@intel.com> [jiaxinwu]
UefiCpuPkg: Sec related modules
F: UefiCpuPkg/SecCore/

8
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.c
View File

@ -1483,7 +1483,9 @@ AtaDiskInfoWhichIde (
function shall return EFI_DEVICE_ERROR.
@param This Indicates a pointer to the calling context.
@param MediaId ID of the medium to receive data from.
@param MediaId ID of the medium to receive data from. If there is no
block IO protocol supported by the physical device, the
value of MediaId is undefined.
@param Timeout The timeout, in 100ns units, to use for the execution
of the security protocol command. A Timeout value of 0
means that this function will wait indefinitely for the
@ -1600,7 +1602,9 @@ AtaStorageSecurityReceiveData (
shall return EFI_DEVICE_ERROR.
@param This Indicates a pointer to the calling context.
@param MediaId ID of the medium to receive data from.
@param MediaId ID of the medium to receive data from. If there is no
block IO protocol supported by the physical device, the
value of MediaId is undefined.
@param Timeout The timeout, in 100ns units, to use for the execution
of the security protocol command. A Timeout value of 0
means that this function will wait indefinitely for the

8
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBus.h
View File

@ -927,7 +927,9 @@ AtaDiskInfoWhichIde (
function shall return EFI_DEVICE_ERROR.
@param This Indicates a pointer to the calling context.
@param MediaId ID of the medium to receive data from.
@param MediaId ID of the medium to receive data from. If there is no
block IO protocol supported by the physical device, the
value of MediaId is undefined.
@param Timeout The timeout, in 100ns units, to use for the execution
of the security protocol command. A Timeout value of 0
means that this function will wait indefinitely for the
@ -1007,7 +1009,9 @@ AtaStorageSecurityReceiveData (
shall return EFI_DEVICE_ERROR.
@param This Indicates a pointer to the calling context.
@param MediaId ID of the medium to receive data from.
@param MediaId ID of the medium to receive data from. If there is no
block IO protocol supported by the physical device, the
value of MediaId is undefined.
@param Timeout The timeout, in 100ns units, to use for the execution
of the security protocol command. A Timeout value of 0
means that this function will wait indefinitely for the

4
MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KbdTextIn.c
View File

@ -258,7 +258,8 @@ KeyboardEfiReset (
@param This Pointer to instance of EFI_SIMPLE_TEXT_INPUT_PROTOCOL
@param Key The output buffer for key value
@retval EFI_SUCCESS success to read key stroke
@retval EFI_SUCCESS success to read key stroke
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS
EFIAPI
@ -433,6 +434,7 @@ KeyboardEfiResetEx (
@retval EFI_DEVICE_ERROR The keystroke information was not returned due to
hardware errors.
@retval EFI_INVALID_PARAMETER KeyData is NULL.
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS

3
MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2Keyboard.h
View File

@ -338,6 +338,7 @@ KeyboardEfiReset (
@param Key The output buffer for key value
@retval EFI_SUCCESS success to read key stroke
@retval EFI_UNSUPPORTED The device does not support the ability to read keystroke data.
**/
EFI_STATUS
EFIAPI
@ -441,6 +442,8 @@ KeyboardEfiResetEx (
@retval EFI_DEVICE_ERROR - The keystroke information was not returned due to
hardware errors.
@retval EFI_INVALID_PARAMETER - KeyData is NULL.
@retval EFI_UNSUPPORTED - The device does not support the ability to read
keystroke data.
**/
EFI_STATUS

8
MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressBlockIo.c
View File

@ -1699,7 +1699,9 @@ TrustTransferNvmeDevice (
function shall return EFI_DEVICE_ERROR.
@param This Indicates a pointer to the calling context.
@param MediaId ID of the medium to receive data from.
@param MediaId ID of the medium to receive data from. If there is no
block IO protocol supported by the physical device, the
value of MediaId is undefined.
@param Timeout The timeout, in 100ns units, to use for the execution
of the security protocol command. A Timeout value of 0
means that this function will wait indefinitely for the
@ -1812,7 +1814,9 @@ NvmeStorageSecurityReceiveData (
shall return EFI_DEVICE_ERROR.
@param This Indicates a pointer to the calling context.
@param MediaId ID of the medium to receive data from.
@param MediaId ID of the medium to receive data from. If there is no
block IO protocol supported by the physical device, the
value of MediaId is undefined.
@param Timeout The timeout, in 100ns units, to use for the execution
of the security protocol command. A Timeout value of 0
means that this function will wait indefinitely for the

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