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coreboot: Fix OZ711LV2 LTR for galp5 3050 variant

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Fix programming the LTR so that CPU can reach C-states deeper than C2.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
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Tim Crawford
2023-10-12 11:58:39 -06:00
committed by Tim Crawford
parent c1dafbbfad
commit 5d997d1c41
2 changed files with 2 additions and 1 deletions
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CHANGELOG.md
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@@ -9,6 +9,7 @@ features apply to your model and firmware version, see the
## unreleased ## unreleased
- tgl-u: Fixed potential EC lock up during opportunistic suspend - tgl-u: Fixed potential EC lock up during opportunistic suspend
- galp5: Fixed CPU not going lower than C2 due to card reader LTR
## 2023-09-19 ## 2023-09-19

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coreboot

Submodule coreboot updated: e86eb250cf...49d376482b