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Author SHA1 Message Date
Tim Crawford
1e7386989b mb/system76/tgl-u: Restore old FSP configs 
Re-add FSP-S configs from the 4.13 branch, which were not included when
upstreamed.

Change-Id: I5f99d088190df07213c5b615f36fde29831aad86
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Tim Crawford
d4407b563f mb/system76/gaze17: Enable dGPU 
Change-Id: I08781b6e91917b8ca92fc216c580befdd75cb994
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Jeremy Soller
ef3ef9b9b7 mb/system76/gaze17: Add Gazelle 17 
The gaze17 comes in 2 variants due to differences in the discrete GPU
and network controller used.

- NVIDIA RTX 3050, using Realtek Ethernet Controller
- NVIDIA RTX 3060, using onboard I219-V Ethernet Controller

Tested with a custom TianoCore UefiPayloadPkg payload.

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots
- M.2 NVMe SSD
- M.2 SATA SSD
- MicroSD card reader
- All USB ports
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio
- 3.5mm microphone input
- S0ix suspend/resume
- Booting to Pop!_OS Linux 22.04 with kernel 5.18.10
- Internal flashing with flashrom v1.2-703-g76118a7c10ed

Not working:

- Discrete/Hybrid graphics: Requires NVIDIA driver
- mDP/HDMI displays on 3060 variant: Requires NVIDIA driver
- Detection of devices in TBT slot on boot
- S3 suspend: MP init eventually fails

Not tested:

- Thunderbolt devices

Change-Id: Ib12ac47e8f34004f72e6234039823530511baea7
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Tim Crawford
c6a45cdef5 mb/system76/adl-p: oryp9: Enable dGPU 
Change-Id: If78241c197a552a5d93e4bfdadcb175d68194e3d
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Tim Crawford
0ec21e466e mb/system76/adl-p: Add Oryx Pro 9 as a variant 
The Oryx Pro 9 (oryp9) is an Alder Lake-P board.

Tested with a custom TianoCore UefiPayloadPkg.

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots (with NMSO480E82-3200EA00)
- Both M.2 NVME SSD slots (with MZVL2500HCJQ)
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio
- 3.5mm microphone input
- S0ix suspend/resume
- Booting Pop!_OS Linux 22.04 with kernel 5.18.6
- Internal flashing with flashrom v1.2-703-g76118a7c10ed

Not working:

- Discrete/Hybrid graphics
- HDMI output (requires NVIDIA GPU)
- Mini DisplayPort output (requires NVIDIA GPU)
- Detection of devices in TBT slot on boot

Change-Id: I8aac3e83f4423f444cb9ce8aa562ba465eb718c1
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Tim Crawford
cac0a4e740 mb/system76/adl-p: Add Lemur Pro 11 as a variant 
The Lemur Pro 11 (lemp11) is an Alder Lake-U board.

Tested with a custom TianoCore UefiPayloadPkg.

Working:

- PS/2 keyboard, touchpad
- DIMM slot (with NMSO480E82-3200EA00)
- M.2 NVMe SSD (with MZVL2500HCJQ)
- M.2 SATA SSD (with WDS100T2B0B)
- All USB ports
- SD card reader
- Webcam
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- DisplayPort output over USB-C
- Internal microphone
- Internal speakers
- Combined headset + mic 3.5mm audio
- S0ix suspend/resume
- Booting Pop!_OS Linux 22.04 with kernel 5.18.5
- Internal flashing with flashrom v1.2-703-g76118a7c10ed

Not working:

- On-board RAM
- Detection of devices in TBT slot on boot

Change-Id: Ic930df1ebacc8c7ef14dbb6c67a97eddb918b365
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Tim Crawford
60bd775b0b mb/system76/adl-p: Add Darter Pro 8 
The Darter Pro 8 (darp8) is an Alder Lake-P board.

Tested with a custom TianoCore UefiPayloadPkg.

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots (with NMSO480E82-3200EA00)
- M.2 NVMe SSD (with MZVL2500HCJQ)
- M.2 SATA SSD (with WDS100T2B0B)
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- HDMI output
- DisplayPort output over USB-C
- Internal microphone
- Internal speakers
- Combined header + mic 3.5mm audio
- S0ix suspend/resume
- Booting Pop!_OS Linux 22.04 with kernel 5.18.5
- Internal flashing with flashrom v1.2-703-g76118a7c10ed

Not working:

- Detection of devices in TBT slot on boot

Change-Id: Icc84d6cc3aec7149d9b538305288bbe2b56d53e4
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:03 -06:00
Tim Crawford
7bb5d11b60 mb/system76/bonw14: Enable TAS5825M smart amp 
The Bonobo has 2 AMPs: one for the speakers and one for the subwoofer.

Smart AMP data was collected using a logic analyzer connected to the IC
during system start on proprietary firmware. This data is then used to
generate a C file [1].

[1]: https://github.com/system76/smart-amp

Change-Id: I5389a9890563ebd3adb20096b6225f474bc006f9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:02 -06:00
Tim Crawford
9325f1d6e3 mb/system76: TGL-H: Disable D3cold for TCSS 
The TGL-H boards use S3 instead of S0ix.

Change-Id: Ib4362783546aa01f0f8f5baaad817ee76be9c39c
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:02 -06:00
Jeremy Soller
07c2f1c0c1 mb/system76/lemp9: Fix TPM error message 
Change-Id: Id5456c0d6abee6d79761fae0bed78cc6def351f3
 2022-08-01 08:12:02 -06:00
Jeremy Soller
13be9f55d6 mb/system76: select TPM_RDRESP_NEED_DELAY 
Change-Id: I7909b05e9203ce9ad07c8e87a847bc46cf281b34
 2022-08-01 08:12:02 -06:00
Tim Crawford
b1e9b8bf76 mb/system76: Enable dGPUs 
Change-Id: Ie33240ee61f9634202af6fb65a1f8819ae213a3b
 2022-08-01 08:12:02 -06:00
Jeremy Soller
e67e83cd0e mb/system76/addw1: Disable SaOcSupport to eliminate hangs with 3200MT/s memory 
Change-Id: I586e8cf97a52b2fa8386ce3742a4f4ae9465bbcf
 2022-08-01 08:12:02 -06:00
Tim Crawford
d7abe1a4c3 mb/system76: Add custom backlight levels for Intel GMA 
Add custom backlight levels for all models except:

- addw1
- bonw14: Does not use the iGPU

Change-Id: Ibea37f19acca0d718211fc41706019a92a240c70
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:02 -06:00
Jeremy Soller
32c624ddae drivers/gfx/nvidia: Add driver for NVIDIA GPU 
Add a driver for laptops with NVIDIA Optimus (hybrid) graphics. The
driver provides ACPI support for dynamically powering on and off the
GPU, and a function for enabling the GPU power in romstage.

Tested on system76/gaze15.

References:
- DG-09845-001: NVIDIA GN20/QN20 Hardware Design Guide
- DG-09954-001: NVIDIA GN20/QN20 Software Design Guide

Change-Id: I2dec7aa2c8db7994f78a7cc1220502676e248465
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:02 -06:00
Tim Crawford
03d35a86b6 soc/intel/alderlake: Don't send EOP early 
Early EOP prevents disabling CSME.

Disabling CSME now occurs, but checking the result fails:

    [DEBUG]  HECI: ME state change send success!
    [DEBUG]  HECI: ME state change result failure!

CSME is disabled on subsequent boots.

Change-Id: I1c1416bb6537774f4bf09820c551b3b4ca7d1a38
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:02 -06:00
Tim Crawford
5905e138bd soc/intel/alderlake: Allow channel 0 for memory-down 
Fixes detection of the on-board RAM (Samsung K4AAG165WA-BCWE) on the
System76 Lemur Pro 11 (lemp11).

Change-Id: Ibe56c0f2b81d660303429cd2e21a7bb6cd433da5
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:01 -06:00
Jeremy Soller
68db581c09 soc/intel/alderlake: Set FSP-S GnaEnable based on devicetree 
Change-Id: Ifd25416c55c4dba1709f74cdedc0c58e881d6266
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2022-08-01 08:12:01 -06:00
Michał Żygowski
b500ce5f1c soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading 
BIOS must send the IP_LOAD HECI command to fetch the firmware for CPU
PCIe Gen5 and upload it via CPU REG BAR prior FSP Silicon Init.
Implementation based on public Slimbootloader's
"Silicon/AlderlakePkg/Library/CpuPcieHsPhyInitLib".

TEST=Boot MSI PRO Z690-A and see the HSPHY FW is loaded.
PCIe x16 Gen3 GPU card started working in the PCIE 5.0 slot.

[DEBUG]  HECI: Sending Get IP firmware command
[DEBUG]  HECI: Get IP firmware success. Response:
[DEBUG]    Payload size = 0x6944
[DEBUG]    Hash type used for signing payload = 0x3

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
 2022-08-01 08:12:01 -06:00
Jeremy Soller
4cae6164d5 intel/block/pcie/rtd3: ACPI debug messages 
Change-Id: Icc4a882ff73f62a134b92f1afb0dc298ea809189
 2022-08-01 08:12:01 -06:00
Jeremy Soller
6c1f2a864c intel/block/pcie/rtd3: Also implement _PR3 
Change-Id: Id7f4373989dffe8c3bc68a034f59a94d2160dd15
Signed-off-by: Jeremy Soller <jeremy@system76.com>
 2022-08-01 08:12:01 -06:00
Jeremy Soller
ecd6515f13 soc/intel/cannonlake: Add Cometlake-H/S Q0 (10+2) CPU 
Change-Id: Id1da42aa93ab3440ae743d943a00713b7df3f453
 2022-07-30 17:01:16 -06:00
Tim Crawford
c16ad53c8f submodules: Use absolute paths 
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Change-Id: If03415f80a6028e263e76a9e3cc10df0cde5cc3c
 2022-07-30 17:01:16 -06:00
Sean Rhodes
37bf8c6dd5 payloads/tianocore: Update MrChromebox’ default branch to 202207 
Update MrChromebox’ default branch from uefipayload_202107 to
uefipayload_202207.

This is based on upstream edk2, commit f26b70c (UefiPayloadPkg:
Add support for logging to CBMEM console).

Tested on:
* StarBook Mk V
* StarLite Mk III

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I16a012485e4b4957439e776914ffd016b4506a47
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66083
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
 2022-07-30 18:43:09 +00:00
Matt DeVillier
38a682fe92 payloads/tianocore: Use SMMSTORE when branch is MrChromeBox 
SMMSTORE support in edk2 was not allowed in upstream edk2
as it was bootloader specific.

Shortly, it will be built from edk2-platforms and then,
it will be retired.

For now, the patches exist in the MrChromeBox fork (TIANOCORE_UEFIPAYLOAD), so enable
these by default when SMMSTORE_v2 is enabled.

Change-Id: I1861bf739c2e25f661b4f06a303348f0537dc8b3
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65867
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-30 18:41:55 +00:00
Sean Rhodes
c5055883eb payloads/tianocore: Allow passing custom build params to all versions 
Allow passing custom build parameters to any version of edk2, not
just forks.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4eed535415ba15ae73e22cada9153820538f5f6d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
 2022-07-30 18:40:58 +00:00
Bora Guvendik
85c9a7320f vendorcode/intel/fsp: Fix wrong license 
Fix the license in header file.

BUG=none
BRANCH=firmware-brya-14505.B
TEST=none

Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I025f7c571d09e4cc63a659279e63d17c098c01cf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
 2022-07-30 18:40:10 +00:00
Bill XIE
4e43abf9c1 mb/hp/z220_series: Improve the port for z220_sff_workstation 
- Move configs for PCIe ports not present on z220_sff_workstation
  from the devicetree.cb of base board to the overridetree.cb of
  z220_cmt_workstation.

- Add a note for ME/AMT Flash Override jumper, for it is hard to
  flash from OEM firmware either internally or externally without
  closing this jumper.

- Add a side note for similar HP Compaq Elite 8300 SFF.

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I35d8b97f52a83910a61c12b1f7367ee7a19a9ad7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65703
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-30 18:39:31 +00:00
Raihow Shi
a955efc190 mb/google/brask/variants/moli: Add DPTF setting in Moli 
DPTF Policy and temperature sensor values from thermal team.

BUG=b:236294162
TEST=emerge-brask coreboot

Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: Iebcfb74c4bc719e6d8d8d9317435becd912eaf85
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
 2022-07-30 18:30:06 +00:00
Jakub Czapiga
190afda543 security/vboot: Simplify image signing 
futility now supports image truncation and signing of whole images with
a single command invocation. Use it for vboot-enabled coreboot images.

TEST=Build and run coreboot on google/volteer

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I49eb7e977b635ccb9f6c1b76e53c36e82be1d795
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66127
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
 2022-07-30 18:29:25 +00:00
Elyes Haouas
ae157d38e3 crossgcc: Upgrade LLVM from 13.0.1 to 14.0.6 
Test build for QEMU x86 i440fx/piix4.

Change-Id: I97d059947f7049b2491a98985795a4655891c3b3
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
 2022-07-30 18:27:30 +00:00
Felix Singer
a44620dea9 arch/x86/acpi: Replace Store() with ASL 2.0 syntax 
Change-Id: I30bbd0288475fbefec55ce294e7963df1de6aa6a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
 2022-07-30 00:11:58 +00:00
Felix Singer
311981ef48 arch/x86/acpi: Replace And() with ASL 2.0 syntax 
Change-Id: I21b954ce62259bb77d88775c3086cfac17dd90c7
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60719
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
 2022-07-30 00:11:36 +00:00
Felix Singer
b4a7f74436 arch/x86/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntax 
Replace `LNotEqual(a, b)` with `a != b`.

Change-Id: If0e9fcea680d487c28a965e944b3333bb5a07026
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60696
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-30 00:11:08 +00:00
Felix Singer
7ee6b5a3a5 arch/x86/acpi: Replace LLess(a,b) with ASL 2.0 syntax 
Replace `LLess(a, b)` with `a < b`.

Change-Id: Ief1d069ae0fb19a2179f08c2e9cf416367661e69
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60674
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-30 00:10:27 +00:00
Felix Singer
50002b7fac arch/x86/acpi: Replace Add(a,b,c) with ASL 2.0 syntax 
Replace `Add (a, b, c)` with `c = a + b`.

Change-Id: If848d391e5ec33ebfb08515414739dbdd5011e08
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
 2022-07-29 23:58:51 +00:00
Subrata Banik
8072b420a6 mb/google/rex: Perform display configuration override 
This patch enables display port configuration as per the Rex
schematics.

TEST=Able to dump FSP UPD to ensure the override is successful.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I9e81d037416e46e52cb72344425d6d8725dae192
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
 2022-07-29 19:58:01 +00:00
Stanley Wu
828243ebca mb/google/nissa/var/pujjo: Enable OZ711LV2LN SD card controller 
Pujjoflex support OZ711LV2LN SD card controller,
Select the Bayhub LV2 driver for OZ711LV2LN SD card.

BUG=b:215487382
TEST=Build FW and checking SD card work as expected in OS.

Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Change-Id: I6759fde1eaf24599a1fdb364d6e78f4e4e12f311
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
 2022-07-29 15:06:46 +00:00
Tarun Tuli
5c83d5efb7 mb/google/rex: Add LP5 RAM IDs 
Create RAM IDs for:
DRAM Part Name                 ID to assign
MT62F512M32D2DR-031 WT:B       0 (0000)
MT62F1G32D2DS-026 WT:B         1 (0001)
MT62F2G32D4DS-026 WT:B         2 (0010)

BUG=b:240289148
TEST=emerge-rex coreboot

Signed-off-by: Tarun Tuli <taruntuli@google.com>
Change-Id: Ib24e07bca363984db3484aa500f7d6ea4817e517
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
 2022-07-29 15:06:17 +00:00
Liya Li
0d13e80852 soc/mediatek/mt8188: Add SPI support 
The gpios and the tick delay register are different between MT8188
and previous MediaTek SoCs, so we need to add this patch to support
SPI.

TEST=build pass
BUG=b:236331724

Signed-off-by: Liya Li <ot_liya.li@mediatek.corp-partner.google.com>
Change-Id: I6065b9d285dfd36c191f274f500fdb694920276e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66185
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-29 15:05:48 +00:00
Rex-BC Chen
00324b20e1 soc/mediatek: Create GET_TICK_DLY_REG macro for SPI tick delay setting 
MT8188 SPI tick delay setting is moved to `spi_cmd_reg` register which
is different from previous SoCs, so we define a macro to get the
designated register.

TEST=build pass.
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia30e94a8688c0e1c1d4b3d15206f28e5bd8c9bd4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66184
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-29 15:05:33 +00:00
Rex-BC Chen
d699de071f mb/google/geralt: Initialize RTC and clk_buf in romstage 
TEST=build pass.
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I869c0879d09e00cf66882adb728c9ccb6ac57e03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66183
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-29 15:05:14 +00:00
Song Fan
86dde5fe72 soc/mediatek/mt8188: Add clk_buf support in romstage 
TEST=build pass.
BUG=b:233720142

Signed-off-by: Song Fan <ot_song.fan@mediatek.corp-partner.google.com>
Change-Id: Ic300b70a38ac204b098ca9ab15cf7045b66fd76d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66182
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-29 15:04:57 +00:00
Song Fan
11089e2fcd soc/mediatek/mt8188: Add RTC support 
Add RTC header file for SoC-specific settings. Add RTC support in
romstage.

TEST=build pass.
BUG=b:233720142

Signed-off-by: Song Fan <ot_song.fan@mediatek.corp-partner.google.com>
Change-Id: I38115ce0c9a4e1c1b2b7c8e6d40f47e99f7f86b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66181
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-29 15:04:43 +00:00
Rex-BC Chen
9f81a8fc08 soc/mediatek: Move common definitions from rtc.h to rtc_reg_common.h 
Move the common definitions to rtc_reg_common.h, so we can reuse those
definitions on MT8188.

TEST=build pass
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia1d916a88b7cb875b35ee5813b7b52d9e98f5009
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66180
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2022-07-29 15:04:27 +00:00
Hui Liu
feb573e395 soc/mediatek/mt8188: Add AUXADC support 
TEST=get voltage as 340mV for channel 0 in MTK EVB.
BUG=b:233720142

Signed-off-by: Hui Liu <hui.liu@mediatek.corp-partner.google.com>
Change-Id: Idd1edcce6cb62fcf6991bb9342c409150989c5ca
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66121
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
 2022-07-29 15:04:10 +00:00
Rex-BC Chen
a8c9674c42 soc/mediatek: Move struct mtk_auxadc_regs to auxadc_common.h 
The AUXADC register definitions are the same for all MediaTek SoCs, so
we move struct mtk_auxadc_regs to auxadc_common.h.

TEST=build pass.
BUG=b:233720142

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I48978a93137a7de42f8ea2873be3130cb8f534f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
 2022-07-29 15:03:56 +00:00
Subrata Banik
8a039031dd mb/google/rex: Enable CNVi BT Core 
This patch override `CnviBtCore` FSP UPD.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I90c9b360969aada0b0e031d62b48476fac5cee0e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66208
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
 2022-07-29 15:03:01 +00:00
Eric Lai
ff424fbe6b mb/google/brya/var/ghost: Enable CS42L42 codec 
Add CS42L42 support in device tree.

BUG=b:240006200
BRANCH=firmware-brya-14505.B
TEST=Check cs42l42 driver can probe successfully in kernel.
cs42l42 i2c-10134242:00: Cirrus Logic CS42L42, Revision: B1

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I861f47c12f4cebb016a4cfbe225f97d34d55e233
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66223
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
 2022-07-29 15:02:35 +00:00
Eric Lai
e5a9cdc615 mb/google/brya/var/ghost: Update all I2C buses speed to fast 
Remove the parameter and set I2C bus speed to fast. Will fill the
tuning value after real tuning.

BUG=b:240006200
BRANCH=firmware-brya-14505.B
TEST=build passed.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Iba7fe4551959617ecfa49719c1124bf85d624c31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66220
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
 2022-07-29 15:02:24 +00:00