Per TPM spec and edk2 reference, perform a TPM restart in the case that
a TPM resume fails.
Change-Id: I444ab3cb12acbff740b5b8d2a9f7bed06392e9ec
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Prevents the Infineon chip from failing to stop/resume on S3.
Change-Id: Ie1f4d3859ea7204b7510ea9756a697b12e4e01da
Signed-off-by: Tim Crawford <tcrawford@system76.com>
The EC now detects if the keyboard is white or RGB backlit via
`RGBKB-DET#`. Remove the Kconfig for the selection and update the ACPI
methods for the new functionality.
Change-Id: I263ede51a4184769659082a2c60d9556b5328670
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Resetting the device will cause the keyboard backlight and airplane LED
to lose their state.
Change-Id: Ib0fc9e95b5eb430b0eb4fbe46980fe6b663f7b20
Signed-off-by: Tim Crawford <tcrawford@system76.com>
System76 EC sets PL4 values through PECI based on AC state [1]. Remove
the static PL4 values from coreboot since they won't be used. This will
result in sysfs reporting the package default for PL4.
[1]: https://github.com/system76/ec/pull/353
Change-Id: If33eb38a20febaf8c71615f0d1a640d3991f42ff
Signed-off-by: Tim Crawford <tcrawford@system76.com>
DDR5 uses a Serial Presence Detect EEPROM with hub function
(SPD5 hub device) to store the spd data.
This CL adds support to read the spd5 hub device via smbus.
BUG=b:180458099
TEST=Boot adlrvp DDR5 board to kernel
Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: Ic5e6c58f255bef86b68ce90a4f853bf4e7c7ccfe
Prevents current overdraw leading to power off.
Change-Id: I5661594f40719b3248964e2fc0ab1c85362bfaff
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Avoid UnsupReq errors occuring on the TBT port.
Change-Id: I4c10876285be2baef1ca4f22727413bdc0393cdd
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Use USB2_PORT_MID instead of USB2_PORT_TYPE_C, as was done for addw3.
Change-Id: I7df2bbf1ba70c4e08319b760b2784e15c880a105
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This patch updates PMC API name from `pmc_send_pci_enum_done` to
`pmc_send_bios_reset_pci_enum_done` to inform PMC IPC about BIOS done
is also set along with PMC enumeration being done.
BUG=b:270942083
TEST=Able to build and boot google/rex.
Change-Id: I1cf8cb1ecadeb68c109be6b0e751a3f2c448ae4f
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
According to ADL PCH BIOS specification (DOC# 630603) ADL-S PCH
uses a fixed SBREG_BAR of 256MiB starting at 0xe0000000.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ied59a6dad8fb065dc3aeb6281bd32074aaa5e3b8
