Elyes HAOUAS
a9473ecbb1
src: Replace common MSR addresses with macros
...
Change-Id: I9fba67be12483ea5e12ccd34c648735d409bc8b0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com >
2018-11-08 11:35:26 +00:00
Elyes HAOUAS
1a5f1c89d7
cpu/amd: Use common AMD's MSR
...
This Phase #2 follows the CL done on Phase #1 (Change-Id: I0236e0960cd)
Change-Id: Ia296e1f9073b45c9137d17fbef29ce4fdfabcb7c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29369
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-11-05 09:05:51 +00:00
Elyes HAOUAS
d35c7fe1bf
amd/mtrr: Fix IORR MTRR
...
IORR MTRR definitions renamed to avoid collision
between <cpu/amd/mtrr.h> and <AGESA.h>.
Change-Id: I3eeb0c69bbb76039039dc90683670cafcb00ed36
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29352
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-11-05 09:05:33 +00:00
Elyes HAOUAS
19f5ba81be
amd: Fix non-local header treated as local
...
Change-Id: I0668b73cd3a5bf5220af55c29785220b77eb5259
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29103
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-11-05 09:00:26 +00:00
Nico Huber
718c6faff4
reset: Finalize move to new API
...
Move soft_reset() to `southbridge/amd/common/` it's only used for
amdfam10 now.
Drop hard_reset() for good.
Change-Id: Ifdc5791160653c5578007f6c1b96015efe2b3e1e
Signed-off-by: Nico Huber <nico.h@gmx.de >
Reviewed-on: https://review.coreboot.org/29059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2018-10-31 15:29:42 +00:00
Elyes HAOUAS
8a643703b8
{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros
...
Change-Id: I7e8de35dcdad52bb311b34bfa9b272d17ed3186b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29243
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-10-30 20:18:53 +00:00
Elyes HAOUAS
a342f3937e
src: Remove unneeded whitespace
...
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org >
2018-10-23 15:52:09 +00:00
Elyes HAOUAS
d50cf23e43
{cpu,drivers}/amd: Replace MTRR addresses with macros
...
Change-Id: I315c0b70c552c5dd7f640b18b913350bb88be81b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29173
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-10-19 09:20:22 +00:00
Elyes HAOUAS
400ce55566
cpu/amd: Use common AMD's MSR
...
Phase 1. Due to the size of the effort, this CL is broken into several
phases.
Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/29065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com >
2018-10-18 12:51:26 +00:00
Nico Huber
d44221f9c8
Move compiler.h to commonlib
...
Its spreading copies got out of sync. And as it is not a standard header
but used in commonlib code, it belongs into commonlib. While we are at
it, always include it via GCC's `-include` switch.
Some Windows and BSD quirk handling went into the util copies. We always
guard from redefinitions now to prevent further issues.
Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552
Signed-off-by: Nico Huber <nico.h@gmx.de >
Reviewed-on: https://review.coreboot.org/28927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2018-10-08 16:57:27 +00:00
Patrick Georgi
5b2a2d008f
src/*: normalize Google copyright headers
...
As per internal discussion, there's no "ChromiumOS Authors" that's
meaningful outside the Chromium OS project, so change everything to the
contemporary "Google LLC."
While at it, also ensure consistency in the LLC variants (exactly one
trailing period).
"Google Inc" does not need to be touched, so leave them alone.
Change-Id: Ia0780e31cdab879d2aaef62a2f0403e3db0a4ac8
Signed-off-by: Patrick Georgi <pgeorgi@google.com >
Reviewed-on: https://review.coreboot.org/28756
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Joel Kitching <kitching@google.com >
2018-09-28 07:13:00 +00:00
Stefan Tauner
de028789fd
cpu/*/car: fix ancient URL explaining XIP range run-time calculation
...
Change-Id: I49526b6aafb516a668b7b5e983a0372e3d26a8fc
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at >
Reviewed-on: https://review.coreboot.org/28216
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
2018-09-18 10:36:12 +00:00
Aaron Durbin
75a62e7648
complier.h: add __always_inline and use it in code base
...
Add a __always_inline macro that wraps __attribute__((always_inline))
and replace current users with the macro, excluding files under
src/vendorcode.
Change-Id: Ic57e474c1d2ca7cc0405ac677869f78a28d3e529
Signed-off-by: Aaron Durbin <adurbin@chromium.org >
Reviewed-on: https://review.coreboot.org/28587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Julius Werner <jwerner@google.com >
2018-09-14 08:16:37 +00:00
Elyes HAOUAS
65bb5434f6
src: Get rid of non-local header treated as local
...
Change-Id: I2c5edadfd035c9af08af9ee326a5a2dc8b840faa
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/27331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-08-13 15:38:38 +00:00
Marshall Dawson
bd4a3f8cd9
cpu/amd: Correct number of MCA banks cleared
...
Use the value discovered in the MCG_CAP[Count] for the number of MCA
status registers to clear. The generations should have the following
number of banks:
* Family 10h: 6 banks
* Family 12h: 6
* Family 14h: 6
* Family 15h: 7
* Family 16h: 6
Change-Id: I0fc6d127a200b10fd484e051d84353cc61b27a41
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com >
Reviewed-on: https://review.coreboot.org/27923
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Martin Roth <martinroth@google.com >
2018-08-08 17:51:16 +00:00
Marshall Dawson
e13dd172b1
cpu/amd: Improve formatting
...
Remove for() braces from around single lines. Remove extra blank lines.
This cleans up checkpatch problems in a subsequent patch.
Change-Id: I329ac03365e51799581c56eed27ee54de6826f14
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com >
Reviewed-on: https://review.coreboot.org/27935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Martin Roth <martinroth@google.com >
2018-08-08 17:50:45 +00:00
Marshall Dawson
bddd157ea1
cpu/amd: Rename MCA status register
...
Change the defined name of MCI_STATUS (i.e. MCi_STATUS) to reflect its
MC0_STATUS address.
Change-Id: I97d2631a186965bb8b18f544ed9648b3a71f5fb0
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com >
Reviewed-on: https://review.coreboot.org/27922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Martin Roth <martinroth@google.com >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
2018-08-08 17:50:02 +00:00
Elyes HAOUAS
6c9737b1ac
src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"
...
Change-Id: I8e4118c5c5d70719ad7dc5f9ff9f86d93fa498ac
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26942
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Rudolph <siro@das-labor.org >
2018-07-09 09:26:18 +00:00
Kyösti Mälkki
ce9f422b51
x86/car: Replace reference of copy_and_run location
...
For cases with POSTCAR_STAGE=y this reference pulled
in the implementation of run_ramstage() which we would
not call.
Using _program results with the same region being marked
as WRPROT-cacheble.
Change-Id: Ie1eaf6f5bb8baa13e946112c4fc3d854dbf750a3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/27232
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
Reviewed-by: Keith Hui <buurin@gmail.com >
2018-06-27 10:24:46 +00:00
Elyes HAOUAS
27929bd0b0
cpu/amd: Remove duplicated includes
...
Change-Id: I3544ce4a573b6996d64b140d8acdaeb3de430896
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/27018
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Martin Roth <martinroth@google.com >
2018-06-14 09:44:49 +00:00
Kyösti Mälkki
088f09dc2f
arch/x86: Drop leftover ROMCC support
...
Remove the last bits of building romstage with romcc.
Change-Id: I70bb1ed23a5aeb87bf7641e0b0bd604a4e622e61
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26807
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-06-06 10:28:00 +00:00
Kyösti Mälkki
13a500a404
amd/geode_lx: Fix .c includes
...
Change-Id: I2cce52561d30e30e1c81752cd2a455e7211006eb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com >
2018-06-05 12:44:43 +00:00
Kyösti Mälkki
e0e1e64855
amdfam10: Drop tests for LATE_CBMEM_INIT
...
Change-Id: Ibe16242d98531ff8e8a696f571496c6f46ea964b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-06-04 12:48:22 +00:00
Elyes HAOUAS
9d75957116
src/cpu: Get rid of whitespace before tab
...
Change-Id: Ic501f5f9e8cd79774eb2a8d8902f01853d746470
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2018-06-04 09:13:11 +00:00
Kyösti Mälkki
d840eb5719
Remove AMD K8 cpu and northbridge support
...
Change-Id: I9c53dfa93bf906334f5c80e4525a1c27153656a3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/26673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-05-31 03:42:11 +00:00
Elyes HAOUAS
99f0a51de3
cpu/amd/quadcore: Get rid of device_t
...
Use of device_t has been abandoned in ramstage.
Change-Id: I6cb8f36dea4a22fdf05c57bb3e3dcaeb2da8020f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/26066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Rudolph <siro@das-labor.org >
2018-05-09 13:15:53 +00:00
Elyes HAOUAS
d2d8a31305
cpu/amd: Get rid of device_t
...
Use of `device_t` has been abandoned in ramstage.
Change-Id: I4b930a191130941c8349861cdd803a5be4219274
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/23653
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
2018-04-30 09:23:47 +00:00
Elyes HAOUAS
12d65f80da
amd/agesa/family14,15 & 16: Remove unnecessary whitespace
...
Change-Id: I9495b47a85a6fb9d8d06d9a82c0444b794ec4933
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/23481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Felix Held <felix-coreboot@felixheld.de >
2018-04-29 17:09:09 +00:00
Elyes HAOUAS
b67cfbbe42
cpu/amd/microcode/microcode.c: Remove unneeded whitespace
...
Change-Id: Ib6f73dc0b0d11f6b66b7dbdd33cd6785359191ab
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr >
Reviewed-on: https://review.coreboot.org/25388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2018-04-10 10:47:46 +00:00
Kyösti Mälkki
c618b90119
AGESA f15 cimx/sb700: Remove unused chips code
...
Change-Id: Id4e05941122c8756f15d5d24482e4cdc04215c55
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/23275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org >
2018-01-24 02:09:18 +00:00
Kyösti Mälkki
9de8ab9ace
AGESA_LEGACY: Apply final cleanup and file removals
...
With no boards left using AGESA_LEGACY, wipe out remains
of that everywhere in the tree.
Change-Id: I0ddc1f400e56e42fe8a43b4766195e3a187dcea6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/18633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org >
2018-01-23 05:33:30 +00:00
Kyösti Mälkki
2bd6939dc5
AGESA f15 boards: Remove - using LATE_CBMEM_INIT
...
Boards that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
Removed boards:
amd/dinar
tyan/s2886
supermicro/h8scm
supermicro/h8qgi
Change-Id: I16be3b43fc0c48d58ed8b6667880c9571c6f5510
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/23274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Martin Roth <martinroth@google.com >
2018-01-17 13:23:33 +00:00
Martin Roth
99c45dee0a
AMD GX2 boards & chips: Remove - using LATE_CBMEM_INIT
...
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
cpu/amd/geode_gx2
northbridge/amd/gx2
southbridge/amd/cs5535
Mainboards:
mainboard/amd/rumba
mainboard/lippert/frontrunner
mainboard/wyse/s50
Change-Id: I81c130f53bbfa001edbfdb7a878ef115757f620c
Signed-off-by: Martin Roth <gaumless@gmail.com >
Reviewed-on: https://review.coreboot.org/22025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
2018-01-15 23:22:59 +00:00
Jonathan Neuschäfer
8f06ce3512
Constify struct cpu_device_id instances
...
There is currently no case where a struct cpu_device_id instance needs
to be modified. Thus, declare all instances as const.
Change-Id: I5ec7460b56d75d255b3451d76a46df76a51d6365
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
Reviewed-on: https://review.coreboot.org/22526
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-11-23 05:00:17 +00:00
Jonathan Neuschäfer
ec48c749c2
AMD boards: Fix function name (soft_reset) in message
...
Change-Id: Ia21a3e93712bd6b6780fe7308c6cf79c553f4e1b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net >
Reviewed-on: https://review.coreboot.org/21760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com >
2017-10-31 09:57:06 +00:00
Paul Menzel
1d6002a27c
cpu/amd: Fix spelling of *implementation*
...
Change-Id: I3ef810ee59492c8d7147934e61523c8fd223863b
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de >
Reviewed-on: https://review.coreboot.org/22013
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Martin Roth <martinroth@google.com >
2017-10-16 02:05:16 +00:00
Kyösti Mälkki
0e1ea279d0
AGESA vendorcode: Add ENABLE_MRC_CACHE option
...
When selected, try to store and restore memory training
results from/to SPI flash. This change only pulls in
the required parts from vendorcode for the build.
Change-Id: I12880237be494c71e1d4836abd2d4b714ba87762
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-10-05 13:23:27 +00:00
Kyösti Mälkki
f824784a20
binaryPI: Fix boot regressions
...
Fix boot regression after commit
d4955f0kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21840
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com >
2017-10-02 23:40:38 +00:00
Kyösti Mälkki
4286502140
AGESA binaryPI: Fix indirect AGESA.h include
...
Change-Id: I5e2affe337f7e61ca79530b3a77af963e8692ff1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21733
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com >
2017-09-29 05:45:44 +00:00
Kyösti Mälkki
d4955f0ade
AGESA: Move API interface under drivers/
...
New AGESA support files will be used for binaryPI
platforms as well. Furthermore, some of those should
move from split nb/ sb/ directories to soc/, so move
support files for the API under drivers/.
Change-Id: I549788091de91f61de8b9adc223d52ffb5732235
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-09-26 10:07:07 +00:00
Kyösti Mälkki
0f6c0b1a6f
AGESA: Drop CAR teardown without POSTCAR_STAGE
...
Except for family15, all AGESA boards have moved
away from AGESA_LEGACY_WRAPPER, thus they all
have POSTCAR_STAGE now.
AGESA family15 boards remain at AGESA_LEGACY=y, but
those boards have per-board romstage.c files and
are not touched here.
Change-Id: If750766cc7a9ecca4641a8f14e1ab15e9abb7ff5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/18632
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-09-26 10:06:32 +00:00
Kyösti Mälkki
63fac81fc8
AGESA: Implement POSTCAR_STAGE
...
Move all boards that have moved away from AGESA_LEGACY_WRAPPER
or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE.
We use POSTCAR_STAGE as a conditional in CAR teardown to tell
our MTRR setup is prepared such that invalidation without
writeback is a valid operation.
Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-09-26 10:05:48 +00:00
Kyösti Mälkki
b7959b5921
AGESA boards: Drop heapManager.h includes
...
Change-Id: I1a96b1c6181cd657d7aee82370ef86acd688cc94
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21483
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-09-12 16:35:56 +00:00
Kyösti Mälkki
3b4b069a0c
AGESA binaryPI: Remove heapmanager from romstage
...
With AMD_INIT_ENV and AMD_INIT_S3LATERESTORE moved
from romstage to ramstage, heapamanager in romstage
is no longer needed.
Change-Id: Iea8ad3ddb245c83dd290436ac9d4ecac9350b88c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21454
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-09-10 03:23:32 +00:00
Kyösti Mälkki
916b331a8d
ACPI S3: Handle LATE_CBMEM_INIT boards
...
Followup removes inlined acpi_is_wakeup_s3() from PRE_RAM,
and new implementation depends of CAR_GLOBAL.
Change-Id: Iea1c5ab2175f8d496baa09bd6137cacc912df2cb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz >
2017-09-09 11:18:10 +00:00
Kyösti Mälkki
f8e9449df0
AGESA: Drop old ACPI S3 resume path
...
Fixed ACPI S3 support will use POSTCAR_STAGE and no longer
uses the code removed here.
Change-Id: I180adaaccce5f0caabcdcd67f3000a21295b0ecf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21380
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Aaron Durbin <adurbin@chromium.org >
2017-09-08 03:19:38 +00:00
Kyösti Mälkki
ef40c0ce91
AGESA: Drop LATE_CBMEM_INIT in new interface
...
Change-Id: Iffa6cf495b4649f73a1095732509f195ac828248
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21379
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Martin Roth <martinroth@google.com >
2017-09-06 05:00:48 +00:00
Kyösti Mälkki
7076aa5745
AGESA: Rename assembly from .inc to .S
...
Change-Id: I5f90df92e0ac27e98edf23784eeec5618d150430
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org >
Reviewed-by: Martin Roth <martinroth@google.com >
2017-09-06 04:59:09 +00:00
Kyösti Mälkki
6acaca7e40
AGESA: Remove separate f15rl
...
Change-Id: I18c62ad034249c5ad14e5d5e708b4f0d4bcbf400
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/20774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
2017-08-31 16:28:55 +00:00
Kyösti Mälkki
5934be25fd
AGESA: Drop Kconfig CPU_AMD_SOCKET_AM3R2
...
Never selected in our tree.
Change-Id: I5065903ebf74d281ecccaf53e0cc9fa24317e1cd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com >
Reviewed-on: https://review.coreboot.org/21256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org >
Reviewed-by: Patrick Georgi <pgeorgi@google.com >
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net >
2017-08-30 03:52:19 +00:00
