Compare commits
253 Commits
2023-03-22
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csme-cml-u
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40
.gitmodules
vendored
40
.gitmodules
vendored
@@ -6,30 +6,10 @@
|
||||
path = coreboot
|
||||
url = https://github.com/system76/coreboot.git
|
||||
branch = system76
|
||||
[submodule "edk2-platforms"]
|
||||
path = edk2-platforms
|
||||
url = https://github.com/system76/edk2-platforms.git
|
||||
branch = system76
|
||||
[submodule "tools/UEFITool"]
|
||||
path = tools/UEFITool
|
||||
url = https://github.com/LongSoft/UEFITool.git
|
||||
branch = new_engine
|
||||
[submodule "libs/intelflash"]
|
||||
path = libs/intelflash
|
||||
url = https://gitlab.redox-os.org/redox-os/intelflash.git
|
||||
branch = master
|
||||
[submodule "libs/uefi"]
|
||||
path = libs/uefi
|
||||
url = https://gitlab.redox-os.org/redox-os/uefi.git
|
||||
branch = master
|
||||
[submodule "libs/coreboot-table"]
|
||||
path = libs/coreboot-table
|
||||
url = https://gitlab.redox-os.org/redox-os/coreboot-table.git
|
||||
branch = master
|
||||
[submodule "libs/intel-spi"]
|
||||
path = libs/intel-spi
|
||||
url = https://github.com/system76/intel-spi.git
|
||||
branch = master
|
||||
[submodule "tools/coreboot-collector"]
|
||||
path = tools/coreboot-collector
|
||||
url = https://github.com/system76/coreboot-collector.git
|
||||
@@ -46,26 +26,10 @@
|
||||
path = tools/MEAnalyzer
|
||||
url = https://github.com/platomav/MEAnalyzer.git
|
||||
branch = master
|
||||
[submodule "libs/coreboot-fs"]
|
||||
path = libs/coreboot-fs
|
||||
url = https://gitlab.redox-os.org/redox-os/coreboot-fs.git
|
||||
branch = master
|
||||
[submodule "apps/gop-policy"]
|
||||
path = apps/gop-policy
|
||||
url = https://github.com/system76/gop-policy.git
|
||||
branch = master
|
||||
[submodule "edk2-non-osi"]
|
||||
path = edk2-non-osi
|
||||
url = https://github.com/tianocore/edk2-non-osi.git
|
||||
branch = devel-MinPlatform
|
||||
[submodule "FSP"]
|
||||
path = FSP
|
||||
url = https://github.com/IntelFsp/FSP.git
|
||||
branch = master
|
||||
[submodule "apps/firmware-smmstore"]
|
||||
path = apps/firmware-smmstore
|
||||
url = https://github.com/system76/firmware-smmstore.git
|
||||
branch = master
|
||||
[submodule "tools/ipxe"]
|
||||
path = tools/ipxe
|
||||
url = https://github.com/ipxe/ipxe.git
|
||||
@@ -78,3 +42,7 @@
|
||||
path = tools/apobtool
|
||||
url = https://github.com/system76/apobtool.git
|
||||
branch = master
|
||||
[submodule "tools/intel-spi"]
|
||||
path = tools/intel-spi
|
||||
url = https://github.com/system76/intel-spi.git
|
||||
branch = master
|
||||
|
174
CHANGELOG.md
174
CHANGELOG.md
@@ -1,8 +1,178 @@
|
||||
# Changelog
|
||||
# System76 Open Firmware Changelog
|
||||
|
||||
Changes are identified by the date of the released firmware including them. If
|
||||
you are running System76 Open Firmware, opening the boot menu will show this
|
||||
date followed by an underscore and a short git revision.
|
||||
date followed by an underscore and a short git revision. To see if specific
|
||||
features apply to your model and firmware version, see the
|
||||
[feature matrix](./docs/features.md).
|
||||
|
||||
## unreleased
|
||||
|
||||
- tgl: Updated Intel GOP driver to 17.0.1077
|
||||
- tgl: Updated VBT to 250
|
||||
- Updated Rust toolchain to nightly-2024-05-11
|
||||
- cml-u: Updated CSME to 14.1.74.2355v6 (14.1.74.2373)
|
||||
|
||||
## 2024-05-17
|
||||
|
||||
- lemp13-b: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2024-05-07
|
||||
|
||||
- darp10: Added initial release of open firmware with System76 EC
|
||||
- darp10-b: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2024-04-29
|
||||
|
||||
- Fixed CMOS options not working due to invalid checksum
|
||||
|
||||
## 2024-03-25
|
||||
|
||||
- lemp13: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2024-03-21
|
||||
|
||||
- oryp12: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2024-03-11
|
||||
|
||||
- Updated coreboot to 24.02
|
||||
- adl-p: Updated FSP to C.1.75.10
|
||||
- adl-s: Updated FSP to C.0.75.10
|
||||
- adl: Updated microcode to revision 0x430
|
||||
- rpl-p: Updated FSP to C.1.BD.40
|
||||
- rpl-s: Updated FSP to C.0.BD.40
|
||||
- rpl: Updated microcode to revision 0x411c
|
||||
- tgl: Updated FSP to A.0.7E.70
|
||||
- tgl-u: Updated microcode to revision 0xb4
|
||||
- tgl-h: Updated microcode to revision 0x4e
|
||||
- adl: Fixed PCIe 4.0 drives in PCIe 3.0 slot failing to initialize on resume
|
||||
- rpl: Fixed PCIe 4.0 drives in PCIe 3.0 slot failing to initialize on resume
|
||||
- rpl: Fixed TCSS ACPI access
|
||||
- adl: Fixed `SLP_S0#` counter frequency
|
||||
- rpl: Fixed `SLP_S0#` counter frequency
|
||||
- tgl: Fixed TBT ACPI
|
||||
- Fixed RTC being reset on boot during February 29th
|
||||
- addw4: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2024-01-18
|
||||
|
||||
- darp9: Added SSD RTD3 configs to fix suspend with some drives
|
||||
|
||||
## 2024-01-10
|
||||
|
||||
- darp8: Fixed suspend issue on new boards by switching to S0ix by default
|
||||
- darp9: Fixed suspend issue on new boards by switching to S0ix by default
|
||||
|
||||
## 2023-10-20
|
||||
|
||||
- tgl-u: Fixed CPU not going lower than C2 due to card reader LTR
|
||||
- bonw15: Fixed speaker audio cutting in/out
|
||||
- oryp11: Fixed speaker audio cutting in/out
|
||||
|
||||
## 2023-10-13
|
||||
|
||||
- tgl-u: Fixed potential EC lock up during opportunistic suspend
|
||||
- galp5: Fixed CPU not going lower than C2 due to card reader LTR
|
||||
|
||||
## 2023-09-19
|
||||
|
||||
- rpl-hx: Added support for 5600 MHz RAM
|
||||
|
||||
## 2023-09-08
|
||||
|
||||
- adl: Updated CSME to 16.1.25.2124
|
||||
- adl,rpl: Fixed SMMSTORE init sometimes failing
|
||||
- Increased key debounce from 5ms to 10ms
|
||||
|
||||
## 2023-08-23
|
||||
|
||||
- rpl: Fixed RPL-S GPIO driver on Windows
|
||||
|
||||
## 2023-08-18
|
||||
|
||||
- cml-u: Fixed boot failing at FSP-S
|
||||
- Added KBC reset on CPU reset to prevent keyboard from being locked
|
||||
- Enabled power switch Watch Dog Timer with a timeout of 10 seconds
|
||||
- Fixed detecting if PECI is available on eSPI systems using S0ix
|
||||
- Added support for a FnLock key
|
||||
- tgl: Fixed Bluetooth performance by enabling audio offload
|
||||
- gaze16: Fixed CPU not going lower than C2 due to card reader LTR
|
||||
- adl: Fixed CPU not going lower than C2 due to card reader LTR
|
||||
- rpl: Fixed CPU not going lower than C2 due to card reader LTR
|
||||
- Changed battery charge start threshold to 90%
|
||||
- Changed charger to disable when battery is full
|
||||
|
||||
## 2023-07-19
|
||||
|
||||
- bonw14: Fixed loading CPU microcode
|
||||
- rpl-hx: Fixed setting PL1 and PL2 power limits
|
||||
- rpl-hx: Fixed LPM substates
|
||||
- gaze17: Removed invalid RTD3 configs
|
||||
- oryp10: Removed invalid RTD3 configs
|
||||
- galp8: Removed SATA RTD3 to fix drives being lost on suspend
|
||||
- lemp11: Removed SATA RTD3 to fix drives being lost on suspend
|
||||
- Reduced key debounce from 15ms to 5ms
|
||||
- galp6: Fixed fan tachometer GPIOs
|
||||
- lemp9: Fixed fan tachometer GPIOs
|
||||
- lemp10: Fixed fan tachometer GPIOs
|
||||
- lemp11: Fixed fan tachometer GPIOs
|
||||
|
||||
## 2023-07-10
|
||||
|
||||
- Updated Secure Boot DBX to version 371 (2023-05-09)
|
||||
- bonw15: Added initial release of open firmware with System76 EC
|
||||
- oryp11: Changed adapter Rsense to 10 milliohms
|
||||
- serw13: Changed adapter Rsense to 10 milliohms
|
||||
|
||||
## 2023-06-22
|
||||
|
||||
- addw3: Enabled support for 5200 MT/s memory
|
||||
- serw13: Enabled support for 5200 MT/s memory
|
||||
- oryp11: Added initial release of open firmware with System76 EC
|
||||
- rpl: Enabled TPM read delay to fix occasional failures with Infineon chips
|
||||
- Changed TPM behavior to perform TPM Restart if TPM Resume fails
|
||||
|
||||
## 2023-06-08
|
||||
|
||||
- darp9: Added initial release of open firmware with System76 EC
|
||||
- Added detection of RGB keyboards at runtime
|
||||
- oryp9: Enabled firmware security
|
||||
- oryp9: Enabled NVIDIA Dynamic Boost
|
||||
- oryp10: Enabled firmware security
|
||||
- oryp10: Enabled NVIDIA Dynamic Boost
|
||||
- Invalidated CMOS checksum after flashing to ensure default options are used
|
||||
|
||||
## 2023-05-25
|
||||
|
||||
- Set PL4 based on AC state for all boards
|
||||
- Increased PL4 on battery to 45W for dGPU boards
|
||||
- galp6: Enabled firmware security
|
||||
- galp7: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2023-05-17
|
||||
|
||||
- serw13: Added initial release of open firmware with System76 EC
|
||||
- Fixed Windows BSoD on RPL-HX
|
||||
|
||||
## 2023-05-16
|
||||
|
||||
- lemp12: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2023-04-28
|
||||
|
||||
- addw3: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2023-03-22
|
||||
|
||||
- Updated coreboot to upstream commit decbf7b4d975
|
||||
- Enabled support for Secure Boot
|
||||
- Enabled minimal UI for enforcing Secure Boot and resetting keys
|
||||
- Added firmware locking support
|
||||
- Enabled S3 suspend on everything but TGL-U
|
||||
- Disabled ME by default on everything but TGL-U
|
||||
- Added support for NVIDIA Dynamic Boost
|
||||
- gaze18: Added initial release of open firmware with System76 EC
|
||||
|
||||
## 2022-11-21
|
||||
|
||||
|
1
FSP
1
FSP
Submodule FSP deleted from 81dd5055f4
134
Jenkinsfile
vendored
Normal file
134
Jenkinsfile
vendored
Normal file
@@ -0,0 +1,134 @@
|
||||
#!/usr/bin/env groovy
|
||||
|
||||
// Required plugins:
|
||||
// - Jenkins Core
|
||||
// - AnsiColor (https://plugins.jenkins.io/ansicolor/)
|
||||
// - Git (https://plugins.jenkins.io/git/)
|
||||
// - Pipeline (https://plugins.jenkins.io/workflow-aggregator/)
|
||||
// - Slack Notification (https://plugins.jenkins.io/slack/)
|
||||
|
||||
def all_models = 'addw2 addw3 addw4 bonw14 bonw15 darp5 darp6 darp7 darp8 darp9 darp10 darp10-b galp3-c galp4 galp5 galp6 galp7 gaze15 gaze16-3050 gaze16-3060 gaze16-3060-b gaze16-3050 gaze16-3060-b gaze17-3050 gaze17-3060-b gaze18 lemp9 lemp10 lemp11 lemp12 lemp13 oryp5 oryp6 oryp7 oryp8 oryp9 oryp10 oryp11 oryp12 serw13'
|
||||
|
||||
void setBuildStatus(String state, String message) {
|
||||
// FIXME: https://www.jenkins.io/doc/book/pipeline/jenkinsfile/#string-interpolation
|
||||
sh """
|
||||
curl \
|
||||
-X POST \
|
||||
-H \'Accept: application/vnd.github+json\' \
|
||||
-H \'Authorization: Bearer ${GITHUB_TOKEN}\' \
|
||||
-H \'X-GitHub-Api-Version: 2022-11-28\' \
|
||||
https://api.github.com/repos/system76/firmware-open/statuses/${GIT_COMMIT} \
|
||||
-d \'{\"state\": \"${state}\", \"target_url\": \"${BUILD_URL}\", \"description\": \"${message}\"}\'
|
||||
"""
|
||||
}
|
||||
|
||||
pipeline {
|
||||
agent {
|
||||
label 'warp.pop-os.org'
|
||||
}
|
||||
|
||||
environment {
|
||||
GITHUB_TOKEN = credentials('github-commit-status')
|
||||
}
|
||||
|
||||
options {
|
||||
buildDiscarder(logRotator(numToKeepStr: '16', artifactNumToKeepStr: '1'))
|
||||
disableConcurrentBuilds()
|
||||
timeout(time: 1, unit: 'HOURS')
|
||||
timestamps()
|
||||
ansiColor('xterm')
|
||||
}
|
||||
|
||||
parameters {
|
||||
string(name: 'MODELS', defaultValue: "$all_models", description: 'Space separated list of models to build', trim: true)
|
||||
string(name: 'SOURCE_BRANCH', defaultValue: 'master', description: 'Git branch or revision to build', trim: true)
|
||||
}
|
||||
|
||||
triggers {
|
||||
pollSCM('')
|
||||
}
|
||||
|
||||
stages {
|
||||
stage('Prepare') {
|
||||
steps {
|
||||
setBuildStatus("pending", "Pending")
|
||||
slackSend(color: "good", message: "${env.JOB_NAME} - #${env.BUILD_ID} started (<${env.BUILD_URL}|Open>)")
|
||||
|
||||
sh """#!/bin/bash
|
||||
# Update submodule URLs because of coreboot
|
||||
git submodule sync --recursive
|
||||
"""
|
||||
|
||||
// https://www.jenkins.io/doc/pipeline/steps/params/scmgit/
|
||||
checkout scmGit(
|
||||
branches: [[name: '${SOURCE_BRANCH}']],
|
||||
extensions: [
|
||||
lfs(),
|
||||
pruneStaleBranch(),
|
||||
pruneTags(true),
|
||||
submodule(
|
||||
parentCredentials: true,
|
||||
recursiveSubmodules: true,
|
||||
reference: ''
|
||||
),
|
||||
],
|
||||
userRemoteConfigs: [[url: 'https://github.com/system76/firmware-open.git']]
|
||||
)
|
||||
|
||||
sh """#!/bin/bash
|
||||
# Install dependencies
|
||||
#./scripts/install-deps.sh
|
||||
. "${HOME}/.cargo/env"
|
||||
|
||||
# Reset
|
||||
git submodule update --init --recursive --checkout
|
||||
git reset --hard
|
||||
git submodule foreach --recursive git reset --hard
|
||||
|
||||
# Clean
|
||||
git clean -dffx
|
||||
git submodule foreach --recursive git clean -dff
|
||||
|
||||
# EDK2 builds fail if file paths in INFs change from what's in the build cache
|
||||
pushd edk2; git clean -dffx; popd
|
||||
"""
|
||||
}
|
||||
}
|
||||
stage('Build') {
|
||||
steps {
|
||||
// The workspace is reused, so must build models sequentially.
|
||||
script {
|
||||
def list = params.MODELS.tokenize()
|
||||
list.each { model ->
|
||||
stage(model) {
|
||||
sh """#!/bin/bash
|
||||
. "${HOME}/.cargo/env"
|
||||
# WORSKSPACE is set by Jenkins, but EDK2 uses it
|
||||
env --unset=WORKSPACE \
|
||||
./scripts/build.sh "${model}"
|
||||
"""
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
post {
|
||||
always {
|
||||
archiveArtifacts artifacts: 'build/*/*', allowEmptyArchive: true
|
||||
}
|
||||
success {
|
||||
setBuildStatus("success", "Successful")
|
||||
slackSend(color: "good", message: "${env.JOB_NAME} - #${env.BUILD_ID} successful after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
|
||||
}
|
||||
failure {
|
||||
setBuildStatus("failure", "Failed")
|
||||
slackSend(color: "danger", message: "${env.JOB_NAME} - #${env.BUILD_ID} failed after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
|
||||
}
|
||||
aborted {
|
||||
setBuildStatus("failure", "Failed")
|
||||
slackSend(color: "warning", message: "${env.JOB_NAME} - #${env.BUILD_ID} aborted after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
|
||||
}
|
||||
}
|
||||
}
|
@@ -33,7 +33,7 @@ The license for the embedded controller firmware depends on the binary used.
|
||||
|
||||
#### Intel binaries
|
||||
|
||||
Intel provides biniaries under a redistributable license, which may be
|
||||
Intel provides binaries under a redistributable license, which may be
|
||||
different per binary.
|
||||
|
||||
- `me.rom`: Intel CSME
|
||||
|
83
README.md
83
README.md
@@ -3,81 +3,10 @@
|
||||
An open source distribution of firmware utilizing coreboot, EDK2, and System76
|
||||
firmware applications.
|
||||
|
||||
## Supported models
|
||||
## Resources
|
||||
|
||||
These models are supported and will receive updates through the firmware
|
||||
manager:
|
||||
|
||||
- addw2
|
||||
- bonw14
|
||||
- darp6
|
||||
- darp7
|
||||
- darp8
|
||||
- galp4
|
||||
- galp5
|
||||
- galp6
|
||||
- gaze15
|
||||
- gaze16-3050
|
||||
- gaze16-3060
|
||||
- gaze16-3060-b
|
||||
- gaze17-3050
|
||||
- gaze17-3060-b
|
||||
- lemp9
|
||||
- lemp10
|
||||
- lemp11
|
||||
- oryp6
|
||||
- oryp7
|
||||
- oryp8
|
||||
- oryp9
|
||||
- oryp10
|
||||
|
||||
Other models may be in development or available without support, and can be
|
||||
seen in the `models/` directory.
|
||||
|
||||
If the device becomes bricked it will require restoring the current firmware
|
||||
using an external programmer. See [flashing](./docs/flashing.md) for details.
|
||||
|
||||
### Schematics
|
||||
|
||||
System76 customers may request board schematics for their system by sending an
|
||||
email to firmware@system76.com with the subject line "Schematics for _model_",
|
||||
where _model_ is one of the supported models listed above. Please include the
|
||||
serial number of your system for verification.
|
||||
|
||||
You may not share these without explicit permission from System76.
|
||||
|
||||
## Changelog
|
||||
|
||||
For a list of important changes please see the [changelog](./CHANGELOG.md).
|
||||
|
||||
## Building
|
||||
|
||||
Dependencies can be installed with the provided script.
|
||||
|
||||
```
|
||||
./scripts/deps.sh
|
||||
```
|
||||
|
||||
If rustup was installed for the first time, it will be required to source the
|
||||
environment file it installed to use the correct Rust toolchain.
|
||||
|
||||
```
|
||||
source ~/.cargo/env
|
||||
```
|
||||
|
||||
A script is provided to build the firmware. The available targets for building
|
||||
are the model folders in `models/`. For example, to build for QEMU:
|
||||
|
||||
```
|
||||
./scripts/build.sh qemu
|
||||
```
|
||||
|
||||
Once built, the firmware must be flashed to use. Several scripts are available
|
||||
to flash the new firmware, depending on how it is going to be written.
|
||||
|
||||
- `scripts/qemu.sh`: [Run the firmware in QEMU](./docs/debugging.md#using-qemu) (specific to the QEMU model)
|
||||
- `scripts/flash.sh`: Flash using the internal flasher
|
||||
- `scripts/ch341a-flash.sh`: Flash using a CH341A programmer
|
||||
- `scripts/spipi-flash.sh`: Flash using a Raspberry Pi
|
||||
|
||||
See [Flashing firmware](./docs/flashing.md) for more details.
|
||||
- [Project site](https://github.com/system76/firmware-open)
|
||||
- [Documentation](./docs/index.md)
|
||||
- [Issue tracker](https://github.com/system76/firmware-open/issues/)
|
||||
- [Changelog](./CHANGELOG.md)
|
||||
- [Legal information](./LICENSE.md)
|
||||
|
@@ -3,6 +3,5 @@
|
||||
## Contents
|
||||
|
||||
- [firmware-setup](https://github.com/system76/firmware-setup.git) - System76 Firmware Setup
|
||||
- [firmware-smmstore](https://github.com/system76/firmware-smmstore.git) - System76 Firmware SMMSTORE
|
||||
- [firmware-update](https://github.com/system76/firmware-update.git) - System76 Firmware Update
|
||||
- [gop-policy](https://github.com/system76/gop-policy.git) - System76 Platform GOP Policy
|
||||
|
Submodule apps/firmware-setup updated: 88ff9a046f...33bf2f3d5e
Submodule apps/firmware-smmstore deleted from 00c44d42ac
Submodule apps/firmware-update updated: 4f5eb34d85...83b2ceb31b
Submodule apps/gop-policy updated: fb2f2c04cb...61a9e9fad2
2
coreboot
2
coreboot
Submodule coreboot updated: 421b2ecbb0...792996fc8c
@@ -1 +0,0 @@
|
||||
# System76 Open Firmware Documentation
|
11
docs/SUMMARY.md
Normal file
11
docs/SUMMARY.md
Normal file
@@ -0,0 +1,11 @@
|
||||
# Summary
|
||||
|
||||
- [Index](./index.md)
|
||||
- [Firmware features](./features.md)
|
||||
- [Building firmware](./building.md)
|
||||
- [Flashing firmware](./flashing.md)
|
||||
- [Debugging](./debugging.md)
|
||||
- [Adding a new board](./adding-a-new-board.md)
|
||||
- [Intel CSME](./intel-me.md)
|
||||
- [UEFI](./uefi.md)
|
||||
- [Schematics](./schematics.md)
|
@@ -71,18 +71,23 @@ Other things that should be dumped before porting/flashing are:
|
||||
|
||||
To port coreboot to a new board, see the coreboot documentation.
|
||||
|
||||
- [TAS5825M] smart amp
|
||||
Add a `coreboot.config` file to the model directory. This can be copied from
|
||||
another similar board as a reference, just updating the name. Typically, the
|
||||
only special cases that need to be handled are when an FSP or microcode is
|
||||
used that are not part of coreboot.
|
||||
|
||||
Once coreboot is ported, add its configuration.
|
||||
### Smart amp
|
||||
|
||||
```
|
||||
cp coreboot/.config models/<model>/coreboot.config
|
||||
```
|
||||
Boards may have a smart amp, which must be configured for speaker output to
|
||||
work.
|
||||
|
||||
### devicetree
|
||||
The initialization data for Realtek smart amps can be dumped from the module
|
||||
that does the codec init in proprietary firmware. The correct module can be
|
||||
found using UEFITool by searching for the vendor/device ID of the codec, such
|
||||
as "10ec1220" for the ALC1220. This is the start of the `cim_verb_data` array
|
||||
in coreboot.
|
||||
|
||||
`generate.sh` does not create `devicetree.cb`. Some values for this file can be
|
||||
produced using the `devicetree.py` script.
|
||||
For info on the TI TAS5825M smart amp, see the [smart-amp] repo.
|
||||
|
||||
## Configuring Intel CSME
|
||||
|
||||
@@ -106,4 +111,4 @@ READMEs.
|
||||
[external-programmer]: ./flashing.md#external-programmer
|
||||
[intel-microcode]: https://github.com/system76/intel-microcode
|
||||
[mega2560]: https://github.com/system76/ec/blob/master/doc/mega2560.md
|
||||
[TAS5825M]: https://github.com/system76/smart-amp
|
||||
[smart-amp]: https://github.com/system76/smart-amp
|
||||
|
18
docs/book.toml
Normal file
18
docs/book.toml
Normal file
@@ -0,0 +1,18 @@
|
||||
[book]
|
||||
title = "System76 Open Firmware"
|
||||
description = "System76 Open Firmware documentation"
|
||||
language = "en"
|
||||
src = "."
|
||||
|
||||
[build]
|
||||
build-dir = "../build/docs"
|
||||
create-missing = false
|
||||
|
||||
[output.html]
|
||||
default-theme = "rust"
|
||||
preferred-dark-theme = "coal"
|
||||
no-section-label = true
|
||||
git-repository-url = "https://github.com/system76/firmware-open"
|
||||
|
||||
[output.html.print]
|
||||
enable = false
|
31
docs/building.md
Normal file
31
docs/building.md
Normal file
@@ -0,0 +1,31 @@
|
||||
# Building
|
||||
|
||||
Dependencies can be installed with the provided script.
|
||||
|
||||
```
|
||||
./scripts/install-deps.sh
|
||||
```
|
||||
|
||||
If rustup was installed for the first time, it will be required to source the
|
||||
environment file it installed to use the correct Rust toolchain.
|
||||
|
||||
```
|
||||
. ~/.cargo/env
|
||||
```
|
||||
|
||||
A script is provided to build the firmware. The available targets for building
|
||||
are the model folders in `models/`. For example, to build for QEMU:
|
||||
|
||||
```
|
||||
./scripts/build.sh qemu
|
||||
```
|
||||
|
||||
Once built, the firmware must be flashed to use. Several scripts are available
|
||||
to flash the new firmware, depending on how it is going to be written.
|
||||
|
||||
- `scripts/qemu.sh`: [Run the firmware in QEMU](./debugging.md#using-qemu) (specific to the QEMU model)
|
||||
- `scripts/flash.sh`: Flash using firmware-update
|
||||
- `scripts/ch341a-flash.sh`: Flash using a CH341A programmer
|
||||
- `scripts/spipi-flash.sh`: Flash using a Raspberry Pi
|
||||
|
||||
See [Flashing firmware](./flashing.md) for more details.
|
@@ -52,8 +52,8 @@ A couple of methods can be used to get debug logging.
|
||||
|
||||
This method requires no soldering of board components.
|
||||
|
||||
See [Debugging the EC firmware](./ec/doc/debugging.md) for details on setting
|
||||
up EC debugging over the parallel port.
|
||||
See [Debugging the EC firmware](https://github.com/system76/ec/blob/master/docs/debugging.md)
|
||||
for details on setting up EC debugging over the parallel port.
|
||||
|
||||
cbmem output can be passed through the EC by enabling the driver in coreboot.
|
||||
Uncomment the config in `models/<model>/coreboot.config` to enable logging the
|
||||
|
190
docs/features.md
Normal file
190
docs/features.md
Normal file
@@ -0,0 +1,190 @@
|
||||
# System76 Open Firmware Feature Matrix
|
||||
|
||||
This lists important features provided by System76 Open Firmware. Your system
|
||||
must be updated to at least the firmware version specified in the following
|
||||
[platform tables](#platforms) to include all specified [features](#features).
|
||||
To see the changes in specific firmware versions, see the
|
||||
[changelog](./../CHANGELOG.md).
|
||||
|
||||
## Platforms
|
||||
|
||||
- [Intel 13th Gen (Raptor Lake)](#intel-13th-gen-raptor-lake)
|
||||
- [Intel 12th Gen (Alder Lake)](#intel-12th-gen-alder-lake)
|
||||
- [Intel 11th Gen (Tiger Lake)](#intel-11th-gen-tiger-lake)
|
||||
- [Intel 10th Gen (Comet Lake)](#intel-10th-gen-comet-lake)
|
||||
|
||||
### Intel 13th Gen (Raptor Lake)
|
||||
|
||||
This generation universally supports these features with up-to-date firmware:
|
||||
|
||||
- [Intel VT-x](#intel-vt-x)
|
||||
- [Intel VT-d](#intel-vt-d)
|
||||
- [Disabled Management Engine](#disabled-management-engine)
|
||||
- [TPM 2.0 Support](#tpm-20-support)
|
||||
- [Battery Charging Thresholds](#battery-charging-thresholds)
|
||||
- [Keyboard Customization](#keyboard-customization)
|
||||
- [Measured Boot](#measured-boot)
|
||||
- [Firmware Security System](#firmware-security-system)
|
||||
- [Secure Boot Support](#secure-boot-support)
|
||||
|
||||
| System76 Model (Version) | Firmware Version | SoC | [Windows 11 Support](#windows-11-support) | [NVIDIA Dynamic Boost](#nvidia-dynamic-boost) |
|
||||
|--------------------------|---------------------|--------|-----|-----|
|
||||
| Adder WS (addw3) | 2023-05-17\_9560b2e | RPL-HX | ✔ | ✔ |
|
||||
| Bonobo WS (bonw15) | 2023-07-10\_0e4a64a | RPL-HX | ✔ | ✔ |
|
||||
| Darter Pro (darp9) | 2023-06-08\_a8590a5 | RPL-P | ✔ | N/A |
|
||||
| Galago Pro (galp7) | 2023-05-25\_5608a8d | RPL-H | ✔ | N/A |
|
||||
| Gazelle (gaze18) | 2023-03-22\_799ed79 | RPL-H | ✔ | ✔ |
|
||||
| Lemur Pro (lemp12) | 2023-05-16\_e9b9ea8 | RPL-U | ✔ | N/A |
|
||||
| Oryx Pro (oryp11) | 2023-06-22\_e5c3632 | RPL-H | ✔ | ✔ |
|
||||
| Serval WS (serw13) | 2023-05-17\_9560b2e | RPL-HX | ✔ | ✔ |
|
||||
|
||||
### Intel 12th Gen (Alder Lake)
|
||||
|
||||
This generation universally supports these features with up-to-date firmware:
|
||||
|
||||
- [Intel VT-x](#intel-vt-x)
|
||||
- [Intel VT-d](#intel-vt-d)
|
||||
- [TPM 2.0 Support](#tpm-20-support)
|
||||
- [Battery Charging Thresholds](#battery-charging-thresholds)
|
||||
- [Keyboard Customization](#keyboard-customization)
|
||||
- [Measured Boot](#measured-boot)
|
||||
|
||||
| System76 Model (Version) | Firmware Version | SoC |
|
||||
|--------------------------|---------------------|--------|
|
||||
| Darter Pro (darp8) | 2022-11-21\_b337ac6 | ADL-P |
|
||||
| Galago Pro (galp6) | 2022-11-21\_b337ac6 | ADL-P |
|
||||
| Gazelle (gaze17-3050) | 2022-11-21\_b337ac6 | ADL-H |
|
||||
| Gazelle (gaze17-3060-b) | 2022-06-07\_090f9e0 | ADL-H |
|
||||
| Lemur Pro (lemp11) | 2022-11-21\_b337ac6 | ADL-U |
|
||||
| Oryx Pro (oryp9) | 2022-07-20\_ae6aa72 | ADL-H |
|
||||
| Oryx Pro (oryp10) | 2022-09-26\_aa797d2 | ADL-H |
|
||||
|
||||
### Intel 11th Gen (Tiger Lake)
|
||||
|
||||
This generation universally supports these features with up-to-date firmware:
|
||||
|
||||
- [Intel VT-x](#intel-vt-x)
|
||||
- [Intel VT-d](#intel-vt-d)
|
||||
- [TPM 2.0 Support](#tpm-20-support)
|
||||
- [Battery Charging Thresholds](#battery-charging-thresholds)
|
||||
- [Keyboard Customization](#keyboard-customization)
|
||||
|
||||
| System76 Model (Version) | Firmware Version | SoC | [Measured Boot](#measured-boot) |
|
||||
|--------------------------|---------------------|--------|----|
|
||||
| Darter Pro (darp7) | 2022-11-21\_b337ac6 | TGL-U | ✔️ |
|
||||
| Galago Pro (galp5) | 2022-11-21\_b337ac6 | TGL-U | ✔️ |
|
||||
| Gazelle (gaze16-3050) | 2022-11-21\_b337ac6 | TGL-H | ✔️ |
|
||||
| Gazelle (gaze16-3060) | 2021-09-30\_14b8a6e | TGL-H | ❌ |
|
||||
| Gazelle (gaze16-3060-b) | 2021-11-01\_fb9d759 | TGL-H | ❌ |
|
||||
| Lemur Pro (lemp10) | 2022-11-21\_b337ac6 | TGL-U | ✔️ |
|
||||
| Oryx Pro (oryp8) | 2022-10-14\_4136ef8 | TGL-H | ✔️ |
|
||||
|
||||
### Intel 10th Gen (Comet Lake)
|
||||
|
||||
This generation universally supports these features with up-to-date firmware:
|
||||
|
||||
- [Intel VT-x](#intel-vt-x)
|
||||
- [Intel VT-d](#intel-vt-d)
|
||||
- [Disabled Management Engine](#disabled-management-engine)
|
||||
- [TPM 2.0 Support](#tpm-20-support)
|
||||
- [Battery Charging Thresholds](#battery-charging-thresholds)
|
||||
- [Keyboard Customization](#keyboard-customization)
|
||||
|
||||
| System76 Model (Version) | Firmware Version | SoC | [Measured Boot](#measured-boot) |
|
||||
|--------------------------|---------------------|--------|----|
|
||||
| Adder WS (addw2) | 2022-11-21\_b337ac6 | CML-H | ✔️ |
|
||||
| Bonobo WS (bonw14) | 2021-07-20\_93c2809 | CML-S | ❌ |
|
||||
| Darter Pro (darp6) | 2021-07-20\_93c2809 | CML-U | ❌ |
|
||||
| Gazelle (gaze15) | 2022-11-21\_b337ac6 | CML-H | ✔️ |
|
||||
| Lemur Pro (lemp9) | 2021-07-20\_93c2809 | CML-U | ❌ |
|
||||
| Oryx Pro (oryp6) | 2021-07-20\_93c2809 | CML-H | ❌ |
|
||||
| Oryx Pro (oryp7) | 2022-11-21\_b337ac6 | CML-H | ✔️ |
|
||||
|
||||
## Features
|
||||
|
||||
### Intel VT-x
|
||||
|
||||
Intel Virtualization Technology is enabled, which provides support for high
|
||||
performance virtual machines.
|
||||
|
||||
### Intel VT-d
|
||||
|
||||
Intel Virtualization Technology for Directed I/O is enabled, which provides
|
||||
support for passing PCIe devices to virtual machines, and for protecting against
|
||||
PCIe device craches and DMA attacks.
|
||||
|
||||
### Disabled Management Engine
|
||||
|
||||
The Intel Management Engine is disabled at runtime to improve security.
|
||||
|
||||
### TPM 2.0 Support
|
||||
|
||||
**Introduced in firmware version 2020-08-13.**
|
||||
|
||||
A discrete TPM 2.0 is available for use.
|
||||
|
||||
### Battery Charging Thresholds
|
||||
|
||||
**Introduced in firmware version 2020-10-19.**
|
||||
|
||||
Battery charging thresholds extend the life of the battery by reducing the
|
||||
maximum charge that the battery is charged to, as well as the minimum charge
|
||||
when charging the battery begins.
|
||||
|
||||
### Keyboard Customization
|
||||
|
||||
**Introduced in firmware version 2020-10-19.**
|
||||
|
||||
Keyboard customization allows the keyboard layout to be modified at runtime
|
||||
using the
|
||||
[System76 Keyboard Configurator](https://github.com/pop-os/keyboard-configurator/).
|
||||
|
||||
### Measured Boot
|
||||
|
||||
**Introduced in firmware version 2022-01-06.**
|
||||
|
||||
Measured boot uses the TPM to maintain hashes of all binaries used in the boot
|
||||
process. This allows for detecting changes to the firmware, which can be used
|
||||
by a system such as TPM2-TOTP or BitLocker to improve security.
|
||||
|
||||
### Firmware Security System
|
||||
|
||||
**Introduced in firmware version 2023-04-03.**
|
||||
|
||||
The firmware security system ensures both SoC and EC firmware is read-only at
|
||||
runtime. Unlocking the firmware requires the system to reboot and physical
|
||||
presence is required. The user must enter in a secure, randomly generated number
|
||||
before the system can boot any third-party code while unlocked. Both EC firmware
|
||||
and system firmware are locked on any boots where the prompt is not shown. For
|
||||
screenshots showing this prompt, see the pull request here:
|
||||
https://github.com/system76/firmware-setup/pull/18
|
||||
|
||||
### Secure Boot Support
|
||||
|
||||
**Introduced in firmware version 2023-04-03.**
|
||||
|
||||
A new firmware setup menu allows enabling and disabling Secure Boot and also
|
||||
allows for entering setup mode for custom key enrollment. Work is being done in
|
||||
Pop!\_OS to enable the use of custom secure boot keys, in addition to adding
|
||||
TPM2-TOTP authentication of the firmware boot path. For screenshots showing the
|
||||
new menus, see the pull request here:
|
||||
https://github.com/system76/edk2/pull/38
|
||||
|
||||
### Windows 11 Support
|
||||
|
||||
**Introduced in firmware version 2023-04-03.**
|
||||
|
||||
Windows 11 requires [TPM 2.0 Support](#tpm-20-support) and
|
||||
[Secure Boot Support](#secure-boot-support). For users wanting to use Windows, the use of Windows 11 is
|
||||
recommended for Intel 12th Generation (Alder Lake) and newer systems, as it
|
||||
includes a new scheduler that supports the efficiency cores.
|
||||
|
||||
### NVIDIA Dynamic Boost
|
||||
|
||||
**Introduced in firmware version 2023-04-03.**
|
||||
|
||||
On new systems with the NVIDIA 4000 series GPUs, NVIDIA Dynamic Boost has been
|
||||
enabled with new code in coreboot. This allows power to be shared between the
|
||||
CPU and GPU, diverting power to the subsystem that needs it most. This can
|
||||
provide an additional 25W boost split between the CPU and GPU depending on the
|
||||
task, significantly improving throughput and framerates.
|
@@ -13,16 +13,44 @@ coreboot's `cbmem` tool can be used to verify this. The call to
|
||||
`FspMemoryInit()` can report 20+ seconds on the first boot, and a few hundred
|
||||
milliseconds on subsequent boots.
|
||||
|
||||
## UEFI application
|
||||
|
||||
This is the default method for flashing firmware (using firmware-update). When
|
||||
used from this repo, it only works with systems running System76 open firmware.
|
||||
|
||||
```
|
||||
./scripts/flash.sh <model>
|
||||
```
|
||||
|
||||
By default the script will attempt to flash both the BIOS and the EC. Their
|
||||
respective file can be deleted to skip flashing them.
|
||||
|
||||
If the EC is flashed, the system will immediately power off.
|
||||
|
||||
## Internal programmer
|
||||
|
||||
Use this method for flashing a system already running System76 Open Firmware.
|
||||
### Availability
|
||||
|
||||
This method is only possible when firmware is unlocked. Firmware is unlocked by
|
||||
one of two methods:
|
||||
|
||||
- The EC feature `CONFIG_SECURITY` is unset/disabled
|
||||
- The EC is unlock for a single boot (via firmware-update or ectool)
|
||||
|
||||
The current state can be determined using ectool:
|
||||
|
||||
```
|
||||
./scripts/flash.sh <model> [--without-ec]
|
||||
./ec/scripts/ectool.sh security
|
||||
```
|
||||
|
||||
By default the script will attempt to flash the EC. If the EC is flashed, the
|
||||
system will immediately power off.
|
||||
- `Lock`: This method can't be used
|
||||
- `Unlock`: This method can be used
|
||||
|
||||
### flashrom
|
||||
|
||||
```
|
||||
sudo flashrom -p internal -w build/<model>/firmware.rom
|
||||
```
|
||||
|
||||
## External programmer
|
||||
|
||||
@@ -31,13 +59,14 @@ Use one of these methods for first-time flashing or flashing a bricked system.
|
||||
### Identifying the BIOS chip
|
||||
|
||||
The packaging and protocol can be determined by `board_info.txt` in coreboot.
|
||||
Pin 1 is marked by a small dot indent and a white paint mark. The silkscreen
|
||||
may also indicate pin 1.
|
||||
Pin 1 is sometimes marked by a small dot indent and a white paint mark. The
|
||||
silkscreen may also indicate pin 1.
|
||||
|
||||
### CH341A USB programmer - slower, but easier to set up
|
||||
|
||||
These can be purchased from many places for around 15 USD. Make sure that the
|
||||
one you get has a ROM clip. Here are some examples:
|
||||
|
||||
- [Amazon.com, Organizer.](https://www.amazon.com/Organizer-Socket-Adpter-Programmer-CH341A/dp/B07R5LPTYM)
|
||||
- [Amazon.com, KeeYees.](https://www.amazon.com/KeeYees-SOIC8-EEPROM-CH341A-Programmer/dp/B07SHSL9X9)
|
||||
- [AliExpress.com, TZT.](https://aliexpress.com/item/32725360255.html)
|
||||
|
9
docs/index.md
Normal file
9
docs/index.md
Normal file
@@ -0,0 +1,9 @@
|
||||
# Documentation
|
||||
|
||||
This is the documentation for System76 Open Firmware. It is set up to be used
|
||||
with [mdBook](https://github.com/rust-lang/mdBook), which can generate HTML
|
||||
output for easy navigation.
|
||||
|
||||
```
|
||||
mdbook build --open docs/
|
||||
```
|
@@ -27,15 +27,46 @@ A restart is required for the change to take effect. On the boot after changing
|
||||
the value, the system will perform a global reset (power off again) to complete
|
||||
the change and ensure the IME is operating in a valid state.
|
||||
|
||||
## Tiger Lake-U
|
||||
### Checking the state
|
||||
|
||||
Models using TGL-U processors default to having the IME enabled. TGL-U removes
|
||||
support for S3 and requires S0ix. This requires all CPU, PCH, and PCIe devices
|
||||
to have ACPI defined low power states. With S0ix, the CPU has numerous states
|
||||
for low power, with the lowest being C10. In order to reach this C10 state, the
|
||||
IME must report that it is in a low power state. Disabling the ME with the HAP
|
||||
bit keeps the CPU in the C8 state. This nearly triples the power usage in S0ix
|
||||
suspend, from around 1 watt to around 3 watts.
|
||||
coreboot will log some IME data to cbmem during startup. This can be used to
|
||||
check if it is in the correct state.
|
||||
|
||||
```
|
||||
make -C coreboot/util/cbmem
|
||||
sudo ./coreboot/util/cbmem/cbmem -c
|
||||
```
|
||||
|
||||
When disabled it will report:
|
||||
|
||||
```
|
||||
ME: Current Working State : 4
|
||||
ME: Current Operation State : 1
|
||||
ME: Current Operation Mode : 3
|
||||
ME: Error Code : 2
|
||||
```
|
||||
|
||||
When enabled it will report:
|
||||
|
||||
```
|
||||
ME: Current Working State : 5
|
||||
ME: Current Operation State : 1
|
||||
ME: Current Operation Mode : 0
|
||||
ME: Error Code : 0
|
||||
```
|
||||
|
||||
## S0ix
|
||||
|
||||
S0ix (Modern Standby, s2idle) requires all CPU, PCH, and PCIe devices to have
|
||||
ACPI defined low power states. The CPU has numerous states for low power, with
|
||||
the lowest being C10. In order to reach this C10 state, the CSME must report
|
||||
that it is in a low power state.
|
||||
|
||||
Disabling the CSME with the HAP bit or HECI command keeps the CPU in the C8
|
||||
state. This nearly triples the power usage in S0ix suspend, from around 1 watt
|
||||
to around 3 watts.
|
||||
|
||||
TGL-U removed support for S3 and requires S0ix.
|
||||
|
||||
|
||||
[wiki]: https://en.wikipedia.org/wiki/Intel_Management_Engine
|
||||
|
18
docs/schematics.md
Normal file
18
docs/schematics.md
Normal file
@@ -0,0 +1,18 @@
|
||||
# Schematics
|
||||
|
||||
## Systems using System76 Open Firmware
|
||||
|
||||
System76 customers may request board schematics for their system by sending an
|
||||
email to `firmware@system76.com` with the subject line:
|
||||
|
||||
> Schematics for <model>
|
||||
|
||||
where `<model>` is a model that uses firmware-open. Include the serial number
|
||||
of your system for verification.
|
||||
|
||||
You may not share these without explicit permission from System76.
|
||||
|
||||
## Other models and components
|
||||
|
||||
System76 cannot provide schematics for models not using firmware-open, nor
|
||||
datasheets for any components that are not already publicly available.
|
11
docs/uefi.md
11
docs/uefi.md
@@ -14,12 +14,15 @@ Network functionality is disabled. Native PXE booting is not supported.
|
||||
|
||||
### Secure Boot
|
||||
|
||||
Secure Boot support is currently disabled.
|
||||
Secure Boot support is enabled since system76/firmware-open@105e74b14613
|
||||
(2023-04-03).
|
||||
|
||||
The implementation from 9elements is in development. If building a custom
|
||||
image, the edk2 config `SECURE_BOOT_ENABLE` can be set to enable support.
|
||||
A minimal firmware UI is available to delete all keys and enroll the default
|
||||
keys. It is intended that most management is done from the OS.
|
||||
|
||||
There is currently no firmware UI to view or configure Secure Boot.
|
||||
Note that the Secure Boot support present is only intended for allowing
|
||||
Microsoft Windows installation checks to pass. It should not be relied on for
|
||||
system security due to limitations of the implementation.
|
||||
|
||||
## Shell
|
||||
|
||||
|
2
ec
2
ec
Submodule ec updated: 2a8befc195...fc3bad29a2
2
edk2
2
edk2
Submodule edk2 updated: 943773983d...88f5720e16
Submodule edk2-non-osi deleted from 88ec4bf04c
Submodule edk2-platforms deleted from 3176197844
@@ -1,9 +0,0 @@
|
||||
# Libraries
|
||||
|
||||
## Contents
|
||||
|
||||
- [coreboot-fs](https://gitlab.redox-os.org/redox-os/coreboot-fs.git) - coreboot-fs
|
||||
- [coreboot-table](https://gitlab.redox-os.org/redox-os/coreboot-table.git) - coreboot-table
|
||||
- [intelflash](https://gitlab.redox-os.org/redox-os/intelflash.git) - intelflash
|
||||
- [intel-spi](https://github.com/system76/intel-spi.git) - intel-spi
|
||||
- [uefi](https://gitlab.redox-os.org/redox-os/uefi.git) - Redox UEFI
|
@@ -1 +0,0 @@
|
||||
# Libraries
|
Submodule libs/coreboot-fs deleted from 514f88c960
Submodule libs/coreboot-table deleted from 4b5543dc86
Submodule libs/intel-spi deleted from 9519851e48
Submodule libs/intelflash deleted from 443adc01d3
Submodule libs/uefi deleted from fcdb04f90d
@@ -4,11 +4,17 @@
|
||||
|
||||
- [addw1](./addw1) - System76 Adder Workstation (addw1)
|
||||
- [addw2](./addw2) - System76 Adder WS (addw2)
|
||||
- [addw3](./addw3) - System76 Adder WS (addw3)
|
||||
- [addw4](./addw4) - System76 Adder WS (addw4)
|
||||
- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
|
||||
- [bonw15](./bonw15) - System76 Bonobo WS (bonw15)
|
||||
- [darp10](./darp10) - System76 Darter Pro (darp10)
|
||||
- [darp10-b](./darp10-b) - System76 Darter Pro (darp10-b)
|
||||
- [darp5](./darp5) - System76 Darter Pro (darp5)
|
||||
- [darp6](./darp6) - System76 Darter Pro (darp6)
|
||||
- [darp7](./darp7) - System76 Darter Pro (darp7)
|
||||
- [darp8](./darp8) - System76 Darter Pro (darp8)
|
||||
- [darp9](./darp9) - System76 Darter Pro (darp9)
|
||||
- [galp2](./galp2) - System76 Galago Pro (galp2)
|
||||
- [galp3](./galp3) - System76 Galago Pro (galp3)
|
||||
- [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
|
||||
@@ -16,6 +22,7 @@
|
||||
- [galp4](./galp4) - System76 Galago Pro (galp4)
|
||||
- [galp5](./galp5) - System76 Galago Pro (galp5)
|
||||
- [galp6](./galp6) - System76 Galago Pro (galp6)
|
||||
- [galp7](./galp7) - System76 Galago Pro (galp7)
|
||||
- [gaze14_1650](./gaze14_1650) - System76 Gazelle (gaze14)
|
||||
- [gaze14_1660ti](./gaze14_1660ti) - System76 Gazelle (gaze14)
|
||||
- [gaze15](./gaze15) - System76 Gazelle (gaze15)
|
||||
@@ -24,13 +31,19 @@
|
||||
- [gaze16-3060-b](./gaze16-3060-b) - System76 Gazelle (gaze16)
|
||||
- [gaze17-3050](./gaze17-3050) - System76 Gazelle (gaze17)
|
||||
- [gaze17-3060-b](./gaze17-3060-b) - System76 Gazelle (gaze17-3060-b)
|
||||
- [gaze18](./gaze18) - System76 Gazelle (gaze18)
|
||||
- [lemp10](./lemp10) - System76 Lemur Pro (lemp10)
|
||||
- [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
|
||||
- [lemp12](./lemp12) - System76 Lemur Pro (lemp12)
|
||||
- [lemp13](./lemp13) - System76 Lemur Pro (lemp13)
|
||||
- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
|
||||
- [oryp10](./oryp10) - System76 Oryx Pro (oryp10)
|
||||
- [oryp11](./oryp11) - System76 Oryx Pro (oryp11)
|
||||
- [oryp12](./oryp12) - System76 Oryx Pro (oryp12)
|
||||
- [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
|
||||
- [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
|
||||
- [oryp7](./oryp7) - System76 Oryx Pro (oryp7)
|
||||
- [oryp8](./oryp8) - System76 Oryx Pro (oryp8)
|
||||
- [oryp9](./oryp9) - System76 Oryx Pro (oryp9)
|
||||
- [qemu](./qemu) - QEMU (Virtualization)
|
||||
- [serw13](./serw13) - System76 Serval WS (serw13)
|
||||
|
@@ -12,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
#SECURE_BOOT_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
|
@@ -1,245 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
|
||||
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x0000),
|
||||
PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_A0, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A16, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A20, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B3, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B9, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x0000),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_C2, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C15, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D16, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_E6, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F3, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F4, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H6, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H7, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H16, 0x44000101, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_H18, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H19, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H23, 0x82880100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_I5, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I12, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I14, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_J10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K5, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K8, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K12, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K15, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K17, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K19, 0x42800101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K22, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K23, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
@@ -1,43 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <device/azalia_device.h>
|
||||
|
||||
const u32 cim_verb_data[] = {
|
||||
/* Realtek, ALC1220 */
|
||||
0x10ec1220, /* Vendor ID */
|
||||
0x155865d1, /* Subsystem ID */
|
||||
12, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x155865d1),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
|
||||
/* Intel, KabylakeHDMI */
|
||||
0x8086280b, /* Vendor ID */
|
||||
0x80860101, /* Subsystem ID */
|
||||
4, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
||||
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x07, 0x18560010),
|
||||
/* Nvidia, GPU93HDMI/DP */
|
||||
0x10de0093, /* Vendor ID */
|
||||
0x155865d1, /* Subsystem ID */
|
||||
5, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x155865d1),
|
||||
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
||||
AZALIA_ARRAY_SIZES;
|
@@ -12,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
|
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
#SECURE_BOOT_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
|
@@ -1,258 +0,0 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
|
||||
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x0000),
|
||||
PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A14, 0x80800100, 0x0000),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A16, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_A21, 0x46080100, 0x0000),
|
||||
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B0, 0x42080100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B3, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_B7, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B9, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x0000),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B20, 0x42840101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C13, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C15, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
|
||||
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D16, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_E6, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F3, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H6, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H7, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H9, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H16, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_H18, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H19, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_H20, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H23, 0x82880100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_I5, 0, UP_20K, PLTRST),
|
||||
PAD_CFG_GPI(GPP_I6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I8, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I12, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I14, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_J10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_K4, 0x44000101, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K5, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K8, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K12, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K13, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K15, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K17, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K22, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K23, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
@@ -1,43 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <device/azalia_device.h>
|
||||
|
||||
const u32 cim_verb_data[] = {
|
||||
/* Realtek, ALC1220 */
|
||||
0x10ec1220, /* Vendor ID */
|
||||
0x155865e1, /* Subsystem ID */
|
||||
12, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x155865e1),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
|
||||
/* Intel, KabylakeHDMI */
|
||||
0x8086280b, /* Vendor ID */
|
||||
0x80860101, /* Subsystem ID */
|
||||
4, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
||||
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x07, 0x18560010),
|
||||
/* Nvidia, GPU92HDMI/DP */
|
||||
0x10de0092, /* Vendor ID */
|
||||
0x155865e1, /* Subsystem ID */
|
||||
5, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x155865e1),
|
||||
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
||||
AZALIA_ARRAY_SIZES;
|
BIN
models/addw3/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/addw3/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/addw3/IntelGopDriver.inf
Normal file
9
models/addw3/IntelGopDriver.inf
Normal file
@@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
12
models/addw3/README.md
Normal file
12
models/addw3/README.md
Normal file
@@ -0,0 +1,12 @@
|
||||
# System76 Adder WS (addw3)
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- Size: 4 KB
|
||||
- HAP: false
|
||||
- [ME](./me.rom)
|
||||
- Size: 3944 KB
|
||||
- Version: 16.1.25.2091
|
1
models/addw3/README.md.in
Normal file
1
models/addw3/README.md.in
Normal file
@@ -0,0 +1 @@
|
||||
# System76 Adder WS (addw3)
|
1
models/addw3/chip.txt
Normal file
1
models/addw3/chip.txt
Normal file
@@ -0,0 +1 @@
|
||||
GD25Q256D
|
333
models/addw3/coreboot-collector.txt
Normal file
333
models/addw3/coreboot-collector.txt
Normal file
@@ -0,0 +1,333 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
|
||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
|
||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
|
||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
|
||||
PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3C, Revision 0x11
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040100, Vendor 0x8086, Device 0x7A50, Revision 0x11
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
|
||||
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x0DC8, Revision 0x11
|
||||
PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x2820, Revision 0xA1
|
||||
PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BD, Revision 0xA1
|
||||
PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
||||
PCI Device: 0000:03:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
||||
PCI Device: 0000:03:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
||||
PCI Device: 0000:03:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
||||
PCI Device: 0000:03:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
|
||||
PCI Device: 0000:04:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1134, Revision 0x00
|
||||
PCI Device: 0000:39:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1135, Revision 0x00
|
||||
PCI Device: 0000:6c:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
||||
PCI Device: 10000:e0:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||
PCI Device: 10000:e0:1d.4: Class 0x00060400, Vendor 0x8086, Device 0x7A34, Revision 0x11
|
||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
## GPIO ##
|
||||
600 Series PCH
|
||||
GPP_I0 (0x6E,0x00) 0x44000100 0x00000018 0x00000000 0x00000000
|
||||
GPP_I1 (0x6E,0x02) 0x44000500 0x00000019 0x00000000 0x00000000
|
||||
GPP_I2 (0x6E,0x04) 0x86800100 0x0000001a 0x00000000 0x00000000
|
||||
GPP_I3 (0x6E,0x06) 0x44000500 0x0000001b 0x00000000 0x00000000
|
||||
GPP_I4 (0x6E,0x08) 0x86800100 0x0000001c 0x00000000 0x00000000
|
||||
GPP_I5 (0x6E,0x0A) 0x84000201 0x0000001d 0x00000000 0x00000000
|
||||
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_I7 (0x6E,0x0E) 0x44000300 0x00000020 0x00000000 0x00000000
|
||||
GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
|
||||
GPP_I9 (0x6E,0x12) 0x44000300 0x00000022 0x00000000 0x00000000
|
||||
GPP_I10 (0x6E,0x14) 0x44000300 0x00000023 0x00000000 0x00000000
|
||||
GPP_I11 (0x6E,0x16) 0x84000402 0x00000024 0x00000000 0x00000000
|
||||
GPP_I12 (0x6E,0x18) 0x84000402 0x00000025 0x00000000 0x00000000
|
||||
GPP_I13 (0x6E,0x1A) 0x84000402 0x00000026 0x00000000 0x00000000
|
||||
GPP_I14 (0x6E,0x1C) 0x84000402 0x00000027 0x00000000 0x00000000
|
||||
GPP_I15 (0x6E,0x1E) 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_I16 (0x6E,0x20) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_I17 (0x6E,0x22) 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||
GPP_I18 (0x6E,0x24) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_I19 (0x6E,0x26) 0x44000300 0x0000002c 0x00000000 0x00000000
|
||||
GPP_I20 (0x6E,0x28) 0x44000300 0x0000002d 0x00000000 0x00000000
|
||||
GPP_I21 (0x6E,0x2A) 0x44000300 0x0000002e 0x00000000 0x00000000
|
||||
GPP_I22 (0x6E,0x2C) 0x44000200 0x00000030 0x00000000 0x00000000
|
||||
GPP_R0 (0x6E,0x32) 0x44000600 0x00000031 0x00000000 0x00000000
|
||||
GPP_R1 (0x6E,0x34) 0x44000600 0x00003c32 0x00000000 0x00000000
|
||||
GPP_R2 (0x6E,0x36) 0x44000600 0x00003c33 0x00000000 0x00000000
|
||||
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
|
||||
GPP_R4 (0x6E,0x3A) 0x44000600 0x00000035 0x00000000 0x00000000
|
||||
GPP_R5 (0x6E,0x3C) 0x44000300 0x00000036 0x00000000 0x00000000
|
||||
GPP_R6 (0x6E,0x3E) 0x44000300 0x00000037 0x00000000 0x00000000
|
||||
GPP_R7 (0x6E,0x40) 0x44000300 0x00000038 0x00000000 0x00000000
|
||||
GPP_R8 (0x6E,0x42) 0x84000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_R9 (0x6E,0x44) 0x44000502 0x0000003a 0x00000000 0x00000000
|
||||
GPP_R10 (0x6E,0x46) 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||
GPP_R11 (0x6E,0x48) 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||
GPP_R12 (0x6E,0x4A) 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||
GPP_R13 (0x6E,0x4C) 0x44000300 0x0000003e 0x00000000 0x00000000
|
||||
GPP_R14 (0x6E,0x4E) 0x44000300 0x0000003f 0x00000000 0x00000000
|
||||
GPP_R15 (0x6E,0x50) 0x44000300 0x00000040 0x00000000 0x00000000
|
||||
GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
|
||||
GPP_R17 (0x6E,0x54) 0x44000300 0x00000042 0x00000000 0x00000000
|
||||
GPP_R18 (0x6E,0x56) 0x44000300 0x00000043 0x00000000 0x00000000
|
||||
GPP_R19 (0x6E,0x58) 0x44000300 0x00000044 0x00000000 0x00000000
|
||||
GPP_R20 (0x6E,0x5A) 0x44000300 0x00000045 0x00000000 0x00000000
|
||||
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_J0 (0x6E,0x60) 0x44000502 0x00000047 0x00000000 0x00000000
|
||||
GPP_J1 (0x6E,0x62) 0x84000600 0x00000048 0x00000000 0x00000000
|
||||
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
|
||||
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
|
||||
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
|
||||
GPP_J5 (0x6E,0x6A) 0x44000502 0x0000304c 0x00000000 0x00000000
|
||||
GPP_J6 (0x6E,0x6C) 0x44000502 0x0000004d 0x00000000 0x00000000
|
||||
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
|
||||
GPP_J8 (0x6E,0x70) 0x44000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_J9 (0x6E,0x72) 0x44000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_J10 (0x6E,0x74) 0x44000700 0x00001052 0x00000000 0x00000000
|
||||
GPP_J11 (0x6E,0x76) 0x44000700 0x00001053 0x00000000 0x00000000
|
||||
GPP_B0 (0x6D,0x00) 0x40100102 0x00000050 0x00000000 0x00000000
|
||||
GPP_B1 (0x6D,0x02) 0x44000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
|
||||
GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
|
||||
GPP_B4 (0x6D,0x08) 0x44000300 0x00000054 0x00000000 0x00000000
|
||||
GPP_B5 (0x6D,0x0A) 0x44000300 0x00000055 0x00000000 0x00000000
|
||||
GPP_B6 (0x6D,0x0C) 0x44000300 0x00000056 0x00000000 0x00000000
|
||||
GPP_B7 (0x6D,0x0E) 0x44000300 0x00000057 0x00000000 0x00000000
|
||||
GPP_B8 (0x6D,0x10) 0x44000300 0x00000058 0x00000000 0x00000000
|
||||
GPP_B9 (0x6D,0x12) 0x44000300 0x00000059 0x00000000 0x00000000
|
||||
GPP_B10 (0x6D,0x14) 0x44000300 0x0000005a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6D,0x16) 0x44000300 0x0000005b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6D,0x18) 0x44000600 0x0000005c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6D,0x1A) 0x44000600 0x0000005d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6D,0x1C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6D,0x1E) 0x44000102 0x0000005f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6D,0x20) 0x44000300 0x00000060 0x00000000 0x00000000
|
||||
GPP_B17 (0x6D,0x22) 0x44000300 0x00000061 0x00000000 0x00000000
|
||||
GPP_B18 (0x6D,0x24) 0x04000602 0x00000062 0x00000000 0x00000000
|
||||
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
|
||||
GPP_B20 (0x6D,0x28) 0x44000700 0x00001064 0x00000000 0x00000000
|
||||
GPP_B21 (0x6D,0x2A) 0x42880102 0x00000065 0x00000000 0x00000000
|
||||
GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
|
||||
GPP_B23 (0x6D,0x2E) 0x44000200 0x00000067 0x00000800 0x00000000
|
||||
GPP_G0 (0x6D,0x30) 0x44000100 0x00000068 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x32) 0x44000102 0x00000069 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x34) 0x44000700 0x0000106a 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x36) 0x44000100 0x0000006b 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x38) 0x44000102 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x3A) 0x44000600 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x3E) 0x44000100 0x0000006f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6D,0x40) 0x44000300 0x00000070 0x00000000 0x00000000
|
||||
GPP_H1 (0x6D,0x42) 0x44000102 0x00000071 0x00000000 0x00000000
|
||||
GPP_H2 (0x6D,0x44) 0x44000702 0x00000072 0x00000000 0x00000000
|
||||
GPP_H3 (0x6D,0x46) 0x44000300 0x00000073 0x00000000 0x00000000
|
||||
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
|
||||
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
|
||||
GPP_H6 (0x6D,0x4C) 0x44000702 0x00000076 0x00000000 0x00000000
|
||||
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
|
||||
GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
|
||||
GPP_H9 (0x6D,0x52) 0x44000700 0x00000019 0x00000000 0x00000000
|
||||
GPP_H10 (0x6D,0x54) 0x84000402 0x00000020 0x00000000 0x00000000
|
||||
GPP_H11 (0x6D,0x56) 0x84000402 0x00000021 0x00000000 0x00000000
|
||||
GPP_H12 (0x6D,0x58) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_H13 (0x6D,0x5A) 0x84000402 0x00000023 0x00000000 0x00000000
|
||||
GPP_H14 (0x6D,0x5C) 0x84000402 0x00000024 0x00000000 0x00000000
|
||||
GPP_H15 (0x6D,0x5E) 0x84000402 0x00000025 0x00000800 0x00000000
|
||||
GPP_H16 (0x6D,0x60) 0x84000402 0x00000026 0x00000000 0x00000000
|
||||
GPP_H17 (0x6D,0x62) 0x84000201 0x00000027 0x00000000 0x00000000
|
||||
GPP_H18 (0x6D,0x64) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_H19 (0x6D,0x66) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_H20 (0x6D,0x68) 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||
GPP_H21 (0x6D,0x6A) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_H23 (0x6D,0x6E) 0x44000300 0x0000002d 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x04000502 0x00003060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x04000502 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000702 0x00000062 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x04000502 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000200 0x00000067 0x00000000 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x04000600 0x00000068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000600 0x00000069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
|
||||
GPD12 (0x6C,0x18) 0x04000300 0x0000006c 0x00000000 0x00000000
|
||||
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
|
||||
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
|
||||
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
|
||||
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
|
||||
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
|
||||
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
|
||||
GPP_A7 (0x6B,0x20) 0x44000700 0x00003025 0x00000000 0x00000000
|
||||
GPP_A8 (0x6B,0x22) 0x44000700 0x00003026 0x00000000 0x00000000
|
||||
GPP_A9 (0x6B,0x24) 0x44000700 0x00003027 0x00000000 0x00000000
|
||||
GPP_A10 (0x6B,0x26) 0x44000702 0x00003028 0x00000000 0x00000000
|
||||
GPP_A11 (0x6B,0x28) 0x44000702 0x00003029 0x00000000 0x00000000
|
||||
GPP_A12 (0x6B,0x2A) 0x44000702 0x0000302a 0x00000000 0x00000000
|
||||
GPP_A13 (0x6B,0x2C) 0x44000702 0x0000302b 0x00000000 0x00000000
|
||||
GPP_A14 (0x6B,0x2E) 0x44000300 0x0000002c 0x00000000 0x00000000
|
||||
GPP_C0 (0x6B,0x32) 0x44000402 0x0000002d 0x00000000 0x00000000
|
||||
GPP_C1 (0x6B,0x34) 0x44000402 0x0000002e 0x00000000 0x00000000
|
||||
GPP_C2 (0x6B,0x36) 0x44000200 0x0000002f 0x00000800 0x00000000
|
||||
GPP_C3 (0x6B,0x38) 0x44000c02 0x00000030 0x00000000 0x00000000
|
||||
GPP_C4 (0x6B,0x3A) 0x44000c02 0x00000031 0x00000000 0x00000000
|
||||
GPP_C5 (0x6B,0x3C) 0x44000200 0x00000032 0x00000000 0x00000000
|
||||
GPP_C6 (0x6B,0x3E) 0x44000802 0x00000033 0x00000000 0x00000000
|
||||
GPP_C7 (0x6B,0x40) 0x44000802 0x00000034 0x00000000 0x00000000
|
||||
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_C9 (0x6B,0x44) 0x44000300 0x00000036 0x00000000 0x00000000
|
||||
GPP_C10 (0x6B,0x46) 0x44000201 0x00000037 0x00000000 0x00000000
|
||||
GPP_C11 (0x6B,0x48) 0x44000201 0x00000038 0x00000000 0x00000000
|
||||
GPP_C12 (0x6B,0x4A) 0x44000300 0x00000039 0x00000000 0x00000000
|
||||
GPP_C13 (0x6B,0x4C) 0x44000300 0x0000003a 0x00000000 0x00000000
|
||||
GPP_C14 (0x6B,0x4E) 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||
GPP_C15 (0x6B,0x50) 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||
GPP_C16 (0x6B,0x52) 0x44000402 0x0000003d 0x00000000 0x00000000
|
||||
GPP_C17 (0x6B,0x54) 0x44000402 0x0000003e 0x00000000 0x00000000
|
||||
GPP_C18 (0x6B,0x56) 0x44000402 0x0000003f 0x00000000 0x00000000
|
||||
GPP_C19 (0x6B,0x58) 0x44000402 0x00000040 0x00000000 0x00000000
|
||||
GPP_C20 (0x6B,0x5A) 0x44000300 0x00000041 0x00000000 0x00000000
|
||||
GPP_C21 (0x6B,0x5C) 0x44000300 0x00000042 0x00000000 0x00000000
|
||||
GPP_C22 (0x6B,0x5E) 0x44000300 0x00000043 0x00000000 0x00000000
|
||||
GPP_C23 (0x6B,0x60) 0x44000300 0x00000044 0x00000000 0x00000000
|
||||
GPP_S0 (0x6A,0x00) 0x44000300 0x01800030 0x00000000 0x00000000
|
||||
GPP_S1 (0x6A,0x02) 0x44000300 0x01800031 0x00000000 0x00000000
|
||||
GPP_S2 (0x6A,0x04) 0x44000300 0x01800032 0x00000000 0x00000000
|
||||
GPP_S3 (0x6A,0x06) 0x44000300 0x01800033 0x00000000 0x00000000
|
||||
GPP_S4 (0x6A,0x08) 0x44000300 0x01800034 0x00000000 0x00000000
|
||||
GPP_S5 (0x6A,0x0A) 0x44000300 0x01800035 0x00000000 0x00000000
|
||||
GPP_S6 (0x6A,0x0C) 0x44000a00 0x01800036 0x00000000 0x00000000
|
||||
GPP_S7 (0x6A,0x0E) 0x44000900 0x01800037 0x00000000 0x00000000
|
||||
GPP_E0 (0x6A,0x10) 0x44000300 0x00000038 0x00000000 0x00000000
|
||||
GPP_E1 (0x6A,0x12) 0x44000300 0x00000039 0x00000000 0x00000000
|
||||
GPP_E2 (0x6A,0x14) 0x44000300 0x0000003a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6A,0x16) 0x42840103 0x0000003b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6A,0x18) 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6A,0x1A) 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6A,0x1C) 0x44000300 0x0000003e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6A,0x20) 0x44000600 0x00000040 0x00000000 0x00000000
|
||||
GPP_E9 (0x6A,0x22) 0x44000602 0x00000041 0x00000800 0x00000000
|
||||
GPP_E10 (0x6A,0x24) 0x44000602 0x00000042 0x00000800 0x00000000
|
||||
GPP_E11 (0x6A,0x26) 0x44000602 0x00000043 0x00000800 0x00000000
|
||||
GPP_E12 (0x6A,0x28) 0x44000602 0x00000044 0x00000000 0x00000000
|
||||
GPP_E13 (0x6A,0x2A) 0x44000300 0x00000045 0x00000000 0x00000000
|
||||
GPP_E14 (0x6A,0x2C) 0x44000300 0x00000046 0x00000000 0x00000000
|
||||
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_E16 (0x6A,0x30) 0x44000300 0x00000048 0x00000000 0x00000000
|
||||
GPP_E17 (0x6A,0x32) 0x44000102 0x00001049 0x00000000 0x00000000
|
||||
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
|
||||
GPP_E19 (0x6A,0x36) 0x44000300 0x0000004b 0x00000000 0x00000000
|
||||
GPP_E20 (0x6A,0x38) 0x44000300 0x0000004c 0x00000000 0x00000000
|
||||
GPP_E21 (0x6A,0x3A) 0x44000300 0x0000004d 0x00000000 0x00000000
|
||||
GPP_K0 (0x6A,0x3E) 0x42800102 0x0000004e 0x00000000 0x00000000
|
||||
GPP_K1 (0x6A,0x40) 0x44000300 0x00000050 0x00000000 0x00000000
|
||||
GPP_K2 (0x6A,0x42) 0x44000300 0x00000051 0x00000000 0x00000000
|
||||
GPP_K3 (0x6A,0x44) 0x84000201 0x00000052 0x00000000 0x00000000
|
||||
GPP_K4 (0x6A,0x46) 0x04000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_K5 (0x6A,0x48) 0x44000300 0x00000054 0x00000000 0x00000000
|
||||
GPP_K6 (0x6A,0x4A) 0x44000b02 0x00003055 0x00000000 0x00000000
|
||||
GPP_K7 (0x6A,0x4C) 0x44000b00 0x00001056 0x00000000 0x00000000
|
||||
GPP_K8 (0x6A,0x4E) 0x44000600 0x00000057 0x00000000 0x00000000
|
||||
GPP_K9 (0x6A,0x50) 0x44000600 0x00000058 0x00000000 0x00000000
|
||||
GPP_K10 (0x6A,0x52) 0x44000b02 0x00003059 0x00000000 0x00000000
|
||||
GPP_K11 (0x6A,0x54) 0x44000300 0x0000005a 0x00000000 0x00000000
|
||||
GPP_F0 (0x6A,0x5C) 0x44000a02 0x0000005b 0x00000000 0x00000000
|
||||
GPP_F1 (0x6A,0x5E) 0x44000300 0x0000005c 0x00000000 0x00000000
|
||||
GPP_F2 (0x6A,0x60) 0x84000201 0x0000005d 0x00000000 0x00000000
|
||||
GPP_F3 (0x6A,0x62) 0x84000201 0x0000005e 0x00000000 0x00000000
|
||||
GPP_F4 (0x6A,0x64) 0x84000201 0x00000060 0x00000000 0x00000000
|
||||
GPP_F5 (0x6A,0x66) 0x44000600 0x00000061 0x00000000 0x00000000
|
||||
GPP_F6 (0x6A,0x68) 0x44000300 0x00000062 0x00000000 0x00000000
|
||||
GPP_F7 (0x6A,0x6A) 0x84000102 0x00000063 0x00000000 0x00000000
|
||||
GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
|
||||
GPP_F9 (0x6A,0x6E) 0x44000201 0x00000065 0x00000000 0x00000000
|
||||
GPP_F10 (0x6A,0x70) 0x44000300 0x00000066 0x00000000 0x00000000
|
||||
GPP_F11 (0x6A,0x72) 0x44000300 0x00000067 0x00000000 0x00000000
|
||||
GPP_F12 (0x6A,0x74) 0x44000300 0x00000068 0x00000000 0x00000000
|
||||
GPP_F13 (0x6A,0x76) 0x44000300 0x00000069 0x00000000 0x00000000
|
||||
GPP_F14 (0x6A,0x78) 0x44000700 0x0000006a 0x00000000 0x00000000
|
||||
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
|
||||
GPP_F16 (0x6A,0x7C) 0x44000300 0x0000006c 0x00000000 0x00000000
|
||||
GPP_F17 (0x6A,0x7E) 0x44000102 0x0000006d 0x00000000 0x00000000
|
||||
GPP_F18 (0x6A,0x80) 0x84000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_F19 (0x6A,0x82) 0x44000600 0x0000006f 0x00000000 0x00000000
|
||||
GPP_F20 (0x6A,0x84) 0x44000600 0x00000070 0x00000000 0x00000000
|
||||
GPP_F21 (0x6A,0x86) 0x44000600 0x00000071 0x00000000 0x00000000
|
||||
GPP_F22 (0x6A,0x88) 0x44000300 0x00000072 0x00000000 0x00000000
|
||||
GPP_F23 (0x6A,0x8A) 0x44000300 0x00000073 0x00000000 0x00000000
|
||||
GPP_D0 (0x69,0x20) 0x44000300 0x00000026 0x00000000 0x00000000
|
||||
GPP_D1 (0x69,0x22) 0x44000300 0x00000027 0x00000000 0x00000000
|
||||
GPP_D2 (0x69,0x24) 0x44000300 0x00000028 0x00000000 0x00000000
|
||||
GPP_D3 (0x69,0x26) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||
GPP_D4 (0x69,0x28) 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||
GPP_D5 (0x69,0x2A) 0x44000300 0x0000002b 0x00000000 0x00000000
|
||||
GPP_D6 (0x69,0x2C) 0x44000300 0x0000002c 0x00000000 0x00000000
|
||||
GPP_D7 (0x69,0x2E) 0x44000300 0x0000002d 0x00000000 0x00000000
|
||||
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
|
||||
GPP_D9 (0x69,0x32) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D10 (0x69,0x34) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D13 (0x69,0x3A) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D14 (0x69,0x3C) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
|
||||
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D22 (0x69,0x4C) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC256
|
||||
vendor_id: 0x10ec0256
|
||||
subsystem_id: 0x1558a671
|
||||
revision_id: 0x100002
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x18: 0x411111f0
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x02a11040
|
||||
0x1d: 0x41700001
|
||||
0x1e: 0x411111f0
|
||||
0x21: 0x02211020
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Raptorlake HDMI
|
||||
vendor_id: 0x80862818
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x04: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x08: 0x18560010
|
||||
0x0a: 0x18560010
|
||||
0x0b: 0x18560010
|
||||
0x0c: 0x18560010
|
||||
0x0d: 0x18560010
|
||||
0x0e: 0x18560010
|
||||
0x0f: 0x18560010
|
||||
hdaudioC1D0
|
||||
vendor_name: Nvidia
|
||||
chip_name: Generic HDMI
|
||||
vendor_id: 0x10de00a6
|
||||
subsystem_id: 0x10de0000
|
||||
revision_id: 0x100100
|
||||
0x04: 0x185600f0
|
||||
0x05: 0x585600f0
|
||||
0x06: 0x185600f0
|
||||
0x07: 0x585600f0
|
21
models/addw3/coreboot.config
Normal file
21
models/addw3/coreboot.config
Normal file
@@ -0,0 +1,21 @@
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
CONFIG_BOARD_SYSTEM76_ADDW3=y
|
||||
CONFIG_CCACHE=y
|
||||
CONFIG_CONSOLE_SERIAL=n
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
1
models/addw3/ec.config
Normal file
1
models/addw3/ec.config
Normal file
@@ -0,0 +1 @@
|
||||
BOARD=system76/addw3
|
89
models/addw3/ecspy.txt
Normal file
89
models/addw3/ecspy.txt
Normal file
@@ -0,0 +1,89 @@
|
||||
id 5570 rev 6
|
||||
A0: data 1 mirror 1 pot 0 control 00
|
||||
A1: data 0 mirror 0 pot 0 control 00
|
||||
A2: data 0 mirror 1 pot 0 control 00
|
||||
A3: data 1 mirror 1 pot 0 control 80
|
||||
A4: data 0 mirror 0 pot 0 control 00
|
||||
A5: data 0 mirror 0 pot 0 control 00
|
||||
A6: data 0 mirror 0 pot 0 control 00
|
||||
A7: data 0 mirror 1 pot 0 control 00
|
||||
B0: data 0 mirror 0 pot 0 control 84
|
||||
B1: data 1 mirror 1 pot 0 control 84
|
||||
B2: data 1 mirror 1 pot 0 control 80
|
||||
B3: data 1 mirror 1 pot 0 control 80
|
||||
B4: data 1 mirror 1 pot 0 control 40
|
||||
B5: data 1 mirror 1 pot 0 control 40
|
||||
B6: data 1 mirror 1 pot 0 control 44
|
||||
B7: data 1 mirror 1 pot 0 control 80
|
||||
C0: data 1 mirror 1 pot 0 control 80
|
||||
C1: data 1 mirror 1 pot 0 control 04
|
||||
C2: data 1 mirror 1 pot 0 control 04
|
||||
C3: data 0 mirror 0 pot 0 control 04
|
||||
C4: data 0 mirror 0 pot 0 control 84
|
||||
C5: data 0 mirror 0 pot 0 control 04
|
||||
C6: data 1 mirror 1 pot 0 control 40
|
||||
C7: data 1 mirror 1 pot 0 control 44
|
||||
D0: data 1 mirror 1 pot 0 control 44
|
||||
D1: data 1 mirror 1 pot 0 control 44
|
||||
D2: data 1 mirror 1 pot 0 control 00
|
||||
D3: data 1 mirror 1 pot 0 control 44
|
||||
D4: data 1 mirror 1 pot 0 control 40
|
||||
D5: data 1 mirror 1 pot 0 control 44
|
||||
D6: data 1 mirror 1 pot 0 control 02
|
||||
D7: data 0 mirror 0 pot 0 control 02
|
||||
E0: data 1 mirror 1 pot 0 control 04
|
||||
E1: data 1 mirror 1 pot 0 control 44
|
||||
E2: data 0 mirror 0 pot 0 control 84
|
||||
E3: data 1 mirror 1 pot 0 control 40
|
||||
E4: data 1 mirror 1 pot 0 control 42
|
||||
E5: data 1 mirror 1 pot 0 control 40
|
||||
E6: data 1 mirror 1 pot 0 control 80
|
||||
E7: data 1 mirror 1 pot 0 control 04
|
||||
F0: data 0 mirror 0 pot 0 control 44
|
||||
F1: data 1 mirror 1 pot 0 control 44
|
||||
F2: data 1 mirror 1 pot 0 control 44
|
||||
F3: data 1 mirror 1 pot 0 control 40
|
||||
F4: data 1 mirror 1 pot 0 control 04
|
||||
F5: data 1 mirror 1 pot 0 control 04
|
||||
F6: data 0 mirror 0 pot 0 control 00
|
||||
F7: data 0 mirror 0 pot 0 control 80
|
||||
G0: data 0 mirror 0 pot 0 control 80
|
||||
G1: data 1 mirror 1 pot 0 control 80
|
||||
G2: data 1 mirror 1 pot 0 control 80
|
||||
G3: data 0 mirror 0 pot 0 control 00
|
||||
G4: data 0 mirror 0 pot 0 control 00
|
||||
G5: data 0 mirror 0 pot 0 control 00
|
||||
G6: data 0 mirror 0 pot 0 control 44
|
||||
G7: data 0 mirror 0 pot 0 control 00
|
||||
H0: data 0 mirror 0 pot 0 control 80
|
||||
H1: data 1 mirror 1 pot 0 control 80
|
||||
H2: data 0 mirror 0 pot 0 control 44
|
||||
H3: data 0 mirror 0 pot 0 control 40
|
||||
H4: data 1 mirror 1 pot 0 control 80
|
||||
H5: data 0 mirror 0 pot 0 control 44
|
||||
H6: data 1 mirror 1 pot 0 control 80
|
||||
H7: data 1 mirror 1 pot 0 control 80
|
||||
I0: data 0 mirror 0 pot 0 control 00
|
||||
I1: data 0 mirror 0 pot 0 control 00
|
||||
I2: data 0 mirror 0 pot 0 control 00
|
||||
I3: data 0 mirror 0 pot 0 control 00
|
||||
I4: data 0 mirror 0 pot 0 control 00
|
||||
I5: data 1 mirror 1 pot 0 control 80
|
||||
I6: data 1 mirror 1 pot 0 control 80
|
||||
I7: data 0 mirror 0 pot 0 control 00
|
||||
J0: data 1 mirror 1 pot 0 control 44
|
||||
J1: data 1 mirror 1 pot 0 control 40
|
||||
J2: data 1 mirror 1 pot 0 control 80
|
||||
J3: data 0 mirror 0 pot 0 control 80
|
||||
J4: data 1 mirror 1 pot 0 control 40
|
||||
J5: data 0 mirror 0 pot 0 control 40
|
||||
J6: data 0 mirror 0 pot 0 control 44
|
||||
J7: data 1 mirror 1 pot 0 control 80
|
||||
M0: data 0 mirror 0 control 06
|
||||
M1: data 1 mirror 0 control 06
|
||||
M2: data 1 mirror 1 control 06
|
||||
M3: data 1 mirror 1 control 06
|
||||
M4: data 0 mirror 1 control 06
|
||||
M5: data 0 mirror 0 control 00
|
||||
M6: data 1 mirror 1 control 86
|
||||
M7: data 0 mirror 0 control 00
|
9
models/addw3/edk2.config
Normal file
9
models/addw3/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/addw3/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/addw3/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/addw3/gbe.rom
(Stored with Git LFS)
Normal file
BIN
models/addw3/gbe.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/addw3/me.rom
(Stored with Git LFS)
Normal file
BIN
models/addw3/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/addw3/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/addw3/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/addw4/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/addw4/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/addw4/IntelGopDriver.inf
Normal file
9
models/addw4/IntelGopDriver.inf
Normal file
@@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
12
models/addw4/README.md
Normal file
12
models/addw4/README.md
Normal file
@@ -0,0 +1,12 @@
|
||||
# System76 Adder WS (addw4)
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- Size: 4 KB
|
||||
- HAP: false
|
||||
- [ME](./me.rom)
|
||||
- Size: 3944 KB
|
||||
- Version: 16.1.30.2330
|
1
models/addw4/README.md.in
Normal file
1
models/addw4/README.md.in
Normal file
@@ -0,0 +1 @@
|
||||
# System76 Adder WS (addw4)
|
1
models/addw4/chip.txt
Normal file
1
models/addw4/chip.txt
Normal file
@@ -0,0 +1 @@
|
||||
GD25Q256D
|
326
models/addw4/coreboot-collector.txt
Normal file
326
models/addw4/coreboot-collector.txt
Normal file
@@ -0,0 +1,326 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
|
||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
|
||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
|
||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
|
||||
PCI Device: 0000:00:15.3: Class 0x000C8000, Vendor 0x8086, Device 0x7A4F, Revision 0x11
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3A, Revision 0x11
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x7A50, Revision 0x11
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
|
||||
PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x2820, Revision 0xA1
|
||||
PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BD, Revision 0xA1
|
||||
PCI Device: 0000:02:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
|
||||
PCI Device: 10000:e0:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||
PCI Device: 10000:e0:1d.4: Class 0x00060400, Vendor 0x8086, Device 0x7A34, Revision 0x11
|
||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
## GPIO ##
|
||||
600 Series PCH
|
||||
GPP_I0 (0x6E,0x00) 0x84000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_I1 (0x6E,0x02) 0x82000500 0x00000019 0x00000000 0x00000000
|
||||
GPP_I2 (0x6E,0x04) 0x86880100 0x0000001a 0x00000000 0x00000000
|
||||
GPP_I3 (0x6E,0x06) 0x82000502 0x0000001b 0x00000000 0x00000000
|
||||
GPP_I4 (0x6E,0x08) 0x84000200 0x0000001c 0x00000000 0x00000000
|
||||
GPP_I5 (0x6E,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_I7 (0x6E,0x0E) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_I8 (0x6E,0x10) 0x44000102 0x00000021 0x00000000 0x00000000
|
||||
GPP_I9 (0x6E,0x12) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_I10 (0x6E,0x14) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_I11 (0x6E,0x16) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||
GPP_I12 (0x6E,0x18) 0x44000102 0x00000025 0x00000000 0x00000000
|
||||
GPP_I13 (0x6E,0x1A) 0x44000902 0x00000026 0x00000000 0x00000000
|
||||
GPP_I14 (0x6E,0x1C) 0x44000902 0x00000027 0x00000000 0x00000000
|
||||
GPP_I15 (0x6E,0x1E) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_I16 (0x6E,0x20) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_I17 (0x6E,0x22) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_I18 (0x6E,0x24) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_I19 (0x6E,0x26) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_I20 (0x6E,0x28) 0x44000200 0x0000002d 0x00000000 0x00000000
|
||||
GPP_I21 (0x6E,0x2A) 0x44000200 0x0000002e 0x00000000 0x00000000
|
||||
GPP_I22 (0x6E,0x2C) 0x44000200 0x00000030 0x00000000 0x00000000
|
||||
GPP_R0 (0x6E,0x32) 0x44000600 0x00000031 0x00000000 0x00000000
|
||||
GPP_R1 (0x6E,0x34) 0x44000600 0x00003c32 0x00000000 0x00000000
|
||||
GPP_R2 (0x6E,0x36) 0x44000600 0x00003c33 0x00000000 0x00000000
|
||||
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
|
||||
GPP_R4 (0x6E,0x3A) 0x44000600 0x00000035 0x00000000 0x00000000
|
||||
GPP_R5 (0x6E,0x3C) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_R6 (0x6E,0x3E) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_R7 (0x6E,0x40) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_R8 (0x6E,0x42) 0x44000100 0x00000039 0x00000000 0x00000000
|
||||
GPP_R9 (0x6E,0x44) 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_R10 (0x6E,0x46) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_R11 (0x6E,0x48) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_R12 (0x6E,0x4A) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_R13 (0x6E,0x4C) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_R14 (0x6E,0x4E) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_R15 (0x6E,0x50) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_R16 (0x6E,0x52) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_R17 (0x6E,0x54) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_R18 (0x6E,0x56) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_R19 (0x6E,0x58) 0x44000102 0x00000044 0x00000000 0x00000000
|
||||
GPP_R20 (0x6E,0x5A) 0x44000200 0x00000045 0x00000000 0x00000000
|
||||
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_J0 (0x6E,0x60) 0x44000500 0x00000047 0x00000000 0x00000000
|
||||
GPP_J1 (0x6E,0x62) 0x44000700 0x00000048 0x00000000 0x00000000
|
||||
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
|
||||
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
|
||||
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
|
||||
GPP_J5 (0x6E,0x6A) 0x44000500 0x0000304c 0x00000000 0x00000000
|
||||
GPP_J6 (0x6E,0x6C) 0x44000500 0x0000004d 0x00000000 0x00000000
|
||||
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
|
||||
GPP_J8 (0x6E,0x70) 0x44000102 0x00000050 0x00000000 0x00000000
|
||||
GPP_J9 (0x6E,0x72) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_J10 (0x6E,0x74) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_J11 (0x6E,0x76) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_B0 (0x6D,0x00) 0x40100102 0x00003050 0x00000000 0x00000000
|
||||
GPP_B1 (0x6D,0x02) 0x44000102 0x00000051 0x00000000 0x00000000
|
||||
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
|
||||
GPP_B3 (0x6D,0x06) 0x84000201 0x00000053 0x00000000 0x00000000
|
||||
GPP_B4 (0x6D,0x08) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_B5 (0x6D,0x0A) 0x44000200 0x00000055 0x00000000 0x00000000
|
||||
GPP_B6 (0x6D,0x0C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_B7 (0x6D,0x0E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_B8 (0x6D,0x10) 0x44000200 0x00000058 0x00000000 0x00000000
|
||||
GPP_B9 (0x6D,0x12) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_B10 (0x6D,0x14) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6D,0x16) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6D,0x18) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6D,0x1A) 0x44000700 0x0000005d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6D,0x1C) 0x44000500 0x0000005e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6D,0x1E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6D,0x20) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_B17 (0x6D,0x22) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_B18 (0x6D,0x24) 0x04000702 0x00000062 0x00000000 0x00000000
|
||||
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
|
||||
GPP_B20 (0x6D,0x28) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_B21 (0x6D,0x2A) 0x44000200 0x00000065 0x00000000 0x00000000
|
||||
GPP_B22 (0x6D,0x2C) 0x44000200 0x00000066 0x00000000 0x00000000
|
||||
GPP_B23 (0x6D,0x2E) 0x44000102 0x00000067 0x00000800 0x00000000
|
||||
GPP_G0 (0x6D,0x30) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x32) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x34) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x36) 0x44000102 0x0000006b 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x38) 0x44000102 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x3A) 0x44000600 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x3E) 0x44000100 0x0000006f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6D,0x40) 0x44000102 0x00000070 0x00000000 0x00000000
|
||||
GPP_H1 (0x6D,0x42) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_H2 (0x6D,0x44) 0x44000102 0x00000072 0x00000000 0x00000000
|
||||
GPP_H3 (0x6D,0x46) 0x44000300 0x00000073 0x00000000 0x00000000
|
||||
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
|
||||
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
|
||||
GPP_H6 (0x6D,0x4C) 0x44000702 0x00000076 0x00000000 0x00000000
|
||||
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
|
||||
GPP_H8 (0x6D,0x50) 0x44000702 0x00000018 0x00000000 0x00000000
|
||||
GPP_H9 (0x6D,0x52) 0x44000700 0x00000019 0x00000000 0x00000000
|
||||
GPP_H10 (0x6D,0x54) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_H11 (0x6D,0x56) 0x44000200 0x00000021 0x00000000 0x00000000
|
||||
GPP_H12 (0x6D,0x58) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_H13 (0x6D,0x5A) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_H14 (0x6D,0x5C) 0x44000200 0x00000024 0x00000000 0x00000000
|
||||
GPP_H15 (0x6D,0x5E) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_H16 (0x6D,0x60) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_H17 (0x6D,0x62) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_H18 (0x6D,0x64) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_H19 (0x6D,0x66) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_H20 (0x6D,0x68) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_H21 (0x6D,0x6A) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_H23 (0x6D,0x6E) 0x44000200 0x0000002d 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00000066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x44000200 0x00000067 0x00000800 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x44000600 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x44000200 0x0000006b 0x00000000 0x00000000
|
||||
GPD12 (0x6C,0x18) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
|
||||
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
|
||||
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
|
||||
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
|
||||
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
|
||||
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
|
||||
GPP_A7 (0x6B,0x20) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_A8 (0x6B,0x22) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_A9 (0x6B,0x24) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_A10 (0x6B,0x26) 0x44000702 0x00003028 0x00000000 0x00000000
|
||||
GPP_A11 (0x6B,0x28) 0x44000102 0x00003029 0x00000000 0x00000000
|
||||
GPP_A12 (0x6B,0x2A) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A13 (0x6B,0x2C) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A14 (0x6B,0x2E) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_C0 (0x6B,0x32) 0x44000502 0x0000002d 0x00000000 0x00000000
|
||||
GPP_C1 (0x6B,0x34) 0x44000502 0x0000002e 0x00000000 0x00000000
|
||||
GPP_C2 (0x6B,0x36) 0x44000102 0x0000002f 0x00000800 0x00000000
|
||||
GPP_C3 (0x6B,0x38) 0x44000d02 0x00000030 0x00000000 0x00000000
|
||||
GPP_C4 (0x6B,0x3A) 0x44000d02 0x00000031 0x00000000 0x00000000
|
||||
GPP_C5 (0x6B,0x3C) 0x44000200 0x00000032 0x00000000 0x00000000
|
||||
GPP_C6 (0x6B,0x3E) 0x44000902 0x00000033 0x00000000 0x00000000
|
||||
GPP_C7 (0x6B,0x40) 0x44000902 0x00000034 0x00000000 0x00000000
|
||||
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_C9 (0x6B,0x44) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_C10 (0x6B,0x46) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_C11 (0x6B,0x48) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_C12 (0x6B,0x4A) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_C13 (0x6B,0x4C) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_C14 (0x6B,0x4E) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_C15 (0x6B,0x50) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_C16 (0x6B,0x52) 0x44000502 0x0000003d 0x00000000 0x00000000
|
||||
GPP_C17 (0x6B,0x54) 0x44000502 0x0000003e 0x00000000 0x00000000
|
||||
GPP_C18 (0x6B,0x56) 0x44000502 0x0000003f 0x00000000 0x00000000
|
||||
GPP_C19 (0x6B,0x58) 0x44000502 0x00000040 0x00000000 0x00000000
|
||||
GPP_C20 (0x6B,0x5A) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_C21 (0x6B,0x5C) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_C22 (0x6B,0x5E) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_C23 (0x6B,0x60) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_S0 (0x6A,0x00) 0x44000200 0x01800030 0x00000000 0x00000000
|
||||
GPP_S1 (0x6A,0x02) 0x44000200 0x01800031 0x00000000 0x00000000
|
||||
GPP_S2 (0x6A,0x04) 0x44000200 0x01800032 0x00000000 0x00000000
|
||||
GPP_S3 (0x6A,0x06) 0x44000200 0x01800033 0x00000000 0x00000000
|
||||
GPP_S4 (0x6A,0x08) 0x44000a00 0x01800034 0x00000000 0x00000000
|
||||
GPP_S5 (0x6A,0x0A) 0x44000900 0x01800035 0x00000000 0x00000000
|
||||
GPP_S6 (0x6A,0x0C) 0x44000200 0x01800036 0x00000000 0x00000000
|
||||
GPP_S7 (0x6A,0x0E) 0x44000200 0x01800037 0x00000000 0x00000000
|
||||
GPP_E0 (0x6A,0x10) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_E1 (0x6A,0x12) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_E2 (0x6A,0x14) 0x44000102 0x0000003a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6A,0x16) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6A,0x18) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6A,0x1A) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6A,0x1C) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6A,0x20) 0x44000600 0x00000040 0x00000000 0x00000000
|
||||
GPP_E9 (0x6A,0x22) 0x44000102 0x00000041 0x00000800 0x00000000
|
||||
GPP_E10 (0x6A,0x24) 0x44000102 0x00000042 0x00000800 0x00000000
|
||||
GPP_E11 (0x6A,0x26) 0x44000102 0x00000043 0x00000800 0x00000000
|
||||
GPP_E12 (0x6A,0x28) 0x44000102 0x00000044 0x00000000 0x00000000
|
||||
GPP_E13 (0x6A,0x2A) 0x44000200 0x00000045 0x00000000 0x00000000
|
||||
GPP_E14 (0x6A,0x2C) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_E16 (0x6A,0x30) 0x44000200 0x00000048 0x00000000 0x00000000
|
||||
GPP_E17 (0x6A,0x32) 0x44000102 0x00000049 0x00000000 0x00000000
|
||||
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
|
||||
GPP_E19 (0x6A,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
|
||||
GPP_E20 (0x6A,0x38) 0x44000200 0x0000004c 0x00000000 0x00000000
|
||||
GPP_E21 (0x6A,0x3A) 0x44000200 0x0000004d 0x00000000 0x00000000
|
||||
GPP_K0 (0x6A,0x3E) 0x42800102 0x0000004e 0x00000000 0x00000000
|
||||
GPP_K1 (0x6A,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_K2 (0x6A,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_K3 (0x6A,0x44) 0x84000201 0x00000052 0x00000000 0x00000000
|
||||
GPP_K4 (0x6A,0x46) 0x44000200 0x00003053 0x00000000 0x00000000
|
||||
GPP_K5 (0x6A,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_K6 (0x6A,0x4A) 0x44000a02 0x00000055 0x00000000 0x00000000
|
||||
GPP_K7 (0x6A,0x4C) 0x44000a02 0x00000056 0x00000000 0x00000000
|
||||
GPP_K8 (0x6A,0x4E) 0x44000700 0x00000057 0x00000000 0x00000000
|
||||
GPP_K9 (0x6A,0x50) 0x44000700 0x00000058 0x00000000 0x00000000
|
||||
GPP_K10 (0x6A,0x52) 0x44000a02 0x00000059 0x00000000 0x00000000
|
||||
GPP_K11 (0x6A,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_F0 (0x6A,0x5C) 0x44000300 0x0000005b 0x00000000 0x00000000
|
||||
GPP_F1 (0x6A,0x5E) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_F2 (0x6A,0x60) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_F3 (0x6A,0x62) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_F4 (0x6A,0x64) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_F5 (0x6A,0x66) 0x44000300 0x00000061 0x00000000 0x00000000
|
||||
GPP_F6 (0x6A,0x68) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_F7 (0x6A,0x6A) 0x80100100 0x00000063 0x00000000 0x00000000
|
||||
GPP_F8 (0x6A,0x6C) 0x84000100 0x00000064 0x00000000 0x00000000
|
||||
GPP_F9 (0x6A,0x6E) 0x44000200 0x00000065 0x00000000 0x00000000
|
||||
GPP_F10 (0x6A,0x70) 0x44000102 0x00000066 0x00000000 0x00000000
|
||||
GPP_F11 (0x6A,0x72) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_F12 (0x6A,0x74) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_F13 (0x6A,0x76) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_F14 (0x6A,0x78) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
|
||||
GPP_F16 (0x6A,0x7C) 0x80100100 0x0000006c 0x00000000 0x00000000
|
||||
GPP_F17 (0x6A,0x7E) 0x44000102 0x0000006d 0x00000000 0x00000000
|
||||
GPP_F18 (0x6A,0x80) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_F19 (0x6A,0x82) 0x44000700 0x0000006f 0x00000000 0x00000000
|
||||
GPP_F20 (0x6A,0x84) 0x44000700 0x00000070 0x00000000 0x00000000
|
||||
GPP_F21 (0x6A,0x86) 0x44000700 0x00000071 0x00000000 0x00000000
|
||||
GPP_F22 (0x6A,0x88) 0x44000200 0x00000072 0x00000000 0x00000000
|
||||
GPP_F23 (0x6A,0x8A) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_D0 (0x69,0x20) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_D1 (0x69,0x22) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_D2 (0x69,0x24) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_D3 (0x69,0x26) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_D4 (0x69,0x28) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_D5 (0x69,0x2A) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_D6 (0x69,0x2C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_D7 (0x69,0x2E) 0x44000200 0x0000002d 0x00000000 0x00000000
|
||||
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
|
||||
GPP_D9 (0x69,0x32) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D10 (0x69,0x34) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D13 (0x69,0x3A) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D14 (0x69,0x3C) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
|
||||
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D22 (0x69,0x4C) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC245
|
||||
vendor_id: 0x10ec0245
|
||||
subsystem_id: 0x15580353
|
||||
revision_id: 0x100001
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x411111f0
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40689b2d
|
||||
0x1e: 0x411111f0
|
||||
0x21: 0x04211020
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Raptorlake HDMI
|
||||
vendor_id: 0x80862818
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x04: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x08: 0x18560010
|
||||
0x0a: 0x18560010
|
||||
0x0b: 0x18560010
|
||||
0x0c: 0x18560010
|
||||
0x0d: 0x18560010
|
||||
0x0e: 0x18560010
|
||||
0x0f: 0x18560010
|
||||
hdaudioC1D0
|
||||
vendor_name: Nvidia
|
||||
chip_name: GPU a6 HDMI/DP
|
||||
vendor_id: 0x10de00a6
|
||||
subsystem_id: 0x10de0000
|
||||
revision_id: 0x100100
|
||||
0x04: 0x185600f0
|
||||
0x05: 0x585600f0
|
||||
0x06: 0x585600f0
|
||||
0x07: 0x585600f0
|
19
models/addw4/coreboot.config
Normal file
19
models/addw4/coreboot.config
Normal file
@@ -0,0 +1,19 @@
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
CONFIG_BOARD_SYSTEM76_ADDW4=y
|
||||
CONFIG_CCACHE=y
|
||||
CONFIG_CONSOLE_SERIAL=n
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
1
models/addw4/ec.config
Normal file
1
models/addw4/ec.config
Normal file
@@ -0,0 +1 @@
|
||||
BOARD=system76/addw4
|
89
models/addw4/ecspy.txt
Normal file
89
models/addw4/ecspy.txt
Normal file
@@ -0,0 +1,89 @@
|
||||
id 5570 rev 7
|
||||
A0: data 1 mirror 1 pot 0 control 00
|
||||
A1: data 0 mirror 0 pot 0 control 80
|
||||
A2: data 0 mirror 0 pot 0 control 00
|
||||
A3: data 1 mirror 1 pot 0 control 80
|
||||
A4: data 0 mirror 0 pot 0 control 00
|
||||
A5: data 0 mirror 0 pot 0 control 00
|
||||
A6: data 0 mirror 0 pot 0 control 00
|
||||
A7: data 1 mirror 0 pot 0 control 00
|
||||
B0: data 0 mirror 0 pot 0 control 84
|
||||
B1: data 1 mirror 1 pot 0 control 84
|
||||
B2: data 1 mirror 1 pot 0 control 80
|
||||
B3: data 1 mirror 1 pot 0 control 80
|
||||
B4: data 1 mirror 1 pot 0 control 40
|
||||
B5: data 0 mirror 0 pot 0 control 80
|
||||
B6: data 1 mirror 1 pot 0 control 44
|
||||
B7: data 1 mirror 1 pot 0 control 80
|
||||
C0: data 1 mirror 1 pot 0 control 80
|
||||
C1: data 1 mirror 1 pot 0 control 04
|
||||
C2: data 1 mirror 1 pot 0 control 04
|
||||
C3: data 1 mirror 1 pot 0 control 04
|
||||
C4: data 0 mirror 0 pot 0 control 84
|
||||
C5: data 1 mirror 1 pot 0 control 04
|
||||
C6: data 1 mirror 1 pot 0 control 40
|
||||
C7: data 1 mirror 1 pot 0 control 44
|
||||
D0: data 1 mirror 1 pot 0 control 44
|
||||
D1: data 1 mirror 1 pot 0 control 44
|
||||
D2: data 1 mirror 1 pot 0 control 00
|
||||
D3: data 0 mirror 0 pot 0 control 40
|
||||
D4: data 0 mirror 0 pot 0 control 80
|
||||
D5: data 1 mirror 1 pot 0 control 44
|
||||
D6: data 1 mirror 1 pot 0 control 02
|
||||
D7: data 1 mirror 1 pot 0 control 02
|
||||
E0: data 1 mirror 1 pot 0 control 04
|
||||
E1: data 1 mirror 1 pot 0 control 44
|
||||
E2: data 0 mirror 0 pot 0 control 84
|
||||
E3: data 1 mirror 1 pot 0 control 40
|
||||
E4: data 1 mirror 1 pot 0 control 42
|
||||
E5: data 1 mirror 1 pot 0 control 40
|
||||
E6: data 0 mirror 0 pot 0 control 80
|
||||
E7: data 1 mirror 1 pot 0 control 04
|
||||
F0: data 0 mirror 0 pot 0 control 44
|
||||
F1: data 1 mirror 1 pot 0 control 44
|
||||
F2: data 1 mirror 1 pot 0 control 44
|
||||
F3: data 1 mirror 1 pot 0 control 40
|
||||
F4: data 1 mirror 1 pot 0 control 04
|
||||
F5: data 1 mirror 1 pot 0 control 04
|
||||
F6: data 0 mirror 0 pot 0 control 40
|
||||
F7: data 0 mirror 0 pot 0 control 40
|
||||
G0: data 1 mirror 1 pot 0 control 40
|
||||
G1: data 1 mirror 1 pot 0 control 44
|
||||
G2: data 1 mirror 1 pot 0 control 80
|
||||
G3: data 0 mirror 0 pot 0 control 00
|
||||
G4: data 0 mirror 0 pot 0 control 00
|
||||
G5: data 0 mirror 0 pot 0 control 00
|
||||
G6: data 0 mirror 0 pot 0 control 40
|
||||
G7: data 0 mirror 0 pot 0 control 00
|
||||
H0: data 1 mirror 1 pot 0 control 80
|
||||
H1: data 0 mirror 0 pot 0 control 82
|
||||
H2: data 0 mirror 0 pot 0 control 40
|
||||
H3: data 1 mirror 1 pot 0 control 44
|
||||
H4: data 1 mirror 1 pot 0 control 80
|
||||
H5: data 1 mirror 1 pot 0 control 40
|
||||
H6: data 1 mirror 1 pot 0 control 80
|
||||
H7: data 1 mirror 1 pot 0 control 80
|
||||
I0: data 0 mirror 0 pot 0 control 00
|
||||
I1: data 0 mirror 0 pot 0 control 00
|
||||
I2: data 0 mirror 0 pot 0 control 80
|
||||
I3: data 0 mirror 0 pot 0 control 00
|
||||
I4: data 0 mirror 0 pot 0 control 00
|
||||
I5: data 0 mirror 0 pot 0 control 00
|
||||
I6: data 0 mirror 0 pot 0 control 00
|
||||
I7: data 0 mirror 0 pot 0 control 00
|
||||
J0: data 0 mirror 0 pot 0 control 40
|
||||
J1: data 1 mirror 1 pot 0 control 40
|
||||
J2: data 0 mirror 0 pot 0 control 40
|
||||
J3: data 0 mirror 0 pot 0 control 82
|
||||
J4: data 1 mirror 1 pot 0 control 40
|
||||
J5: data 1 mirror 1 pot 0 control 80
|
||||
J6: data 0 mirror 0 pot 0 control 44
|
||||
J7: data 1 mirror 1 pot 0 control 40
|
||||
M0: data 0 mirror 0 control 06
|
||||
M1: data 0 mirror 1 control 06
|
||||
M2: data 1 mirror 1 control 06
|
||||
M3: data 1 mirror 1 control 06
|
||||
M4: data 0 mirror 1 control 06
|
||||
M5: data 0 mirror 0 control 00
|
||||
M6: data 1 mirror 1 control 86
|
||||
M7: data 0 mirror 0 control 00
|
9
models/addw4/edk2.config
Normal file
9
models/addw4/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/addw4/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/addw4/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/addw4/me.rom
(Stored with Git LFS)
Normal file
BIN
models/addw4/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/addw4/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/addw4/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
#SECURE_BOOT_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
|
@@ -1,245 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, UP_20K, PWROK, NF1),
|
||||
PAD_CFG_GPI(GPD7, UP_20K, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD11, UP_20K, PWROK),
|
||||
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A11, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_A12, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A13, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A14, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A15, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A17, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A20, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A21, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A22, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_A23, UP_20K, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B0, 0x42080100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_B1, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_B2, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_B3, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B4, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B7, UP_20K, PLTRST),
|
||||
PAD_CFG_GPI(GPP_B8, UP_20K, PLTRST),
|
||||
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B10, UP_20K, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_B11, 1, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, UP_20K, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B20, 0x42040100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_B21, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_B23, NONE, DEEP, NF2),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C10, DN_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C11, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C12, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_C13, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_C14, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_C15, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C20, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_C21, NONE, PLTRST, NF1),
|
||||
PAD_CFG_GPI(GPP_C22, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_C23, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D0, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_D7, NONE, PLTRST, NF1),
|
||||
PAD_CFG_NF(GPP_D8, NONE, PLTRST, NF1),
|
||||
PAD_CFG_GPI(GPP_D9, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D10, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D12, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D13, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D14, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D15, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D16, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_D17, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_E0, NONE, DEEP, NF2),
|
||||
PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E2, NONE, DEEP, NF2),
|
||||
PAD_CFG_GPI(GPP_E3, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_E7, 0x80800100, 0x0000),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF2),
|
||||
PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_F2, 0, UP_20K, PLTRST),
|
||||
PAD_CFG_NF(GPP_F3, NONE, DEEP, NF2),
|
||||
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF2),
|
||||
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F7, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F8, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F9, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F10, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F11, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF2),
|
||||
PAD_CFG_GPI(GPP_F15, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F19, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F20, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_F21, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F22, 1, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_F23, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H3, NONE, PLTRST),
|
||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H5, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_H6, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_H7, 0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_H11, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, UP_20K, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_H15, 0x40880100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_H16, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H17, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H18, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H19, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H22, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_H23, UP_20K, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
|
||||
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
|
||||
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
|
||||
PAD_CFG_TERM_GPO(GPP_I5, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I6, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_I7, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_I8, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I10, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I11, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I12, 0, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_I13, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_I14, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J1, NONE, DEEP, NF2),
|
||||
PAD_CFG_GPI(GPP_J2, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_J3, UP_20K, DEEP),
|
||||
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_J9, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_J10, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_J11, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K0, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K1, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K2, UP_20K, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K3, 0x80880100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_K4, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K5, 0, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_K7, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K8, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K9, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K10, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K11, UP_20K, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_K12, 0x82880100, 0x3000),
|
||||
PAD_CFG_GPI(GPP_K13, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K15, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K16, 0, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K17, UP_20K, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_K19, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K20, UP_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K22, 0, TODO_0x2800, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_K23, 0, NONE, PLTRST),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
@@ -1,40 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#ifndef HDA_VERB_H
|
||||
#define HDA_VERB_H
|
||||
|
||||
#include <device/azalia_device.h>
|
||||
|
||||
const u32 cim_verb_data[] = {
|
||||
/* Realtek, ALC1220 */
|
||||
0x10ec1220, /* Vendor ID */
|
||||
0x15587714, /* Subsystem ID */
|
||||
12, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x15587714),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x4094022d),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x04451120),
|
||||
/* Nvidia, GPU92HDMI/DP */
|
||||
0x10de0092, /* Vendor ID */
|
||||
0x15587714, /* Subsystem ID */
|
||||
5, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x15587714),
|
||||
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
|
||||
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
||||
AZALIA_ARRAY_SIZES;
|
||||
|
||||
#endif
|
BIN
models/bonw15/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/bonw15/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/bonw15/IntelGopDriver.inf
Normal file
9
models/bonw15/IntelGopDriver.inf
Normal file
@@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
12
models/bonw15/README.md
Normal file
12
models/bonw15/README.md
Normal file
@@ -0,0 +1,12 @@
|
||||
# System76 Bonobo WS (bonw15)
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- Size: 4 KB
|
||||
- HAP: false
|
||||
- [ME](./me.rom)
|
||||
- Size: 3944 KB
|
||||
- Version: 16.1.25.2091
|
1
models/bonw15/README.md.in
Normal file
1
models/bonw15/README.md.in
Normal file
@@ -0,0 +1 @@
|
||||
# System76 Bonobo WS (bonw15)
|
1
models/bonw15/chip.txt
Normal file
1
models/bonw15/chip.txt
Normal file
@@ -0,0 +1 @@
|
||||
GD25Q256D
|
334
models/bonw15/coreboot-collector.txt
Normal file
334
models/bonw15/coreboot-collector.txt
Normal file
@@ -0,0 +1,334 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
|
||||
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
|
||||
PCI Device: 0000:00:01.1: Class 0x00060400, Vendor 0x8086, Device 0xA72D, Revision 0x01
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
|
||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
|
||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
|
||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3E, Revision 0x11
|
||||
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x7A30, Revision 0x11
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x7A50, Revision 0x11
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
|
||||
PCI Device: 0000:02:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x27E0, Revision 0xA1
|
||||
PCI Device: 0000:02:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BC, Revision 0xA1
|
||||
PCI Device: 0000:03:00.0: Class 0x00020000, Vendor 0x8086, Device 0x3101, Revision 0x03
|
||||
PCI Device: 0000:04:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
||||
PCI Device: 0000:05:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
||||
PCI Device: 0000:05:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
||||
PCI Device: 0000:05:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
||||
PCI Device: 0000:05:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
|
||||
PCI Device: 0000:06:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1137, Revision 0x00
|
||||
PCI Device: 0000:3a:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1138, Revision 0x00
|
||||
PCI Device: 10000:e0:1b.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||
PCI Device: 10000:e0:1b.4: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
|
||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
## GPIO ##
|
||||
600 Series PCH
|
||||
GPP_I0 (0x6E,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_I1 (0x6E,0x02) 0x86880100 0x00000019 0x00000000 0x00000000
|
||||
GPP_I2 (0x6E,0x04) 0x86880100 0x0000001a 0x00000000 0x00000000
|
||||
GPP_I3 (0x6E,0x06) 0x86880100 0x0000001b 0x00000000 0x00000000
|
||||
GPP_I4 (0x6E,0x08) 0x86880100 0x0000001c 0x00000000 0x00000000
|
||||
GPP_I5 (0x6E,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_I7 (0x6E,0x0E) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
|
||||
GPP_I9 (0x6E,0x12) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_I10 (0x6E,0x14) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_I11 (0x6E,0x16) 0x44000300 0x00000024 0x00000000 0x00000000
|
||||
GPP_I12 (0x6E,0x18) 0x44000300 0x00000025 0x00000000 0x00000000
|
||||
GPP_I13 (0x6E,0x1A) 0x44000300 0x00000026 0x00000000 0x00000000
|
||||
GPP_I14 (0x6E,0x1C) 0x44000300 0x00000027 0x00000000 0x00000000
|
||||
GPP_I15 (0x6E,0x1E) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_I16 (0x6E,0x20) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_I17 (0x6E,0x22) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_I18 (0x6E,0x24) 0x44000102 0x0000002b 0x00000000 0x00000000
|
||||
GPP_I19 (0x6E,0x26) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_I20 (0x6E,0x28) 0x44000200 0x0000002d 0x00000000 0x00000000
|
||||
GPP_I21 (0x6E,0x2A) 0x44000200 0x0000002e 0x00000000 0x00000000
|
||||
GPP_I22 (0x6E,0x2C) 0x44000102 0x00000030 0x00000000 0x00000000
|
||||
GPP_R0 (0x6E,0x32) 0x44000500 0x00000031 0x00000000 0x00000000
|
||||
GPP_R1 (0x6E,0x34) 0x44000500 0x00003c32 0x00000000 0x00000000
|
||||
GPP_R2 (0x6E,0x36) 0x44000500 0x00003c33 0x00000000 0x00000000
|
||||
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
|
||||
GPP_R4 (0x6E,0x3A) 0x44000500 0x00000035 0x00000000 0x00000000
|
||||
GPP_R5 (0x6E,0x3C) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_R6 (0x6E,0x3E) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_R7 (0x6E,0x40) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_R8 (0x6E,0x42) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_R9 (0x6E,0x44) 0x44000702 0x0000003a 0x00000000 0x00000000
|
||||
GPP_R10 (0x6E,0x46) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_R11 (0x6E,0x48) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_R12 (0x6E,0x4A) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_R13 (0x6E,0x4C) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_R14 (0x6E,0x4E) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_R15 (0x6E,0x50) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
|
||||
GPP_R17 (0x6E,0x54) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_R18 (0x6E,0x56) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_R19 (0x6E,0x58) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_R20 (0x6E,0x5A) 0x44000200 0x00000045 0x00000000 0x00000000
|
||||
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_J0 (0x6E,0x60) 0x44000500 0x00000047 0x00000000 0x00000000
|
||||
GPP_J1 (0x6E,0x62) 0x44000700 0x00000048 0x00000000 0x00000000
|
||||
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
|
||||
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
|
||||
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
|
||||
GPP_J5 (0x6E,0x6A) 0x44000500 0x0000304c 0x00000000 0x00000000
|
||||
GPP_J6 (0x6E,0x6C) 0x44000500 0x0000004d 0x00000000 0x00000000
|
||||
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
|
||||
GPP_J8 (0x6E,0x70) 0x44000102 0x00000050 0x00000000 0x00000000
|
||||
GPP_J9 (0x6E,0x72) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_J10 (0x6E,0x74) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_J11 (0x6E,0x76) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_B0 (0x6D,0x00) 0x82900102 0x00000050 0x00000000 0x00000000
|
||||
GPP_B1 (0x6D,0x02) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
|
||||
GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
|
||||
GPP_B4 (0x6D,0x08) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_B5 (0x6D,0x0A) 0x44000200 0x00000055 0x00000000 0x00000000
|
||||
GPP_B6 (0x6D,0x0C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_B7 (0x6D,0x0E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_B8 (0x6D,0x10) 0x44000200 0x00000058 0x00000000 0x00000000
|
||||
GPP_B9 (0x6D,0x12) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_B10 (0x6D,0x14) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_B11 (0x6D,0x16) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_B12 (0x6D,0x18) 0x44000700 0x0000005c 0x00000000 0x00000000
|
||||
GPP_B13 (0x6D,0x1A) 0x44000700 0x0000005d 0x00000000 0x00000000
|
||||
GPP_B14 (0x6D,0x1C) 0x44000600 0x0000005e 0x00000000 0x00000000
|
||||
GPP_B15 (0x6D,0x1E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
||||
GPP_B16 (0x6D,0x20) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_B17 (0x6D,0x22) 0x04000201 0x00000061 0x00000000 0x00000000
|
||||
GPP_B18 (0x6D,0x24) 0x04000702 0x00000062 0x00000000 0x00000000
|
||||
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
|
||||
GPP_B20 (0x6D,0x28) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_B21 (0x6D,0x2A) 0x44000200 0x00000065 0x00000000 0x00000000
|
||||
GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
|
||||
GPP_B23 (0x6D,0x2E) 0x44000102 0x00000067 0x00000800 0x00000000
|
||||
GPP_G0 (0x6D,0x30) 0x04000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_G1 (0x6D,0x32) 0x44000100 0x00000069 0x00000000 0x00000000
|
||||
GPP_G2 (0x6D,0x34) 0x44000100 0x0000106a 0x00000000 0x00000000
|
||||
GPP_G3 (0x6D,0x36) 0x44000102 0x0000006b 0x00000000 0x00000000
|
||||
GPP_G4 (0x6D,0x38) 0x44000100 0x0000006c 0x00000000 0x00000000
|
||||
GPP_G5 (0x6D,0x3A) 0x44000700 0x0000006d 0x00000000 0x00000000
|
||||
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
|
||||
GPP_G7 (0x6D,0x3E) 0x42800102 0x0000006f 0x00000000 0x00000000
|
||||
GPP_H0 (0x6D,0x40) 0x44000102 0x00000070 0x00000000 0x00000000
|
||||
GPP_H1 (0x6D,0x42) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_H2 (0x6D,0x44) 0x44000100 0x00000072 0x00000000 0x00000000
|
||||
GPP_H3 (0x6D,0x46) 0x44000702 0x00000073 0x00000000 0x00000000
|
||||
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
|
||||
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
|
||||
GPP_H6 (0x6D,0x4C) 0x44000300 0x00000076 0x00000000 0x00000000
|
||||
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
|
||||
GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
|
||||
GPP_H9 (0x6D,0x52) 0x44000702 0x00000019 0x00000000 0x00000000
|
||||
GPP_H10 (0x6D,0x54) 0x44000502 0x00000020 0x00000000 0x00000000
|
||||
GPP_H11 (0x6D,0x56) 0x44000502 0x00000021 0x00000000 0x00000000
|
||||
GPP_H12 (0x6D,0x58) 0x44000102 0x00000022 0x00000000 0x00000000
|
||||
GPP_H13 (0x6D,0x5A) 0x44000502 0x00000023 0x00000000 0x00000000
|
||||
GPP_H14 (0x6D,0x5C) 0x44000500 0x00000024 0x00000000 0x00000000
|
||||
GPP_H15 (0x6D,0x5E) 0x44000102 0x00000025 0x00000800 0x00000000
|
||||
GPP_H16 (0x6D,0x60) 0x44000102 0x00000026 0x00000000 0x00000000
|
||||
GPP_H17 (0x6D,0x62) 0x44000201 0x00000027 0x00000000 0x00000000
|
||||
GPP_H18 (0x6D,0x64) 0x44000102 0x00000028 0x00000000 0x00000000
|
||||
GPP_H19 (0x6D,0x66) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_H20 (0x6D,0x68) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_H21 (0x6D,0x6A) 0x44000201 0x0000002b 0x00000000 0x00000000
|
||||
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_H23 (0x6D,0x6E) 0x44000102 0x0000002d 0x00000000 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x42880102 0x00000062 0x00000000 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000100 0x00000067 0x00000000 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x44000200 0x0000006b 0x00000000 0x00000000
|
||||
GPD12 (0x6C,0x18) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
|
||||
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
|
||||
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
|
||||
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
|
||||
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
|
||||
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
|
||||
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
|
||||
GPP_A7 (0x6B,0x20) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_A8 (0x6B,0x22) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_A9 (0x6B,0x24) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_A10 (0x6B,0x26) 0x44000500 0x00000028 0x00000000 0x00000000
|
||||
GPP_A11 (0x6B,0x28) 0x44000102 0x00003029 0x00000000 0x00000000
|
||||
GPP_A12 (0x6B,0x2A) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_A13 (0x6B,0x2C) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_A14 (0x6B,0x2E) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_C0 (0x6B,0x32) 0x44000502 0x0000002d 0x00000000 0x00000000
|
||||
GPP_C1 (0x6B,0x34) 0x44000502 0x0000002e 0x00000000 0x00000000
|
||||
GPP_C2 (0x6B,0x36) 0x84000102 0x0000002f 0x00000800 0x00000000
|
||||
GPP_C3 (0x6B,0x38) 0x44000200 0x00000030 0x00000000 0x00000000
|
||||
GPP_C4 (0x6B,0x3A) 0x44000200 0x00000031 0x00000000 0x00000000
|
||||
GPP_C5 (0x6B,0x3C) 0x44000502 0x00000032 0x00000000 0x00000000
|
||||
GPP_C6 (0x6B,0x3E) 0x44000200 0x00000033 0x00000000 0x00000000
|
||||
GPP_C7 (0x6B,0x40) 0x44000200 0x00000034 0x00000000 0x00000000
|
||||
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
|
||||
GPP_C9 (0x6B,0x44) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_C10 (0x6B,0x46) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_C11 (0x6B,0x48) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_C12 (0x6B,0x4A) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_C13 (0x6B,0x4C) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_C14 (0x6B,0x4E) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_C15 (0x6B,0x50) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_C16 (0x6B,0x52) 0x44000502 0x0000003d 0x00000000 0x00000000
|
||||
GPP_C17 (0x6B,0x54) 0x44000502 0x0000003e 0x00000000 0x00000000
|
||||
GPP_C18 (0x6B,0x56) 0x44000502 0x0000003f 0x00000000 0x00000000
|
||||
GPP_C19 (0x6B,0x58) 0x44000502 0x00000040 0x00000000 0x00000000
|
||||
GPP_C20 (0x6B,0x5A) 0x44000102 0x00000041 0x00000000 0x00000000
|
||||
GPP_C21 (0x6B,0x5C) 0x44000102 0x00000042 0x00000000 0x00000000
|
||||
GPP_C22 (0x6B,0x5E) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_C23 (0x6B,0x60) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_S0 (0x6A,0x00) 0x44000200 0x01800030 0x00000000 0x00000000
|
||||
GPP_S1 (0x6A,0x02) 0x44000200 0x01800031 0x00000000 0x00000000
|
||||
GPP_S2 (0x6A,0x04) 0x44000200 0x01800032 0x00000000 0x00000000
|
||||
GPP_S3 (0x6A,0x06) 0x44000200 0x01800033 0x00000000 0x00000000
|
||||
GPP_S4 (0x6A,0x08) 0x44000200 0x01800034 0x00000000 0x00000000
|
||||
GPP_S5 (0x6A,0x0A) 0x44000200 0x01800035 0x00000000 0x00000000
|
||||
GPP_S6 (0x6A,0x0C) 0x44000200 0x01800036 0x00000000 0x00000000
|
||||
GPP_S7 (0x6A,0x0E) 0x44000200 0x01800037 0x00000000 0x00000000
|
||||
GPP_E0 (0x6A,0x10) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_E1 (0x6A,0x12) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_E2 (0x6A,0x14) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_E3 (0x6A,0x16) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_E4 (0x6A,0x18) 0x44000200 0x0000003c 0x00000000 0x00000000
|
||||
GPP_E5 (0x6A,0x1A) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_E6 (0x6A,0x1C) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
|
||||
GPP_E8 (0x6A,0x20) 0x44000500 0x00000040 0x00000000 0x00000000
|
||||
GPP_E9 (0x6A,0x22) 0x44000300 0x00000041 0x00000800 0x00000000
|
||||
GPP_E10 (0x6A,0x24) 0x44000300 0x00000042 0x00000800 0x00000000
|
||||
GPP_E11 (0x6A,0x26) 0x44000300 0x00000043 0x00000800 0x00000000
|
||||
GPP_E12 (0x6A,0x28) 0x44000300 0x00000044 0x00000000 0x00000000
|
||||
GPP_E13 (0x6A,0x2A) 0x44000200 0x00000045 0x00000000 0x00000000
|
||||
GPP_E14 (0x6A,0x2C) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_E16 (0x6A,0x30) 0x44000200 0x00000048 0x00000000 0x00000000
|
||||
GPP_E17 (0x6A,0x32) 0x44000200 0x00000049 0x00000000 0x00000000
|
||||
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
|
||||
GPP_E19 (0x6A,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
|
||||
GPP_E20 (0x6A,0x38) 0x44000200 0x0000004c 0x00000000 0x00000000
|
||||
GPP_E21 (0x6A,0x3A) 0x44000200 0x0000004d 0x00000000 0x00000000
|
||||
GPP_K0 (0x6A,0x3E) 0x44000200 0x0000004e 0x00000000 0x00000000
|
||||
GPP_K1 (0x6A,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_K2 (0x6A,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_K3 (0x6A,0x44) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_K4 (0x6A,0x46) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_K5 (0x6A,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
|
||||
GPP_K6 (0x6A,0x4A) 0x44000a02 0x00000055 0x00000000 0x00000000
|
||||
GPP_K7 (0x6A,0x4C) 0x44000a02 0x00000056 0x00000000 0x00000000
|
||||
GPP_K8 (0x6A,0x4E) 0x44000700 0x00000057 0x00000000 0x00000000
|
||||
GPP_K9 (0x6A,0x50) 0x44000700 0x00000058 0x00000000 0x00000000
|
||||
GPP_K10 (0x6A,0x52) 0x44000a02 0x00000059 0x00000000 0x00000000
|
||||
GPP_K11 (0x6A,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_F0 (0x6A,0x5C) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_F1 (0x6A,0x5E) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_F2 (0x6A,0x60) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_F3 (0x6A,0x62) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_F4 (0x6A,0x64) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_F5 (0x6A,0x66) 0x84000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_F6 (0x6A,0x68) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_F7 (0x6A,0x6A) 0x44000200 0x00000063 0x00000000 0x00000000
|
||||
GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
|
||||
GPP_F9 (0x6A,0x6E) 0x42880102 0x00000065 0x00000000 0x00000000
|
||||
GPP_F10 (0x6A,0x70) 0x44000200 0x00000066 0x00000000 0x00000000
|
||||
GPP_F11 (0x6A,0x72) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_F12 (0x6A,0x74) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_F13 (0x6A,0x76) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_F14 (0x6A,0x78) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
|
||||
GPP_F16 (0x6A,0x7C) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_F17 (0x6A,0x7E) 0x44000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_F18 (0x6A,0x80) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_F19 (0x6A,0x82) 0x44000700 0x0000006f 0x00000000 0x00000000
|
||||
GPP_F20 (0x6A,0x84) 0x44000700 0x00000070 0x00000000 0x00000000
|
||||
GPP_F21 (0x6A,0x86) 0x44000700 0x00000071 0x00000000 0x00000000
|
||||
GPP_F22 (0x6A,0x88) 0x44000201 0x00000072 0x00000000 0x00000000
|
||||
GPP_F23 (0x6A,0x8A) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_D0 (0x69,0x20) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_D1 (0x69,0x22) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_D2 (0x69,0x24) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_D3 (0x69,0x26) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_D4 (0x69,0x28) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_D5 (0x69,0x2A) 0x44000200 0x0000002b 0x00000000 0x00000000
|
||||
GPP_D6 (0x69,0x2C) 0x44000200 0x0000002c 0x00000000 0x00000000
|
||||
GPP_D7 (0x69,0x2E) 0x44000200 0x0000002d 0x00000000 0x00000000
|
||||
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
|
||||
GPP_D9 (0x69,0x32) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D10 (0x69,0x34) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D13 (0x69,0x3A) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D14 (0x69,0x3C) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
|
||||
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
|
||||
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
GPP_D22 (0x69,0x4C) 0x40000702 0x00000000 0x00000000 0x00000000
|
||||
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC1220
|
||||
vendor_id: 0x10ec1220
|
||||
subsystem_id: 0x15583702
|
||||
revision_id: 0x100101
|
||||
0x12: 0x90a60130
|
||||
0x14: 0x0421101f
|
||||
0x15: 0x40000000
|
||||
0x16: 0x411111f0
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x04a11040
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x90170110
|
||||
0x1d: 0x40b7952d
|
||||
0x1e: 0x04451150
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Raptorlake HDMI
|
||||
vendor_id: 0x80862818
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x04: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x08: 0x18560010
|
||||
0x0a: 0x18560010
|
||||
0x0b: 0x18560010
|
||||
0x0c: 0x18560010
|
||||
0x0d: 0x18560010
|
||||
0x0e: 0x18560010
|
||||
0x0f: 0x18560010
|
||||
hdaudioC1D0
|
||||
vendor_name: Nvidia
|
||||
chip_name: Generic HDMI
|
||||
vendor_id: 0x10de00a5
|
||||
subsystem_id: 0x10de0000
|
||||
revision_id: 0x100100
|
||||
0x04: 0x585600f0
|
||||
0x05: 0x185600f0
|
||||
0x06: 0x185600f0
|
||||
0x07: 0x185600f0
|
19
models/bonw15/coreboot.config
Normal file
19
models/bonw15/coreboot.config
Normal file
@@ -0,0 +1,19 @@
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
CONFIG_BOARD_SYSTEM76_BONW15=y
|
||||
CONFIG_CCACHE=y
|
||||
CONFIG_CONSOLE_SERIAL=n
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
1
models/bonw15/ec.config
Normal file
1
models/bonw15/ec.config
Normal file
@@ -0,0 +1 @@
|
||||
BOARD=system76/bonw15
|
89
models/bonw15/ecspy.txt
Normal file
89
models/bonw15/ecspy.txt
Normal file
@@ -0,0 +1,89 @@
|
||||
id 5570 rev 6
|
||||
A0: data 1 mirror 1 pot 0 control 80
|
||||
A1: data 0 mirror 0 pot 0 control 00
|
||||
A2: data 1 mirror 0 pot 0 control 00
|
||||
A3: data 0 mirror 0 pot 0 control 00
|
||||
A4: data 0 mirror 1 pot 0 control 00
|
||||
A5: data 0 mirror 0 pot 0 control 00
|
||||
A6: data 0 mirror 0 pot 0 control 00
|
||||
A7: data 0 mirror 0 pot 0 control 00
|
||||
B0: data 0 mirror 0 pot 0 control 84
|
||||
B1: data 1 mirror 1 pot 0 control 84
|
||||
B2: data 1 mirror 1 pot 0 control 84
|
||||
B3: data 1 mirror 1 pot 0 control 80
|
||||
B4: data 1 mirror 1 pot 0 control 40
|
||||
B5: data 1 mirror 1 pot 0 control 40
|
||||
B6: data 1 mirror 1 pot 0 control 44
|
||||
B7: data 1 mirror 1 pot 0 control 80
|
||||
C0: data 1 mirror 1 pot 0 control 80
|
||||
C1: data 1 mirror 1 pot 0 control 04
|
||||
C2: data 1 mirror 1 pot 0 control 04
|
||||
C3: data 0 mirror 0 pot 0 control 04
|
||||
C4: data 0 mirror 0 pot 0 control 84
|
||||
C5: data 0 mirror 0 pot 0 control 04
|
||||
C6: data 1 mirror 1 pot 0 control 40
|
||||
C7: data 1 mirror 1 pot 0 control 44
|
||||
D0: data 1 mirror 1 pot 0 control 40
|
||||
D1: data 1 mirror 1 pot 0 control 44
|
||||
D2: data 1 mirror 1 pot 0 control 00
|
||||
D3: data 0 mirror 0 pot 0 control 40
|
||||
D4: data 0 mirror 0 pot 0 control 40
|
||||
D5: data 1 mirror 1 pot 0 control 44
|
||||
D6: data 0 mirror 0 pot 0 control 02
|
||||
D7: data 1 mirror 1 pot 0 control 02
|
||||
E0: data 1 mirror 1 pot 0 control 04
|
||||
E1: data 1 mirror 1 pot 0 control 44
|
||||
E2: data 1 mirror 1 pot 0 control 84
|
||||
E3: data 1 mirror 1 pot 0 control 40
|
||||
E4: data 1 mirror 1 pot 0 control 42
|
||||
E5: data 1 mirror 1 pot 0 control 40
|
||||
E6: data 0 mirror 0 pot 0 control 80
|
||||
E7: data 1 mirror 1 pot 0 control 04
|
||||
F0: data 0 mirror 0 pot 0 control 44
|
||||
F1: data 1 mirror 1 pot 0 control 44
|
||||
F2: data 1 mirror 1 pot 0 control 44
|
||||
F3: data 1 mirror 1 pot 0 control 40
|
||||
F4: data 1 mirror 1 pot 0 control 04
|
||||
F5: data 1 mirror 1 pot 0 control 04
|
||||
F6: data 1 mirror 1 pot 0 control 40
|
||||
F7: data 1 mirror 1 pot 0 control 80
|
||||
G0: data 1 mirror 1 pot 0 control 80
|
||||
G1: data 1 mirror 1 pot 0 control 40
|
||||
G2: data 1 mirror 1 pot 0 control 80
|
||||
G3: data 0 mirror 0 pot 0 control 00
|
||||
G4: data 0 mirror 0 pot 0 control 00
|
||||
G5: data 0 mirror 0 pot 0 control 00
|
||||
G6: data 0 mirror 0 pot 0 control 44
|
||||
G7: data 0 mirror 0 pot 0 control 00
|
||||
H0: data 0 mirror 0 pot 0 control 80
|
||||
H1: data 1 mirror 1 pot 0 control 80
|
||||
H2: data 0 mirror 0 pot 0 control 44
|
||||
H3: data 1 mirror 1 pot 0 control 80
|
||||
H4: data 0 mirror 0 pot 0 control 80
|
||||
H5: data 0 mirror 0 pot 0 control 44
|
||||
H6: data 1 mirror 1 pot 0 control 40
|
||||
H7: data 1 mirror 1 pot 0 control 80
|
||||
I0: data 0 mirror 0 pot 0 control 00
|
||||
I1: data 0 mirror 0 pot 0 control 00
|
||||
I2: data 0 mirror 0 pot 0 control 80
|
||||
I3: data 0 mirror 0 pot 0 control 00
|
||||
I4: data 0 mirror 0 pot 0 control 00
|
||||
I5: data 1 mirror 1 pot 0 control 40
|
||||
I6: data 0 mirror 0 pot 0 control 00
|
||||
I7: data 0 mirror 0 pot 0 control 00
|
||||
J0: data 1 mirror 1 pot 0 control 44
|
||||
J1: data 1 mirror 1 pot 0 control 40
|
||||
J2: data 1 mirror 1 pot 0 control 80
|
||||
J3: data 0 mirror 0 pot 0 control 80
|
||||
J4: data 1 mirror 1 pot 0 control 40
|
||||
J5: data 1 mirror 1 pot 0 control 80
|
||||
J6: data 0 mirror 0 pot 0 control 44
|
||||
J7: data 0 mirror 0 pot 0 control 84
|
||||
M0: data 0 mirror 0 control 06
|
||||
M1: data 0 mirror 0 control 06
|
||||
M2: data 1 mirror 1 control 06
|
||||
M3: data 1 mirror 1 control 06
|
||||
M4: data 0 mirror 1 control 06
|
||||
M5: data 0 mirror 0 control 00
|
||||
M6: data 0 mirror 0 control 86
|
||||
M7: data 0 mirror 0 control 00
|
9
models/bonw15/edk2.config
Normal file
9
models/bonw15/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/bonw15/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/bonw15/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/bonw15/me.rom
(Stored with Git LFS)
Normal file
BIN
models/bonw15/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/bonw15/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/bonw15/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10-b/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/darp10-b/IntelGopDriver.inf
Normal file
9
models/darp10-b/IntelGopDriver.inf
Normal file
@@ -0,0 +1,9 @@
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = IntelGopDriver
|
||||
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
|
||||
MODULE_TYPE = UEFI_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
[Binaries.X64]
|
||||
PE32|IntelGopDriver.efi|*
|
1
models/darp10-b/MeteorLakeFspBinPkg
Symbolic link
1
models/darp10-b/MeteorLakeFspBinPkg
Symbolic link
@@ -0,0 +1 @@
|
||||
../lemp13/MeteorLakeFspBinPkg
|
12
models/darp10-b/README.md
Normal file
12
models/darp10-b/README.md
Normal file
@@ -0,0 +1,12 @@
|
||||
# System76 Darter Pro (darp10-b)
|
||||
|
||||
## Contents
|
||||
|
||||
- [EC](./ec.rom)
|
||||
- *Read Error: No such file or directory (os error 2)*
|
||||
- [FD](./fd.rom)
|
||||
- Size: 16 KB
|
||||
- HAP: true
|
||||
- [ME](./me.rom)
|
||||
- Size: 10640 KB
|
||||
- Version: 18.0.5.2098
|
1
models/darp10-b/README.md.in
Normal file
1
models/darp10-b/README.md.in
Normal file
@@ -0,0 +1 @@
|
||||
# System76 Darter Pro (darp10-b)
|
1
models/darp10-b/chip.txt
Normal file
1
models/darp10-b/chip.txt
Normal file
@@ -0,0 +1 @@
|
||||
XM25QU256C
|
260
models/darp10-b/coreboot-collector.txt
Normal file
260
models/darp10-b/coreboot-collector.txt
Normal file
@@ -0,0 +1,260 @@
|
||||
## PCI ##
|
||||
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x7D01, Revision 0x04
|
||||
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x7D55, Revision 0x08
|
||||
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x7D03, Revision 0x04
|
||||
PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x7EC4, Revision 0x10
|
||||
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x7E4C, Revision 0x20
|
||||
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x7D0D, Revision 0x01
|
||||
PCI Device: 0000:00:0b.0: Class 0x00120000, Vendor 0x8086, Device 0x7D1D, Revision 0x04
|
||||
PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x7EC0, Revision 0x10
|
||||
PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x7EC2, Revision 0x10
|
||||
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0x7D0B, Revision 0x00
|
||||
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7E7D, Revision 0x20
|
||||
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7E7F, Revision 0x20
|
||||
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7E40, Revision 0x20
|
||||
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7E78, Revision 0x20
|
||||
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7E79, Revision 0x20
|
||||
PCI Device: 0000:00:15.3: Class 0x000C8000, Vendor 0x8086, Device 0x7E7B, Revision 0x20
|
||||
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7E70, Revision 0x20
|
||||
PCI Device: 0000:00:16.3: Class 0x00070002, Vendor 0x8086, Device 0x7E73, Revision 0x20
|
||||
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7E3D, Revision 0x20
|
||||
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7E02, Revision 0x20
|
||||
PCI Device: 0000:00:1f.3: Class 0x00040380, Vendor 0x8086, Device 0x7E28, Revision 0x20
|
||||
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7E22, Revision 0x20
|
||||
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7E23, Revision 0x20
|
||||
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x550A, Revision 0x20
|
||||
PCI Device: 0000:2b:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
||||
PCI Device: 10000:e0:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||
PCI Device: 10000:e0:06.2: Class 0x00060400, Vendor 0x8086, Device 0x7ECB, Revision 0x10
|
||||
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||
## GPIO ##
|
||||
MTL-H/U PCH
|
||||
GPP_V0 (0xD1,0x00) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V1 (0xD1,0x02) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V2 (0xD1,0x04) 0x40000702 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V3 (0xD1,0x06) 0x40000700 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V4 (0xD1,0x08) 0x40000702 0x0003c000 0x00000000 0x00000000
|
||||
GPP_V5 (0xD1,0x0A) 0x44000702 0x0003f018 0x00000000 0x00000000
|
||||
GPP_V6 (0xD1,0x0C) 0x44000702 0x0003fc19 0x00000000 0x00000000
|
||||
GPP_V7 (0xD1,0x0E) 0x44000702 0x0003fc1a 0x00000000 0x00000000
|
||||
GPP_V8 (0xD1,0x10) 0x44000702 0x0003f01b 0x00000000 0x00000000
|
||||
GPP_V9 (0xD1,0x12) 0x44000600 0x0003c01c 0x00000000 0x00000000
|
||||
GPP_V10 (0xD1,0x14) 0x44000600 0x0003c01d 0x00000000 0x00000000
|
||||
GPP_V11 (0xD1,0x16) 0x44000600 0x0003c01e 0x00000000 0x00000000
|
||||
GPP_V12 (0xD1,0x18) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_V13 (0xD1,0x1A) 0x44000600 0x0003c020 0x00000000 0x00000000
|
||||
GPP_V14 (0xD1,0x1C) 0x44000600 0x0003c021 0x00000000 0x00000000
|
||||
GPP_V15 (0xD1,0x1E) 0x44000600 0x0003c022 0x00000000 0x00000000
|
||||
GPP_V16 (0xD1,0x20) 0x44000600 0x0003c023 0x00000000 0x00000000
|
||||
GPP_V17 (0xD1,0x22) 0x44000602 0x0003c024 0x00000000 0x00000000
|
||||
GPP_V18 (0xD1,0x24) 0x44000200 0x00000025 0x00000000 0x00000000
|
||||
GPP_V19 (0xD1,0x26) 0x44000602 0x0003c026 0x00000000 0x00000000
|
||||
GPP_V20 (0xD1,0x28) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_V21 (0xD1,0x2A) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_V22 (0xD1,0x2C) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_V23 (0xD1,0x2E) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_C0 (0xD1,0x30) 0x44000600 0x0003c02b 0x00000000 0x00000000
|
||||
GPP_C1 (0xD1,0x32) 0x44000602 0x0003c02c 0x00000000 0x00000000
|
||||
GPP_C2 (0xD1,0x34) 0x44000600 0x0003c02d 0x00000000 0x00000000
|
||||
GPP_C3 (0xD1,0x36) 0x44000200 0x0003c02e 0x00000000 0x00000000
|
||||
GPP_C4 (0xD1,0x38) 0x44000200 0x0003c02f 0x00000000 0x00000000
|
||||
GPP_C5 (0xD1,0x3A) 0x44000702 0x0003f030 0x00000000 0x00000000
|
||||
GPP_C6 (0xD1,0x3C) 0x44000702 0x0003f031 0x00000000 0x00000000
|
||||
GPP_C7 (0xD1,0x3E) 0x44000200 0x00000032 0x00000800 0x00000000
|
||||
GPP_C8 (0xD1,0x40) 0x44000702 0x0003c033 0x00000000 0x00000000
|
||||
GPP_C9 (0xD1,0x42) 0x44000702 0x0003c034 0x00000000 0x00000000
|
||||
GPP_C10 (0xD1,0x44) 0x44000200 0x00000035 0x00000000 0x00000000
|
||||
GPP_C11 (0xD1,0x46) 0x04000702 0x0003c036 0x00000000 0x00000000
|
||||
GPP_C12 (0xD1,0x48) 0x04000702 0x0003c037 0x00000000 0x00000000
|
||||
GPP_C13 (0xD1,0x4A) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_C14 (0xD1,0x4C) 0x44000200 0x00000039 0x00000000 0x00000000
|
||||
GPP_C15 (0xD1,0x4E) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_C16 (0xD1,0x50) 0x44000702 0x0000003b 0x00000000 0x00000000
|
||||
GPP_C17 (0xD1,0x52) 0x44000702 0x0000003c 0x00000000 0x00000000
|
||||
GPP_C18 (0xD1,0x54) 0x44000200 0x0000003d 0x00000000 0x00000000
|
||||
GPP_C19 (0xD1,0x56) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_C20 (0xD1,0x58) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_C21 (0xD1,0x5A) 0x44000700 0x00024040 0x00000000 0x00000000
|
||||
GPP_C22 (0xD1,0x5C) 0x44000700 0x00024041 0x00000000 0x00000000
|
||||
GPP_C23 (0xD1,0x5E) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_A0 (0xD2,0x00) 0x44000700 0x0003f048 0x00000000 0x00000000
|
||||
GPP_A1 (0xD2,0x02) 0x44000702 0x0003f049 0x00000000 0x00000000
|
||||
GPP_A2 (0xD2,0x04) 0x44000700 0x0003f04a 0x00000000 0x00000000
|
||||
GPP_A3 (0xD2,0x06) 0x44000700 0x0003f04b 0x00000000 0x00000000
|
||||
GPP_A4 (0xD2,0x08) 0x44000700 0x0003f04c 0x00000000 0x00000000
|
||||
GPP_A5 (0xD2,0x0A) 0x44000700 0x0003f04d 0x00000000 0x00000000
|
||||
GPP_A6 (0xD2,0x0C) 0x44000700 0x0003c04e 0x00000000 0x00000000
|
||||
GPP_A7 (0xD2,0x0E) 0x44000200 0x0000004f 0x00000000 0x00000000
|
||||
GPP_A8 (0xD2,0x10) 0x44000200 0x00000050 0x00000000 0x00000000
|
||||
GPP_A9 (0xD2,0x12) 0x44000200 0x00000051 0x00000000 0x00000000
|
||||
GPP_A10 (0xD2,0x14) 0x44000200 0x00000052 0x00000000 0x00000000
|
||||
GPP_A11 (0xD2,0x16) 0x44000200 0x00000053 0x00000000 0x00000000
|
||||
GPP_A12 (0xD2,0x18) 0x44000102 0x00000054 0x00000000 0x00000000
|
||||
GPP_A13 (0xD2,0x1A) 0x84000201 0x00003055 0x00000000 0x00000000
|
||||
GPP_A14 (0xD2,0x1C) 0x44000200 0x00000056 0x00000000 0x00000000
|
||||
GPP_A15 (0xD2,0x1E) 0x44000200 0x00000057 0x00000000 0x00000000
|
||||
GPP_A16 (0xD2,0x20) 0x44000702 0x0003f058 0x00000000 0x00000000
|
||||
GPP_A17 (0xD2,0x22) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_A18 (0xD2,0x24) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_A19 (0xD2,0x26) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_A20 (0xD2,0x28) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_A21 (0xD2,0x2A) 0x44000702 0x0003fc5d 0x00000000 0x00000000
|
||||
GPP_E0 (0xD2,0x32) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_E1 (0xD2,0x34) 0x40100102 0x00003061 0x00000000 0x00000000
|
||||
GPP_E2 (0xD2,0x36) 0x44000102 0x00000062 0x00000000 0x00000000
|
||||
GPP_E3 (0xD2,0x38) 0x44000102 0x00000063 0x00000000 0x00000000
|
||||
GPP_E4 (0xD2,0x3A) 0x44000200 0x00000064 0x00000000 0x00000000
|
||||
GPP_E5 (0xD2,0x3C) 0x44000200 0x00000065 0x00000000 0x00000000
|
||||
GPP_E6 (0xD2,0x3E) 0x44000200 0x00000066 0x00000800 0x00000000
|
||||
GPP_E7 (0xD2,0x40) 0x44000200 0x00000067 0x00000000 0x00000000
|
||||
GPP_E8 (0xD2,0x42) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_E9 (0xD2,0x44) 0x44000102 0x00000069 0x00000800 0x00000000
|
||||
GPP_E10 (0xD2,0x46) 0x44000200 0x0000006a 0x00000000 0x00000000
|
||||
GPP_E11 (0xD2,0x48) 0x44000102 0x0000006b 0x00000000 0x00000000
|
||||
GPP_E12 (0xD2,0x4A) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_E13 (0xD2,0x4C) 0x44000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_E14 (0xD2,0x4E) 0x44000700 0x0002406e 0x00000000 0x00000000
|
||||
GPP_E15 (0xD2,0x50) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_E16 (0xD2,0x52) 0x44000b02 0x0003c070 0x00000000 0x00000000
|
||||
GPP_E17 (0xD2,0x54) 0x44000200 0x00000071 0x00000000 0x00000000
|
||||
GPP_E18 (0xD2,0x56) 0x44000200 0x00000072 0x00000000 0x00000000
|
||||
GPP_E19 (0xD2,0x58) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_E20 (0xD2,0x5A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||
GPP_E21 (0xD2,0x5C) 0x44000200 0x00000075 0x00000000 0x00000000
|
||||
GPP_E22 (0xD2,0x5E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_H0 (0xD3,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_H1 (0xD3,0x02) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_H2 (0xD3,0x04) 0x44000200 0x0000001a 0x00000000 0x00000000
|
||||
GPP_H3 (0xD3,0x06) 0x44000200 0x0000001b 0x00000000 0x00000000
|
||||
GPP_H4 (0xD3,0x08) 0x44000200 0x0000001c 0x00000000 0x00000000
|
||||
GPP_H5 (0xD3,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
|
||||
GPP_H6 (0xD3,0x0C) 0x44000600 0x0000001e 0x00000000 0x00000000
|
||||
GPP_H7 (0xD3,0x0E) 0x44000600 0x0000001f 0x00000000 0x00000000
|
||||
GPP_H8 (0xD3,0x10) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_H9 (0xD3,0x12) 0x44000200 0x00000021 0x00000000 0x00000000
|
||||
GPP_H10 (0xD3,0x14) 0x44000200 0x00000022 0x00000000 0x00000000
|
||||
GPP_H11 (0xD3,0x16) 0x44000200 0x00000023 0x00000000 0x00000000
|
||||
GPP_H12 (0xD3,0x18) 0x44000200 0x00000024 0x00000000 0x00000000
|
||||
GPP_H13 (0xD3,0x1A) 0x44000600 0x0003c025 0x00000000 0x00000000
|
||||
GPP_H14 (0xD3,0x1C) 0x44000200 0x00000026 0x00000000 0x00000000
|
||||
GPP_H15 (0xD3,0x1E) 0x44000200 0x00000027 0x00000000 0x00000000
|
||||
GPP_H16 (0xD3,0x20) 0x44000200 0x00000028 0x00000000 0x00000000
|
||||
GPP_H17 (0xD3,0x22) 0x44000200 0x00000029 0x00000000 0x00000000
|
||||
GPP_H18 (0xD3,0x24) 0x44000200 0x0000002a 0x00000000 0x00000000
|
||||
GPP_H19 (0xD3,0x26) 0x44000702 0x0000002b 0x00000000 0x00000000
|
||||
GPP_H20 (0xD3,0x28) 0x44000702 0x0000002c 0x00000000 0x00000000
|
||||
GPP_H21 (0xD3,0x2A) 0x44000702 0x0000002d 0x00000000 0x00000000
|
||||
GPP_H22 (0xD3,0x2C) 0x44000602 0x0000002e 0x00000000 0x00000000
|
||||
GPP_F0 (0xD3,0x34) 0x44000700 0x0003c030 0x00000000 0x00000000
|
||||
GPP_F1 (0xD3,0x36) 0x44000702 0x0003f031 0x00000000 0x00000000
|
||||
GPP_F2 (0xD3,0x38) 0x44000700 0x0003c032 0x00000000 0x00000000
|
||||
GPP_F3 (0xD3,0x3A) 0x44000702 0x0003f033 0x00000000 0x00000000
|
||||
GPP_F4 (0xD3,0x3C) 0x44000700 0x0003c034 0x00000000 0x00000000
|
||||
GPP_F5 (0xD3,0x3E) 0x44000d00 0x0003c035 0x00000000 0x00000000
|
||||
GPP_F6 (0xD3,0x40) 0x44000200 0x00000036 0x00000000 0x00000000
|
||||
GPP_F7 (0xD3,0x42) 0x44000200 0x00000037 0x00000000 0x00000000
|
||||
GPP_F8 (0xD3,0x44) 0x44000200 0x00000038 0x00000000 0x00000000
|
||||
GPP_F9 (0xD3,0x46) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||
GPP_F10 (0xD3,0x48) 0x44000200 0x0000003a 0x00000000 0x00000000
|
||||
GPP_F11 (0xD3,0x4A) 0x44000200 0x0000003b 0x00000000 0x00000000
|
||||
GPP_F12 (0xD3,0x4C) 0x44002102 0x0000003c 0x00000000 0x00000000
|
||||
GPP_F13 (0xD3,0x4E) 0x44002102 0x0000003d 0x00000000 0x00000000
|
||||
GPP_F14 (0xD3,0x50) 0x44000200 0x0000003e 0x00000000 0x00000000
|
||||
GPP_F15 (0xD3,0x52) 0x44000200 0x0000003f 0x00000000 0x00000000
|
||||
GPP_F16 (0xD3,0x54) 0x44000200 0x00000040 0x00000000 0x00000000
|
||||
GPP_F17 (0xD3,0x56) 0x44000200 0x00000041 0x00000000 0x00000000
|
||||
GPP_F18 (0xD3,0x58) 0x44000200 0x00000042 0x00000000 0x00000000
|
||||
GPP_F19 (0xD3,0x5A) 0x44000200 0x00000043 0x00000000 0x00000000
|
||||
GPP_F20 (0xD3,0x5C) 0x44000200 0x00000044 0x00000000 0x00000000
|
||||
GPP_F21 (0xD3,0x5E) 0x44000200 0x00000045 0x00000800 0x00000000
|
||||
GPP_F22 (0xD3,0x60) 0x44000200 0x00000046 0x00000000 0x00000000
|
||||
GPP_F23 (0xD3,0x62) 0x44000200 0x00000047 0x00000000 0x00000000
|
||||
GPP_S0 (0xD4,0x00) 0x44000200 0x01800050 0x00000000 0x00000000
|
||||
GPP_S1 (0xD4,0x02) 0x44000200 0x01800051 0x00000000 0x00000000
|
||||
GPP_S2 (0xD4,0x04) 0x44000200 0x01800052 0x00000000 0x00000000
|
||||
GPP_S3 (0xD4,0x06) 0x44000200 0x01800053 0x00000000 0x00000000
|
||||
GPP_S4 (0xD4,0x08) 0x44000200 0x01800054 0x00000000 0x00000000
|
||||
GPP_S5 (0xD4,0x0A) 0x44000200 0x01800055 0x00000000 0x00000000
|
||||
GPP_S6 (0xD4,0x0C) 0x44000200 0x01800056 0x00000000 0x00000000
|
||||
GPP_S7 (0xD4,0x0E) 0x44000200 0x01800057 0x00000000 0x00000000
|
||||
GPP_B0 (0xD5,0x00) 0x80800102 0x00000058 0x00000000 0x00000000
|
||||
GPP_B1 (0xD5,0x02) 0x44000200 0x00000059 0x00000000 0x00000000
|
||||
GPP_B2 (0xD5,0x04) 0x44000200 0x0000005a 0x00000000 0x00000000
|
||||
GPP_B3 (0xD5,0x06) 0x44000200 0x0000005b 0x00000000 0x00000000
|
||||
GPP_B4 (0xD5,0x08) 0x44000200 0x0000005c 0x00000000 0x00000000
|
||||
GPP_B5 (0xD5,0x0A) 0x44000200 0x0000005d 0x00000000 0x00000000
|
||||
GPP_B6 (0xD5,0x0C) 0x44000200 0x0000005e 0x00000000 0x00000000
|
||||
GPP_B7 (0xD5,0x0E) 0x44000200 0x0000005f 0x00000000 0x00000000
|
||||
GPP_B8 (0xD5,0x10) 0x44000200 0x00000060 0x00000000 0x00000000
|
||||
GPP_B9 (0xD5,0x12) 0x44000200 0x00000061 0x00000000 0x00000000
|
||||
GPP_B10 (0xD5,0x14) 0x44000200 0x00000062 0x00000000 0x00000000
|
||||
GPP_B11 (0xD5,0x16) 0x44000b02 0x00024063 0x00000000 0x00000000
|
||||
GPP_B12 (0xD5,0x18) 0x44000700 0x0003c064 0x00000000 0x00000000
|
||||
GPP_B13 (0xD5,0x1A) 0x44000700 0x0003c065 0x00000000 0x00000000
|
||||
GPP_B14 (0xD5,0x1C) 0x44000102 0x00000066 0x00000000 0x00000000
|
||||
GPP_B15 (0xD5,0x1E) 0x44000102 0x00000067 0x00000000 0x00000000
|
||||
GPP_B16 (0xD5,0x20) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||
GPP_B17 (0xD5,0x22) 0x44000200 0x00000069 0x00000000 0x00000000
|
||||
GPP_B18 (0xD5,0x24) 0x44000201 0x0000006a 0x00000000 0x00000000
|
||||
GPP_B19 (0xD5,0x26) 0x44000201 0x0000006b 0x00000000 0x00000000
|
||||
GPP_B20 (0xD5,0x28) 0x44000200 0x0000006c 0x00000000 0x00000000
|
||||
GPP_B21 (0xD5,0x2A) 0x84000200 0x0000006d 0x00000000 0x00000000
|
||||
GPP_B22 (0xD5,0x2C) 0x44000200 0x0000006e 0x00000000 0x00000000
|
||||
GPP_B23 (0xD5,0x2E) 0x44000200 0x0000006f 0x00000000 0x00000000
|
||||
GPP_D0 (0xD5,0x32) 0x44000201 0x00000070 0x00000000 0x00000000
|
||||
GPP_D1 (0xD5,0x34) 0x44000201 0x00000071 0x00000000 0x00000000
|
||||
GPP_D2 (0xD5,0x36) 0x44000201 0x00000072 0x00000000 0x00000000
|
||||
GPP_D3 (0xD5,0x38) 0x44000200 0x00000073 0x00000000 0x00000000
|
||||
GPP_D4 (0xD5,0x3A) 0x44000200 0x00000074 0x00000000 0x00000000
|
||||
GPP_D5 (0xD5,0x3C) 0x44000201 0x00000075 0x00000000 0x00000000
|
||||
GPP_D6 (0xD5,0x3E) 0x44000200 0x00000076 0x00000000 0x00000000
|
||||
GPP_D7 (0xD5,0x40) 0x44000200 0x00000077 0x00000000 0x00000000
|
||||
GPP_D8 (0xD5,0x42) 0x44000200 0x00000018 0x00000000 0x00000000
|
||||
GPP_D9 (0xD5,0x44) 0x44000200 0x00000019 0x00000000 0x00000000
|
||||
GPP_D10 (0xD5,0x46) 0x44000600 0x0003c01a 0x00000000 0x00000000
|
||||
GPP_D11 (0xD5,0x48) 0x44000700 0x0003fc1b 0x00000000 0x00000000
|
||||
GPP_D12 (0xD5,0x4A) 0x44000600 0x0003fc1c 0x00000000 0x00000000
|
||||
GPP_D13 (0xD5,0x4C) 0x44000700 0x0003fc1d 0x00000000 0x00000000
|
||||
GPP_D14 (0xD5,0x4E) 0x44000200 0x0000001e 0x00000000 0x00000000
|
||||
GPP_D15 (0xD5,0x50) 0x44000200 0x0000001f 0x00000000 0x00000000
|
||||
GPP_D16 (0xD5,0x52) 0x44000200 0x00000020 0x00000000 0x00000000
|
||||
GPP_D17 (0xD5,0x54) 0x44000700 0x0003c021 0x00000000 0x00000000
|
||||
GPP_D18 (0xD5,0x56) 0x44000700 0x00000022 0x00000000 0x00000000
|
||||
GPP_D19 (0xD5,0x58) 0x44000700 0x00000023 0x00000000 0x00000000
|
||||
GPP_D20 (0xD5,0x5A) 0x44000702 0x00000024 0x00000000 0x00000000
|
||||
GPP_D21 (0xD5,0x5C) 0x44000b02 0x00000025 0x00000000 0x00000000
|
||||
GPP_D22 (0xD5,0x5E) 0x44000700 0x0003fc26 0x00000000 0x00000000
|
||||
GPP_D23 (0xD5,0x60) 0x44000702 0x0003fc27 0x00000000 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC245
|
||||
vendor_id: 0x10ec0245
|
||||
subsystem_id: 0x1558a743
|
||||
revision_id: 0x100001
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x17: 0x411111f0
|
||||
0x18: 0x411111f0
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x40789b2d
|
||||
0x1e: 0x411111f0
|
||||
0x21: 0x04211020
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Meteor Lake HDMI
|
||||
vendor_id: 0x8086281d
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x04: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x08: 0x18560010
|
||||
0x0a: 0x18560010
|
||||
0x0b: 0x18560010
|
||||
0x0c: 0x18560010
|
||||
0x0d: 0x18560010
|
||||
0x0e: 0x18560010
|
||||
0x0f: 0x18560010
|
26
models/darp10-b/coreboot.config
Normal file
26
models/darp10-b/coreboot.config
Normal file
@@ -0,0 +1,26 @@
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
CONFIG_BOARD_SYSTEM76_DARP10_B=y
|
||||
CONFIG_CCACHE=y
|
||||
CONFIG_CONSOLE_SERIAL=n
|
||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_POST_IO=n
|
||||
CONFIG_SMMSTORE=y
|
||||
CONFIG_SMMSTORE_V2=y
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||
|
||||
# Custom FSP
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_FULL_FD=y
|
||||
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/MeteorLakeFspBinPkg/Include"
|
1
models/darp10-b/ec.config
Normal file
1
models/darp10-b/ec.config
Normal file
@@ -0,0 +1 @@
|
||||
BOARD=system76/darp10-b
|
113
models/darp10-b/ecspy.txt
Normal file
113
models/darp10-b/ecspy.txt
Normal file
@@ -0,0 +1,113 @@
|
||||
id 5570 rev 7
|
||||
A0: data 1 mirror 1 pot 0 control 80
|
||||
A1: data 1 mirror 1 pot 0 control 80
|
||||
A2: data 0 mirror 0 pot 0 control 00
|
||||
A3: data 0 mirror 0 pot 0 control 00
|
||||
A4: data 1 mirror 1 pot 0 control 80
|
||||
A5: data 0 mirror 0 pot 0 control 00
|
||||
A6: data 0 mirror 0 pot 0 control 00
|
||||
A7: data 0 mirror 0 pot 0 control 00
|
||||
B0: data 0 mirror 0 pot 0 control 84
|
||||
B1: data 1 mirror 1 pot 0 control 84
|
||||
B2: data 1 mirror 1 pot 0 control 84
|
||||
B3: data 1 mirror 1 pot 0 control 80
|
||||
B4: data 1 mirror 1 pot 0 control 40
|
||||
B5: data 1 mirror 1 pot 0 control 80
|
||||
B6: data 1 mirror 1 pot 0 control 40
|
||||
B7: data 1 mirror 1 pot 0 control 80
|
||||
C0: data 1 mirror 1 pot 0 control 80
|
||||
C1: data 1 mirror 1 pot 0 control 04
|
||||
C2: data 1 mirror 1 pot 0 control 04
|
||||
C3: data 0 mirror 0 pot 0 control 04
|
||||
C4: data 0 mirror 0 pot 0 control 84
|
||||
C5: data 0 mirror 0 pot 0 control 04
|
||||
C6: data 0 mirror 0 pot 0 control 80
|
||||
C7: data 1 mirror 1 pot 0 control 44
|
||||
D0: data 1 mirror 1 pot 0 control 40
|
||||
D1: data 1 mirror 1 pot 0 control 44
|
||||
D2: data 1 mirror 1 pot 0 control 00
|
||||
D3: data 1 mirror 1 pot 0 control 80
|
||||
D4: data 1 mirror 1 pot 0 control 40
|
||||
D5: data 1 mirror 1 pot 0 control 40
|
||||
D6: data 1 mirror 1 pot 0 control 02
|
||||
D7: data 1 mirror 1 pot 0 control 02
|
||||
E0: data 1 mirror 1 pot 0 control 04
|
||||
E1: data 1 mirror 1 pot 0 control 40
|
||||
E2: data 1 mirror 1 pot 0 control 80
|
||||
E3: data 1 mirror 1 pot 0 control 44
|
||||
E4: data 1 mirror 1 pot 0 control 40
|
||||
E5: data 1 mirror 1 pot 0 control 40
|
||||
E6: data 0 mirror 0 pot 0 control 80
|
||||
E7: data 1 mirror 1 pot 0 control 04
|
||||
F0: data 0 mirror 0 pot 0 control 44
|
||||
F1: data 1 mirror 1 pot 0 control 40
|
||||
F2: data 1 mirror 1 pot 0 control 44
|
||||
F3: data 1 mirror 1 pot 0 control 44
|
||||
F4: data 1 mirror 1 pot 0 control 04
|
||||
F5: data 1 mirror 1 pot 0 control 04
|
||||
F6: data 0 mirror 0 pot 0 control 00
|
||||
F7: data 1 mirror 1 pot 1 control 44
|
||||
G0: data 1 mirror 1 pot 0 control 80
|
||||
G1: data 1 mirror 1 pot 0 control 80
|
||||
G2: data 1 mirror 1 pot 0 control 80
|
||||
G3: data 0 mirror 0 pot 0 control 00
|
||||
G4: data 0 mirror 0 pot 0 control 00
|
||||
G5: data 0 mirror 0 pot 0 control 00
|
||||
G6: data 0 mirror 0 pot 0 control 40
|
||||
G7: data 0 mirror 0 pot 0 control 00
|
||||
H0: data 1 mirror 1 pot 0 control 80
|
||||
H1: data 1 mirror 1 pot 0 control 80
|
||||
H2: data 0 mirror 0 pot 0 control 44
|
||||
H3: data 1 mirror 1 pot 0 control 80
|
||||
H4: data 1 mirror 1 pot 0 control 80
|
||||
H5: data 0 mirror 0 pot 0 control 40
|
||||
H6: data 1 mirror 1 pot 0 control 80
|
||||
H7: data 1 mirror 1 pot 0 control 80
|
||||
I0: data 0 mirror 0 pot 0 control 00
|
||||
I1: data 0 mirror 0 pot 0 control 00
|
||||
I2: data 1 mirror 1 pot 0 control 84
|
||||
I3: data 0 mirror 0 pot 0 control 00
|
||||
I4: data 0 mirror 0 pot 0 control 00
|
||||
I5: data 0 mirror 0 pot 0 control 40
|
||||
I6: data 0 mirror 0 pot 0 control 00
|
||||
I7: data 0 mirror 0 pot 0 control 00
|
||||
J0: data 1 mirror 1 pot 0 control 40
|
||||
J1: data 1 mirror 1 pot 0 control 40
|
||||
J2: data 0 mirror 0 pot 0 control 00
|
||||
J3: data 0 mirror 0 pot 0 control 80
|
||||
J4: data 1 mirror 1 pot 0 control 40
|
||||
J5: data 0 mirror 0 pot 0 control 80
|
||||
J6: data 0 mirror 0 pot 0 control 44
|
||||
J7: data 0 mirror 0 pot 0 control 84
|
||||
M0: data 1 mirror 1 control 06
|
||||
M1: data 1 mirror 1 control 06
|
||||
M2: data 1 mirror 1 control 06
|
||||
M3: data 1 mirror 1 control 06
|
||||
M4: data 1 mirror 1 control 06
|
||||
M5: data 0 mirror 0 control 00
|
||||
M6: data 1 mirror 1 control 86
|
||||
M7: data 0 mirror 0 control 00
|
||||
GCR: 0x04
|
||||
GCR1: 0x00
|
||||
GCR2: 0x00
|
||||
GCR3: 0x40
|
||||
GCR4: 0x00
|
||||
GCR5: 0x00
|
||||
GCR6: 0x00
|
||||
GCR7: 0x00
|
||||
GCR8: 0x10
|
||||
GCR9: 0x20
|
||||
GCR10: 0x02
|
||||
GCR11: 0x00
|
||||
GCR12: 0x00
|
||||
GCR13: 0x00
|
||||
GCR14: 0x00
|
||||
GCR15: 0x10
|
||||
GCR16: 0x00
|
||||
GCR17: 0x00
|
||||
GCR18: 0x00
|
||||
GCR19: 0x81
|
||||
GCR20: 0x80
|
||||
GCR21: 0x66
|
||||
GCR22: 0x80
|
||||
GCR23: 0x01
|
9
models/darp10-b/edk2.config
Normal file
9
models/darp10-b/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
||||
BOOTLOADER=COREBOOT
|
||||
DISABLE_SERIAL_TERMINAL=TRUE
|
||||
PLATFORM_BOOT_TIMEOUT=2
|
||||
PS2_KEYBOARD_ENABLE=TRUE
|
||||
SECURE_BOOT_ENABLE=TRUE
|
||||
SERIAL_DRIVER_ENABLE=FALSE
|
||||
SHELL_TYPE=NONE
|
||||
TPM_ENABLE=TRUE
|
||||
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp10-b/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp10-b/gbe.rom
(Stored with Git LFS)
Normal file
BIN
models/darp10-b/gbe.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user