254 Commits

Author SHA1 Message Date
Tim Crawford
1d973574fe scripts: Version EC separately from SBIOS
The original rationale for having the EC version match the SBIOS version
was to ensure that compatible versions of each were installed. So we set
the EC version to the SBIOS version and always flash both of them, even
if only one actually changed.

At some point, a mechanism should be implemented that checks for a
minimum supported/compatible version. This would be comparable to the
LVFS MetaInfo's "requires" field.

Ref: f4f4d5b61d ("Build EC as a submodule, specifying version")
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 18:36:04 -07:00
Tim Crawford
7a2d4da31f docs: Move info from README to docs/
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:22:54 -07:00
Tim Crawford
cab3891487 docs: Build with mdBook
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:22:54 -07:00
Tim Crawford
6407caab03 edk2: Fix building with GCC 11+
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:13:10 -07:00
Tim Crawford
b2416c4d01 Update coreboot to 24.02
Since 4.19-based releases took so long, we are already at the next
coreboot release. Update to this release for the slew of MTL fixes.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:13:10 -07:00
Tim Crawford
77581d11fc models: Remove generated C files
These files are generated while running proprietary firmware, but once
they are added to coreboot they are no longer needed. They also quickly
become stale as the files are always changed in coreboot.

    find models/ -name gpio.h -exec rm {} \;
    find models/ -name hda_verb.c -exec rm {} \;

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:10:55 -07:00
Tim Crawford
e4960f163e scipts: Add the HDA reset verb to the generated file
I always add HDA reset to the coreboot file when upstreaming, so just
have the script do it.

- Proprietary firmware does it
- It fixed audio init on oryp5

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:10:55 -07:00
Tim Crawford
c4b9a727c4 scripts: Update GPIO file generated for coreboot
The use of `gpio.h` has been replaced with `gpio.c` for a while.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-28 13:10:55 -07:00
Tim Crawford
269b537c00 docs: Update note about coreboot config
The whole coreboot generated `.config` has not been used since
ff0a27ad9c ("Use defconfig to generate .config"). The required
`coreboot.config` is much simpler now and can usually just be copied
from another model.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-21 07:35:52 -07:00
Tim Crawford
7d5a50d26b Remove devicetree script
This script is stale. It hasn't worked since TGL and only produced a few
useful values. The format of devicetree.cb also continues to change with
each SoC generation.

The removal of devmem2 should also fix setup on Debian, which does not
package it.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-21 07:35:52 -07:00
Tim Crawford
85896eca39 jenkins: Sync submodules
Always sync submodules before the SCM step to handle coreboot adding
new submodules. This is needed because coreboot uses relative paths for
submodules, so git tries to clone it from the System76 GitHub
organization. We are not mirroring submodules and want to clone from
gerrit.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-05 11:02:11 -07:00
Tim Crawford
1cbe7576ee Remove old RPL FSPs
Remove the local copy of the RPL FSPs as they are no longer used.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-05 11:02:11 -07:00
Tim Crawford
4618f2b0ed Update coreboot to 4.22
As part of this, the RPL boards now use the client FSP release from
Intel's public repo [1].

[1]: https://github.com/intel/fsp

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-05 11:02:11 -07:00
Tim Crawford
3812485a04 scripts: Make FIRMWARE_OPEN_MODEL_DIR relative
coreboot expects paths to be relative to it, and vboot breaks include
paths that are absolute. Fixes compilation failing due to the addition
of `-Wmissing-include-dirs`.

Ref: https://review.coreboot.org/c/coreboot/+/70251
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-02-05 11:02:11 -07:00
Tim Crawford
3e19b73397 darp9: Add SSD RTD3 configs
Fixes suspend with the following drives:

- Kingston KC3000 (SKC3000D/4096G)
- Kingston HyperX (SHPM2280P2H/240G)
- Solidigm P44 Pro (SSDPFKKW010X7)

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-01-18 14:39:29 -07:00
Tim Crawford
6c402c3e17 darp8,darp9: Use S0ix by default
Avoid the issue on new boards where the PCH will not de-assert the
`PLTRST#` virtual wire on S3 resume, causing the unit to hang.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2024-01-10 14:06:47 -07:00
Tim Crawford
6f1e65308e docs: Update note about Secure Boot support
Secure Boot support is enabled. Make it clear in the doc that it was
enabled so Windows could be installed, and not as a means for securing
the system.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-12-12 11:45:08 -07:00
Tim Crawford
2e4e34bf83 coreboot: Fix bonw15, oryp11 speaker output
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-20 15:06:52 -06:00
Tim Crawford
968a612824 scripts: Address shellcheck issues
Report issues by shell files with:

    git ls-files '*.sh' | xargs shellcheck --exclude=SC2162

Address the following:

- SC1087: Use braces when expanding arrays
- SC1091: Not following
- SC2004: `$`/`${}` is unnecessary on arithmetic variables
- SC2024: `sudo` doesn't affect redirects
- SC2034: foo appears unused. Verify it or export it
- SC2086: Double quote to prevent globbing and word splitting
- SC2087: Quote `EOF`
- SC2115: Use `"${var:?}"` to ensure this never expands to `/*`
- SC2148: Add a shebang

Addresses (at least partially) some POSIX/dash issues:

- SC2113: `function` keyword is non-standard
- SC3010: In POSIX sh, `[[` `]]` is undefined
- SC3014: In POSIX sh, `==` in place of `=` is undefined
- SC3020: In POSIX sh, `&>` is undefined
- SC3046: In POSIX sh, `source` in place of `.` is undefined

Does not address:

- SC2162: `read` without `-r` will mangle backslashes
- Any other POSIX/dash-specific issues

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-19 14:45:22 -06:00
Tim Crawford
aa32ba26e1 coreboot: Fix LTR for card reader on TGL-U boards
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-19 08:08:52 -06:00
Tim Crawford
38b6bdc6e9 Update Rust apps for new toolchain
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-19 08:08:11 -06:00
Tim Crawford
48079c3de2 Update Rust toolchain to 2023-09-07
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-19 08:08:11 -06:00
Tim Crawford
b379c94b76 Split building coreboot toolchains to a separate file
Specify dependencies specifically for building coreboot toolchains in
the file, so they are not conflated with the dependencies required for
building firmware-open.

Remove building the toolchain when building firmware, so that the new
script is the single source for building coreboot toolchains.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-19 08:08:02 -06:00
Tim Crawford
5fb1624187 Set and use XGCCPATH
Allow overriding the coreboot toolchain location with `XGCCPATH` so
that xgcc can be installed to a separate location, such as `/opt`.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-19 08:07:39 -06:00
Tim Crawford
5d997d1c41 coreboot: Fix OZ711LV2 LTR for galp5 3050 variant
Fix programming the LTR so that CPU can reach C-states deeper than C2.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-13 11:30:05 -06:00
Tim Crawford
c1dafbbfad scripts: Always set EC build dir
Building EC was broken as the build output from the previous board was
not being cleaned. `BUILD` is now always set, defaulting to "build",
instead of only when `BOARD` is specified. For good measure, add it
to the clean command in case a custom path is used.

Fixes: 569321f9ac ("scripts: Set EC build dir")
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-12 13:27:55 -06:00
Tim Crawford
c4df2f4005 ec: Fix lock up during opportunistic suspend
Fix a potential lock up during S0ix opportunistic suspend, caused by
waiting indefinitely for a PECI command to complete when it is not
available.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-12 09:36:10 -06:00
Tim Crawford
569321f9ac scripts: Set EC build dir
Specify the EC build directory so that it does not require the model or
version to be determined in the script.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-11 19:05:16 -06:00
Tim Crawford
b22e8dee41 scripts: Split installing Rust to its own script
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-03 14:04:54 -06:00
Tim Crawford
51e3e1a53a Jenkins: Misc changes
- Use `GIT_COMMIT` instead of stashing the commit
- Do not shadow built-in `GIT_BRANCH` variable with a parameter
- Update `scmGit` config based on docs

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-10-02 09:51:15 -06:00
Tim Crawford
16ef69cb45 coreboot: rpl-hx: Add support for 5600 MHz RAM
Allow using 5600 MHz RAM on addw3, bonw15, and serw13.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-09-19 14:49:54 -06:00
Tim Crawford
42bf7a65d9 Update coreboot and ec
- coreboot: Fixed SMMSTORE init sometimes failing
- ec: Increased key debounce from 5ms to 10ms

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-09-08 16:52:38 -04:00
Tim Crawford
5a9565a684 adl: Update CSME to 16.1.25.2124
Generate new CSME images from ADL-P MR5 BKC (Kit 766225).

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-09-07 10:34:31 -06:00
Tim Crawford
52f6d72713 docs: Add note about checking CSME state
I had forgotten that CSME reporting an error was normal when disabled.
Document what is should report when enabled/disabled.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-09-07 10:24:10 -04:00
Tim Crawford
5844541031 jenkins: Add build duration to Slack notifications
The scripted projects using the default Slack notifications settings
report the time the build took. Add it to the declarative jobs as well.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-30 16:46:30 -04:00
Jeremy Soller
81731199f2 Update coreboot and changelog 2023-08-23 14:04:40 -06:00
Tim Crawford
a8dd6c2c0b Update ec
- Changed battery charge start threshold to 90%
- Changed charger to disable when battery is full

These are made in response to Clevo's request for changes. The battery
now defaults to a charge-discharge cycle of 90-100% capacity instead of
always charging to 100%.

It is possible to force charging by setting the start threshold to 0, or
by resetting the EC (power off and unplug).

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-18 14:47:58 -06:00
Tim Crawford
38c7019286 Update coreboot
- Fixed CPU not going lower than C2 due to card reader LTR

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-18 14:47:58 -06:00
Tim Crawford
13dd3a4d86 Fix Jenkinsfile
Misc fixes to the Jenkinsfile that came up while setting up the new
Pipeline job on the build server.

The polling schedule is removed from the trigger because it was always
detecting a change and building.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-15 07:09:09 -06:00
Tim Crawford
616b2bfe7b scripts: Don't run git-lfs commands on CI
The `deps.sh` script needs to be run to set up a new Jenkins workspace.
The git-lfs commands fail with:

    mkdir /dev/null: not a directory
    To resolve this, either:
      1: run `git lfs update --manual` for instructions on how to merge hooks.
      2: run `git lfs update --force` to overwrite your hook.

Just don't run them, since Jenkins is configured to perform the LFS pull
when fetching the repo.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-15 07:09:09 -06:00
Tim Crawford
1d881de90c Add Jenkinsfile for Pipeline
This attempts to match the existing configuration of the firmware-open
project in Jenkins.

The curl command is constructed from the GitHub docs to submit the
commit status [1].

[1]: https://docs.github.com/en/rest/commits/statuses#create-a-commit-status

Ref: https://www.jenkins.io/doc/book/pipeline/
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-12 07:22:13 -06:00
Jacob Kauffmann
55c071e4f1 fix (docs): Update link to EC debugging 2023-08-10 09:34:33 -06:00
Tim Crawford
b9622a661a coreboot: Fix Bluetooth performance on TGL
- Enable `CnviBtAudioOffload` to fix issues with BT

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-09 09:23:16 -06:00
Tim Crawford
0e01b365ae Remove libs/
These are at best a convenience for working on them. They are not used
directly by firmware-open, only as dependencies in other projects.

- coreboot-table: Dependency of apps/firmware-setup
- coreboot-fs: Dependency of apps/firmware-update and libs/intel-spi
- intel-spi: Dependency of apps/firmware-update
- intelfash: Dependency of apps/firmware-update and scripts/modeltool
- uefi: Dependency of a lot of stuff

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-04 12:04:42 -06:00
Tim Crawford
0a210cd297 Update Rust toolchain to nightly-2023-01-21
All components have been updated to this version.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-04 11:59:08 -06:00
Tim Crawford
fcd8132165 Remove MinPlatform support
MinPlatform was only ever used for the KBL boards, and they no longer
build from this repo.

It is still possible to build coreboot-based firmware for KBL boards.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-04 11:41:26 -06:00
Tim Crawford
6a0eab38db changelog: Add section for 2023-07-19
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-03 17:01:09 -06:00
Tim Crawford
c90cf2f0f1 Remove firmware-smmstore
firmware-smmstore is a Rust-based application for compacting SMMSTOREv1,
which we no longer use. After commit af955613e0 ("models: Enable
SMMSTOREv2 in coreboot") it is no longer needed.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-03 12:04:47 -06:00
Tim Crawford
64aa0e3160 Remove script for reading SMMSTOREv1
commit af955613e0 ("models: Enable SMMSTOREv2 in coreboot") switched
us from SMMSTOREv1 to SMMSTOREv2. This script is no longer useful.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-03 12:04:47 -06:00
Tim Crawford
ec529daaff Update EC
- Added KBC reset on CPU reset to prevent keyboard from being locked
- Enabled power switch Watch Dog Timer with a timeout of 10 seconds
- Improved keyboard scan logic (no user-visible changes)
- Fixed detecting if PECI is available on eSPI systems using S0ix
- Added support for a FnLock key

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-01 14:41:49 -06:00
Tim Crawford
5d581d61fd Update coreboot
- Fixed boot failing at FSP-S due to missing file
- Enabled C10 reporting on systems using eSPI

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-08-01 14:40:01 -06:00
Aaron Honeycutt
4b4eafd7d0 Update RPL boards in FEATURES
Add the release dates for the remaining RPL boards and update the addw3
release for the Windows 11 BSOD fix.
2023-07-20 10:43:17 -06:00
Tim Crawford
05cfb1a60f Update firmware-update
- Defer unlock prompt until update is accepted

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-07-19 19:09:52 -06:00
Tim Crawford
848c28ab29 Update ec
- Reduce key debounce from 15ms to 5ms
- galp6: Fix fan tachometer GPIOs
- lemp9: Fix fan tachometer GPIOs
- lemp10: Fix fan tachometer GPIOs
- lemp11: Fix fan tachometer GPIOs

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-07-19 19:09:52 -06:00
Tim Crawford
6e3e62dcc0 Update coreboot
- gaze17,oryp10: Remove invalid RTD3 configs
- galp8,lemp11: Remove RTD3 config from SATA port

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-07-19 19:09:52 -06:00
Tim Crawford
0b441d4148 changelog: Fix entries
Fix release dates and remove changes that occurred before the initial
release.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-07-19 19:09:52 -06:00
Tim Crawford
200ddc0087 Update coreboot
- Leave TBT LSX0 as FSP configured
- Select CBFS SMBIOS hooks
- Hook up microcode for CML-S
- Move RPL-HX power limits to correct file

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-07-17 08:38:57 -06:00
Jeremy Soller
0e4a64a174 Prepare for release 2023-07-10 12:42:59 -06:00
Jeremy Soller
8e24a60c88 Update coreboot, ec, and changelog 2023-07-06 13:45:36 -06:00
Tim Crawford
728361d458 edk2: Update Secure Boot DBX to version 371
DBX version 371 was released on 2023-05-09.

Ref: https://uefi.org/revocationlistfile
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-27 09:24:21 -06:00
Tim Crawford
e5c3632a2a Update coreboot and ec
coreboot:

- addw3: Enable support for 5200 MT/s memory
- bonw15: Enable support for 5200 MT/s memory
- serw13: Enable support for 5200 MT/s memory
- rpl: Enable TPM read delay to fix occasional failures with Infineon chips
- Perform TPM Restart if TPM Resume fails

ec:

- darp9: Converted to new keyboard
- oryp11: Added new keyboard
- Acknowledge PECI-over-eSPI transactions when finished

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-22 09:47:50 -06:00
Jeremy Soller
36c78ea003 Update submodules and changelog 2023-06-08 15:36:45 -06:00
Tim Crawford
a8590a5986 ec: Fix darp9 USB-C power
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-08 12:51:19 -06:00
Tim Crawford
f903877cfb scripts: Disable showing signature when getting date
Fixes building when `log.showSignature` is enabled.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-08 11:06:44 -06:00
Tim Crawford
d60e4ae5df firmware-update: Update for darp9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-07 17:31:14 -06:00
Tim Crawford
e46352ae91 darp9: Update CSME
- Disable Boot Guard
- Disable PTT
- Disable locking the descriptor

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-07 17:31:14 -06:00
Tim Crawford
932433c214 darp9: Add Darter Pro 9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-06-07 17:31:14 -06:00
Tim Crawford
5608a8df7e galp6,galp7: Decrease PL4 on AC to 65W
Avoid overdraw with external devices attached by limiting PL4 well below
what the provided chargers can handle (90W).

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-25 14:52:04 -06:00
Tim Crawford
f527a7a273 scripts: Allow additional EC configs
Modify the build script to allow setting additional EC configs, similar
to how edk2 is done.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-24 08:58:28 -06:00
Tim Crawford
39af7165e4 scripts: Force submodule checkout
Some coreboot submodules have their update strategy set to "none". They
will not be cloned/updated unless `--checkout` is specified.

Fixes building after cloning firmware-open and running `deps.sh`.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-23 09:59:04 -06:00
Tim Crawford
aa4a52b1cb ec: Update for galp7
This brings in the following changes:

- Set PL4 based on AC state for all boards
- Increase PL4 on battery to 45W for dGPU boards
- galp6,galp7: Enable firmware security

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-22 15:48:20 -06:00
Jeremy Soller
900c6e015f FEATURES: sort generations from newest to oldest (#417) 2023-05-22 11:57:12 -06:00
Jeremy Soller
153686aba6 Add feature matrix 2023-05-22 11:22:56 -06:00
Jeremy Soller
9560b2e4b7 New release to fix BSoD on RPL-HX 2023-05-17 14:44:59 -06:00
Jeremy Soller
40b70678e8 Update coreboot and changelog 2023-05-17 10:53:52 -06:00
Jeremy Soller
e9b9ea856d New release 2023-05-16 19:24:33 -06:00
Jeremy Soller
7c4ccc2618 Add lemp12 2023-05-16 19:06:12 -06:00
Tim Crawford
d3db6fc8c0 Update gop-policy
Update the submodule to use the same Rust toolchain as other apps.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-09 14:45:32 -06:00
Tim Crawford
c2b2db2b06 galp7: Update CSME
- Disable Boot Guard
- Disable PTT
- Disable locking the descriptor

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-09 14:45:32 -06:00
Tim Crawford
5f8ed7c053 galp7: Add Galago Pro 7
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-05-09 14:45:32 -06:00
Jeremy Soller
a220704f8c Update coreboot 2023-04-28 11:54:28 -06:00
Ian Douglas Scott
c7d7e9c0af Merge pull request #411 from dumbinacan/master
fixed flag for pacman --noconfirm
2023-04-27 13:29:38 -07:00
marco
ff95dd03ab fixed flag for pacman --noconfirm 2023-04-24 13:01:07 -04:00
Jeremy Soller
dfd1b73117 Update firmware-setup and firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
0c71c297f0 Update changelog 2023-04-03 13:23:12 -06:00
Jeremy Soller
a0b48dacd0 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
0c230fd36c Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
ce8760648d Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
6d9d089493 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
ffc450d1be Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
81c3653d7a Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
469f120c23 Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
4b4084d666 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
72419024d8 Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
c833505e44 Update firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
cf836c0f57 Update coreboot, ec, and bonw15 config 2023-04-03 13:23:12 -06:00
Tim Crawford
9b92e9ab5a coreboot: Fix USB2 on USB-C for gaze18, serw13
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
d9845e2e17 Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
4a250f3d1a Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
2b8c7c5b08 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
c5a8967713 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
6a26a3f340 Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
1ab84bf011 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
e4a1f7db12 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
a933c623bf Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
863d7915fa Update coreboot 2023-04-03 13:23:12 -06:00
Tim Crawford
24aa2732c1 ec: Fix gaze18 keyboard backlight
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
eb99963d28 edk2: Update Secure Boot keys and DBX
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
4e388b0218 gaze18: Add edk2.config
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
e7d9fe8ec9 bonw15: disable BootGuard and PTT 2023-04-03 13:23:12 -06:00
Jeremy Soller
818606dd4d Add config files for bonw15 2023-04-03 13:23:12 -06:00
Jeremy Soller
c2c027e3ab Add extract for bonw15 2023-04-03 13:23:12 -06:00
Jeremy Soller
7e4bf87ad1 Update firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
d4ad0678ad Update firmware-setup 2023-04-03 13:23:12 -06:00
Tim Crawford
4ce81a864c edk2: Add minimal UI for Secure Boot
Enable SecureBootConfigDxe with a stripped down UI. It allows users to
enable or disable Secure Boot and reset the key data to the defaults.
That's it.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
105e74b146 edk2: Enable Secure Boot support
This enables *support* for Secure Boot. It is not recommended to enable
Secure Boot. There is no firmware UI for managing the state or keys.

The system will default to disabled in Setup Mode:

    $ mokutil --sb-state
    SecureBoot disabled
    Platform is in Setup Mode

This is sufficient to install Windows 11.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
bb66f96e7d Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
52d3914212 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
312d5fb194 Update firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
f7685b90b0 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
2e88ea6e54 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
17c667ad57 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
b212d78343 Firmware security support 2023-04-03 13:23:12 -06:00
Jeremy Soller
62d9b5db3f Update firmware-setup 2023-04-03 13:23:12 -06:00
Jeremy Soller
0667bb90ff Update EDK2 2023-04-03 13:23:12 -06:00
Jeremy Soller
115212573b Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
f8e59e0226 Update firmware-update 2023-04-03 13:23:12 -06:00
Tim Crawford
a80a1e8852 Update coreboot and EC
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
c42eefdb71 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
0ae22eae67 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
135ab5fffe Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
3febec8d0b Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
1dd5fce186 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
03f430cef4 addw3: add GBE firmware and update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
68e698f010 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
b8913f13e9 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
52c234fb12 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
fd31c1a32d Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
3476ed9213 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
5396b7835c Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
be78f81eda Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
20345238f5 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
fd6452d40e Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
014f1329d0 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
0730cc6697 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
552e8bd40b Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
083385ff01 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
84992bdf11 Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
c4bde895e9 Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
9ad80fecc0 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
597933412e Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
3e107141d6 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
fb95ec882e Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
37c37894a3 Update firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
a1af362c81 Use RPL-H FSP for oryp11 2023-04-03 13:23:12 -06:00
Tim Crawford
447018601e serw13: Fix symlink to FSP
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
7354cdd80d gaze18: Symlink FSP, add chip.txt
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
2b63227fc1 gaze18: Update CSME
- Disable Boot Guard
- Disable PTT
- Disable locking the descriptor

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
cb392f4282 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
0dbaf681a1 Update coreboot and ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
3af1e42200 Apply model renames to configs and readmes 2023-04-03 13:23:12 -06:00
Jeremy Soller
10969196e6 Rename gaze18-3050 to gaze18 2023-04-03 13:23:12 -06:00
Jeremy Soller
18bd0381d2 Rename gaze18-40x0 to addw3 2023-04-03 13:23:12 -06:00
Jeremy Soller
800ff9acda Rename addp3 to oryp11 2023-04-03 13:23:12 -06:00
Jeremy Soller
cff97142e8 Rename oryp11 to serw13 2023-04-03 13:23:12 -06:00
Jeremy Soller
b5165029ff Update coreboot and EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
1b3d99a2f7 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
5173c422f1 Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
83e4f15118 Disable bootguard and PTT on addp3 2023-04-03 13:23:12 -06:00
Jeremy Soller
7b6968f3a8 Add FSP and configs for addp3 2023-04-03 13:23:12 -06:00
Tim Crawford
4d6796284b Revert "gaze18-3050: Update CSME"
This reverts commit 062ff0364b.

The RPL-HX tools were used to regenerate the CSME, but the RPL-P tools
need to be used.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
a91d0495b2 Add addp3 extract 2023-04-03 13:23:12 -06:00
Tim Crawford
61bd558c93 gaze18-3050: Update CSME
- Disable Boot Guard
- Disable PTT
- Disable locking the descriptor

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
955be3aa03 coreboot: Drop RUN_FSP_GOP selection
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
e3123cb6ac Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
445959f2ba Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
5b3271efde Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
3a9587ea42 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
0968059796 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
5bc157e6b8 Update ec 2023-04-03 13:23:12 -06:00
Jeremy Soller
7aa7456b78 Update coreboot 2023-04-03 13:23:12 -06:00
Tim Crawford
6526291d71 oryp11: Add ec.config, symlink and use FSP
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
717cdfdac1 Update EC 2023-04-03 13:23:12 -06:00
Jeremy Soller
2b9cb92b20 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
70e6f70c91 Update intel-spi 2023-04-03 13:23:12 -06:00
Jeremy Soller
9b16a5a84a Update firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
5b7f116fc6 Update firmware-update 2023-04-03 13:23:12 -06:00
Jeremy Soller
70dd645e06 Update coreboot 2023-04-03 13:23:12 -06:00
Tim Crawford
8933544389 oryp11: Add config files
- Specify chip.txt for external flashing
- Copy IntelGopDriver.inf so GOP is used
- Copy edk2.config to build with correct configs

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
3f91e984a1 docs: Add section for smart amp to porting notes
Document how to find the Realtek smart amp init data from the
proprietary firmware image.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
2a568cfb2e oryp11: Update CSME
- Disable Boot Guard
- Disable PTT
- Disable locking the descriptor

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
e65a4d4ef5 Add coreboot configs for oryp11, gaze18-3050
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
8489f11d31 Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
9f2ea7303f Update coreboot 2023-04-03 13:23:12 -06:00
Jeremy Soller
adfabb401f Add FSP for gaze18-40x0 2023-04-03 13:23:12 -06:00
Jeremy Soller
bc75d1a6eb Add chip.txt for gaze18 2023-04-03 13:23:12 -06:00
Jeremy Soller
f8146b3cf5 Disable bootguard for gaze18 2023-04-03 13:23:12 -06:00
Jeremy Soller
b2ecfb615c Update coreboot and add gaze18-40x0 configs 2023-04-03 13:23:12 -06:00
Tim Crawford
03ef3bde94 models: Add oryp11 blobs
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
ae90538df1 models: Add oryp11 extract
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
95a7b9edf8 Add gaze18-40x0 extract 2023-04-03 13:23:12 -06:00
Jeremy Soller
49f0d55c00 Update coreboot-collector 2023-04-03 13:23:12 -06:00
Jeremy Soller
faf51f7379 Update coreboot-collector 2023-04-03 13:23:12 -06:00
Tim Crawford
c01e392b4d models: Add gaze18-3050 dump
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Tim Crawford
a308d84632 modeltool: Update edition, deps
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-04-03 13:23:12 -06:00
Jeremy Soller
85f8a8b933 coreboot: oryp10: select DRIVERS_GFX_NVIDIA 2023-02-14 14:48:45 -07:00
Jeremy Soller
8c603b0126 coreboot: oryp10: enable DGPU 2023-02-14 14:47:16 -07:00
Tim Crawford
ce389aab14 coreboot: Drop RUN_FSP_GOP selection
This choice is the default for boards that select INTEL_GMA_HAVE_VBT and
do not use libgfxinit.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-02-10 15:45:26 -07:00
Tim Crawford
6562cf213d coreboot: Rebase on 4.19
Rebase on coreboot/coreboot@decbf7b4d9.

The following boards have been upstreamed:

- darp8
- galp6

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-02-10 15:45:26 -07:00
Tim Crawford
b337ac66fb ec: Fix WLAN power on
Configure WLAN GPIOs at the correct point so they are enabled at boot.

Fixes: 5f1ef1731e ("ec: Fix power off issues on ADL and TGL")
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-21 10:01:00 -07:00
Tim Crawford
5f1ef1731e ec: Fix power off issues on ADL and TGL
- adl-p: Fix case where system gets stuck in S5 due to power loss
- tgl-u: Fix case where system gets stuck in S5 due to power loss
- galp5: Fix power off failing due to WLAN GPIO

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-18 09:16:22 -07:00
Tim Crawford
5e1da18565 ec: Apply PMC hack to all ADL boards
For some reason, *all* the ADL boards are now failing to enter S0ix.
Apply the PMC hack to the remaining ADL boards.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-18 07:45:49 -07:00
Tim Crawford
b3f0b544d7 Ask for kernel version for bug reports
Issues may depend on changes that happened in the kernel, such as:

- TBT using software CM instead of firmware CM
- TGL GPIO communities changing to match Windows
- Removal of `intel_backlight`

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-17 11:51:35 -07:00
Tim Crawford
addd02860a Update Rust toolchain to 2022-03-18
Match the toolchain used by Redox.

Update firmware-setup and firmware-update for using the new toolchain.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-16 09:39:05 -07:00
Tim Crawford
7291bc7d39 coreboot: Disable SATA DevSlp on S0ix boards
After changing EC detection of S0ix from CPU_C10_GATE# to SLP_S0#,
DevSlp blocks S0ix entry. Disable it for now on TGL-U and ADL-P.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-14 13:21:45 -07:00
Tim Crawford
13d410e6e1 coreboot: Fix ACPI brightness controls on ADL
Hook up GMA ACPI brightness controls for ADL and set the gfx register
for ADL boards.

Fixes backlight controls on Windows 10 and Linux 6.1.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-10 14:23:12 -07:00
Tim Crawford
ec7f2adb2e changelog: Use past tense
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-04 17:24:51 -06:00
Tim Crawford
4718ec4b3e coreboot: Remove CPU PCIe RP RTD3 configs
Remove CPU PCIe RP RTD3 config on TGL-U and ADL-P. Fixes suspend with
some drives, such as WD Blue.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-11-02 15:45:02 -06:00
Tim Crawford
b39e1944a5 lemp11: Apply PMC hack to fix S0ix
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-10-17 18:43:49 -06:00
Tim Crawford
4136ef8f2b ec: Fix KB backlight color with custom values
Reload PWM counters when they reach 0 instead of immediately.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-10-14 10:16:47 -06:00
Tim Crawford
28f94e2d84 lemp11: Remove CARD RTD3 config
Fixes board failing to reach S0ix most of the time.

lemp11 still sometimes fails to reach C10, but plugging/removing AC
adapter still works to fix it.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-10-11 17:16:40 -06:00
Tim Crawford
91a491fb95 ec: Fix charger values
- charger: Limit charger values to max valid value
- charger/bq24780s: Set RSENSE ratio option
- charger/bq24780s: Fix charge current mask
- oryp[5-8]: Reduce charge current to 2A

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-10-10 10:09:32 -06:00
Jeremy Soller
aa797d2e00 Update coreboot 2022-09-26 12:11:14 -06:00
Tim Crawford
5a479a20c8 coreboot: Fix brightness controls
The `gfx` register got dropped during some rebase. Add them back.

Fixes brightness controls on Windows for oryp8, gaze16, lemp9.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-09-23 15:56:01 -06:00
Tim Crawford
f64430a6b1 models: Remove thelio-b1
This model could not be ported, and so was never supported.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-09-23 12:28:57 -06:00
leviport
74e75ff8e4 Merge pull request #350 from system76/oryp9-b
Add oryp10
2022-09-07 12:49:21 -06:00
Tim Crawford
3e594a6d4b Update EC
- Fix signal used to detect S0ix
- Fix value to start/stop charging at

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-09-07 11:30:52 -06:00
Tim Crawford
280f061470 oryp10: Update CSME
- Disable Boot Guard
- Disable PTT
- Disable locking the descriptor

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-09-06 09:48:49 -06:00
Tim Crawford
1169a60ca5 oryp10: Add Oryx Pro 10
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-09-06 09:48:49 -06:00
Tim Crawford
87b0a4903c scripts: Build crossgcc with multiple cores
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-09-01 16:23:31 -06:00
Tim Crawford
161895da77 scripts: Install deps without confirmation
This makes `dep.sh` usable from CI. Also update the package lists before
installing on debian/ubuntu.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-29 12:55:07 -06:00
Tim Crawford
7160b01929 scripts: Install Rust with stable toolchain
The trick of using `show` to install components requires a default
toolchain be set. Assume users with Rust installed already have one set,
and use stable for new installs.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-29 10:10:34 -06:00
Tim Crawford
9754d7d8a9 scripts: Drop some unneeded deps
- coreboot no longer requires Python 2 for the FSP
- nasm is provided by the coreboot toolchain

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-29 10:10:34 -06:00
Tim Crawford
f311c8b10f scripts: Build coreboot toolchain as part of deps
Front load building the toolchain binaries when installing deps instead
of during the first board build.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-29 10:10:34 -06:00
Tim Crawford
42814e6e5c scripts: Build edk2 using coreboot toolchain
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-29 10:10:34 -06:00
leviport
2680d93538 docs (flashing): Remove chip package info (#348)
Since there are now two different chip package types used in our laptops, mentioning only one may cause confusion.
2022-08-12 13:42:42 -06:00
Tim Crawford
ba68c9901c coreboot: Fix intel-microcode submodule
Intel rewrote the git history for the new release. Use the tagged commit
for the microcode-20220510 release to fix clones.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-10 12:36:10 -06:00
Tim Crawford
1c03ebeba9 Update CSME for TGL-H and TGL-U to 15.0.41.2158v2
- TGL-U ID: 729569
- TGL-H ID: 729571

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-10 12:36:10 -06:00
Tim Crawford
26f97c8d88 galp6: Add support for new board
- Update submodules to support the new board
- Add board to list of supported models

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-03 17:29:54 -06:00
Tim Crawford
db2a47337a galp6: Update CSME
Disable Boot Guard, PTT, and locking of the descriptor.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-03 17:29:54 -06:00
Daniel Sutton
6a97accff4 galp6: Add Galago Pro 6 2022-08-03 17:29:54 -06:00
Tim Crawford
302c1eedd6 Update CSME for ADL-P to 16.0.15.1810v8
- ID: 735206
- Updated: 2022-06-23
- Version: 16.0.15.1810v8 ADL-P

The reported version is 16.0.15.1829.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-03 17:29:54 -06:00
Tim Crawford
6d4ccd9aeb changelog: Add some missing details
The coreboot rebase for gaze17 brought in a lot of fixes for other
boards.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-03 17:29:54 -06:00
Tim Crawford
6ff4ccfbcb coreboot: rebase on 37bf8c6dd590
Update coreboot and switch boards to use public releases of blobs.

- TGL-U microcode: revision 0xa4
- TGL-H microcode: revision 0x3e
- ADL microcode: revision 0x41c
- ADL FSP: C.0.69.74

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-08-03 17:29:54 -06:00
John Wiggins
7e4a92c854 Merge pull request #339 from system76/spipi-update
Set spipi to new name instead of IP address
2022-07-27 12:28:59 -06:00
John Wiggins
584bc40189 Set spipi to new name instead of IP address
Improved config script so the spipi config file doesn't have
to be updated with the IP address of the raspberry pi.
2022-07-27 12:20:29 -06:00
Tim Crawford
00cebe9042 gaze17-3050: Update 3050 variant
- Update EC and coreboot to support the new board
- Update README and CHANGELOG with the new board
- Add `chip.txt` to allow external flashing

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-27 10:12:02 -06:00
Tim Crawford
46d6040dbd gaze17-3050: Update CSME
Disable Boot Guard, PTT, and locking of the descriptor.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-27 10:12:02 -06:00
Tim Crawford
2e133ed72e docs: Add things to dump before porting
Information required for porting may not be in the schematics and
require inspection while running the proprietary firmware.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-27 10:12:02 -06:00
Tim Crawford
ae6aa72ceb oryp9: Fix power off on battery power, sync fans
Adjust power limits to prevent the system powering off while compiling
the kernel on battery power in NVIDIA graphics mode.

Sync CPU and GPU fans to mitigate thermal issues.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-20 16:17:25 -06:00
Tim Crawford
8b8344ac6c changelog: Add oryp9, update darp8 and lemp11
The lemp11 fix was released as the original firmware.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-13 14:12:17 -06:00
Tim Crawford
db6deb884a readme: Add ADL boards to supported models
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-13 14:12:17 -06:00
Tim Crawford
966f29601b oryp9: Update CSME
Disable Boot Guard, PTT, and locking of the descriptor.

Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-13 14:12:17 -06:00
Tim Crawford
132e3ab1f3 oryp9: Add Oryx Pro 9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-13 14:12:17 -06:00
392 changed files with 5884 additions and 163299 deletions

View File

@@ -10,6 +10,7 @@ assignees: []
- BIOS version: <!-- `cat /sys/class/dmi/id/bios_version` (e.g.: 2021-09-30_14b8a6e)-->
- EC version: <!-- This will match the BIOS version unless you flashed it separately. -->
- OS: <!-- e.g.: Pop!_OS 21.10, Fedora 35, Windows 11 -->
- Kernel: <!-- `uname -r` (e.g.: 6.0.6-76060006-generic) -->
<!-- Briefly describe the problem. -->

36
.gitmodules vendored
View File

@@ -6,30 +6,10 @@
path = coreboot
url = https://github.com/system76/coreboot.git
branch = system76
[submodule "edk2-platforms"]
path = edk2-platforms
url = https://github.com/system76/edk2-platforms.git
branch = system76
[submodule "tools/UEFITool"]
path = tools/UEFITool
url = https://github.com/LongSoft/UEFITool.git
branch = new_engine
[submodule "libs/intelflash"]
path = libs/intelflash
url = https://gitlab.redox-os.org/redox-os/intelflash.git
branch = master
[submodule "libs/uefi"]
path = libs/uefi
url = https://gitlab.redox-os.org/redox-os/uefi.git
branch = master
[submodule "libs/coreboot-table"]
path = libs/coreboot-table
url = https://gitlab.redox-os.org/redox-os/coreboot-table.git
branch = master
[submodule "libs/intel-spi"]
path = libs/intel-spi
url = https://github.com/system76/intel-spi.git
branch = master
[submodule "tools/coreboot-collector"]
path = tools/coreboot-collector
url = https://github.com/system76/coreboot-collector.git
@@ -46,26 +26,10 @@
path = tools/MEAnalyzer
url = https://github.com/platomav/MEAnalyzer.git
branch = master
[submodule "libs/coreboot-fs"]
path = libs/coreboot-fs
url = https://gitlab.redox-os.org/redox-os/coreboot-fs.git
branch = master
[submodule "apps/gop-policy"]
path = apps/gop-policy
url = https://github.com/system76/gop-policy.git
branch = master
[submodule "edk2-non-osi"]
path = edk2-non-osi
url = https://github.com/tianocore/edk2-non-osi.git
branch = devel-MinPlatform
[submodule "FSP"]
path = FSP
url = https://github.com/IntelFsp/FSP.git
branch = master
[submodule "apps/firmware-smmstore"]
path = apps/firmware-smmstore
url = https://github.com/system76/firmware-smmstore.git
branch = master
[submodule "tools/ipxe"]
path = tools/ipxe
url = https://github.com/ipxe/ipxe.git

View File

@@ -1,32 +1,228 @@
# Changelog
# System76 Open Firmware Changelog
Changes are identified by the date of the released firmware including them. If
you are running System76 Open Firmware, opening the boot menu will show this
date followed by an underscore and a short git revision.
date followed by an underscore and a short git revision. To see if specific
features apply to your model and firmware version, see the
[feature matrix](./docs/features.md).
## unreleased
- Updated coreboot to 24.02
- adl-p: Updated FSP to C.1.75.10
- adl-s: Updated FSP to C.0.75.10
- adl: Updated microcode to revision 0x430
- rpl-p: Updated FSP to C.1.BD.40
- rpl-s: Updated FSP to C.0.BD.40
- rpl: Updated microcode to revision 0x411c
- tgl: Updated FSP to A.0.7E.70
- tgl-u: Updated microcode to revision 0xb4
- tgl-h: Updated microcode to revision 0x4e
- adl: Fixed PCIe 4.0 drives in PCIe 3.0 slot failing to initialize on resume
- rpl: Fixed PCIe 4.0 drives in PCIe 3.0 slot failing to initialize on resume
- rpl: Fixed TCSS ACPI access
- Changed the EC version to be distinct from the SBIOS version
## 2024-01-18
- darp9: Added SSD RTD3 configs to fix suspend with some drives
## 2024-01-10
- darp8: Fixed suspend issue on new boards by switching to S0ix by default
- darp9: Fixed suspend issue on new boards by switching to S0ix by default
## 2023-10-20
- tgl-u: Fixed CPU not going lower than C2 due to card reader LTR
- bonw15: Fixed speaker audio cutting in/out
- oryp11: Fixed speaker audio cutting in/out
## 2023-10-13
- tgl-u: Fixed potential EC lock up during opportunistic suspend
- galp5: Fixed CPU not going lower than C2 due to card reader LTR
## 2023-09-19
- rpl-hx: Added support for 5600 MHz RAM
## 2023-09-08
- adl: Updated CSME to 16.1.25.2124
- adl,rpl: Fixed SMMSTORE init sometimes failing
- Increased key debounce from 5ms to 10ms
## 2023-08-23
- rpl: Fixed RPL-S GPIO driver on Windows
## 2023-08-18
- cml-u: Fixed boot failing at FSP-S
- Added KBC reset on CPU reset to prevent keyboard from being locked
- Enabled power switch Watch Dog Timer with a timeout of 10 seconds
- Fixed detecting if PECI is available on eSPI systems using S0ix
- Added support for a FnLock key
- tgl: Fixed Bluetooth performance by enabling audio offload
- gaze16: Fixed CPU not going lower than C2 due to card reader LTR
- adl: Fixed CPU not going lower than C2 due to card reader LTR
- rpl: Fixed CPU not going lower than C2 due to card reader LTR
- Changed battery charge start threshold to 90%
- Changed charger to disable when battery is full
## 2023-07-19
- bonw14: Fixed loading CPU microcode
- rpl-hx: Fixed setting PL1 and PL2 power limits
- rpl-hx: Fixed LPM substates
- gaze17: Removed invalid RTD3 configs
- oryp10: Removed invalid RTD3 configs
- galp8: Removed SATA RTD3 to fix drives being lost on suspend
- lemp11: Removed SATA RTD3 to fix drives being lost on suspend
- Reduced key debounce from 15ms to 5ms
- galp6: Fixed fan tachometer GPIOs
- lemp9: Fixed fan tachometer GPIOs
- lemp10: Fixed fan tachometer GPIOs
- lemp11: Fixed fan tachometer GPIOs
## 2023-07-10
- Updated Secure Boot DBX to version 371 (2023-05-09)
- bonw15: Added initial release of open firmware with System76 EC
- oryp11: Changed adapter Rsense to 10 milliohms
- serw13: Changed adapter Rsense to 10 milliohms
## 2023-06-22
- addw3: Enabled support for 5200 MT/s memory
- serw13: Enabled support for 5200 MT/s memory
- oryp11: Added initial release of open firmware with System76 EC
- rpl: Enabled TPM read delay to fix occasional failures with Infineon chips
- Changed TPM behavior to perform TPM Restart if TPM Resume fails
## 2023-06-08
- darp9: Added initial release of open firmware with System76 EC
- Added detection of RGB keyboards at runtime
- oryp9: Enabled firmware security
- oryp9: Enabled NVIDIA Dynamic Boost
- oryp10: Enabled firmware security
- oryp10: Enabled NVIDIA Dynamic Boost
- Invalidated CMOS checksum after flashing to ensure default options are used
## 2023-05-25
- Set PL4 based on AC state for all boards
- Increased PL4 on battery to 45W for dGPU boards
- galp6: Enabled firmware security
- galp7: Added initial release of open firmware with System76 EC
## 2023-05-17
- serw13: Added initial release of open firmware with System76 EC
- Fixed Windows BSoD on RPL-HX
## 2023-05-16
- lemp12: Added initial release of open firmware with System76 EC
## 2023-04-28
- addw3: Added initial release of open firmware with System76 EC
## 2023-03-22
- Updated coreboot to upstream commit decbf7b4d975
- Enabled support for Secure Boot
- Enabled minimal UI for enforcing Secure Boot and resetting keys
- Added firmware locking support
- Enabled S3 suspend on everything but TGL-U
- Disabled ME by default on everything but TGL-U
- Added support for NVIDIA Dynamic Boost
- gaze18: Added initial release of open firmware with System76 EC
## 2022-11-21
- lemp11: Added workaround to force S0ix entry on suspend
- tgl-u: Removed CPU PCIe RP RTD3 config to fix suspend with certain drives
- adl-p: Removed CPU PCIe RP RTD3 config to fix suspend with certain drives
- adl-p: Fixed ACPI brightness controls on Windows 10 and Linux 6.1
- adl-p: Disabled SATA DevSlp to fix S0ix entry
- tgl-u: Disabled SATA DevSlp to fix S0ix entry
- Updated Rust toolchain to nightly-2022-03-18
- adl-p: Added workaround to force S0ix entry on suspend
- adl-p: Fixed case where system gets stuck in S5 due to power loss
- tgl-u: Fixed case where system gets stuck in S5 due to power loss
- galp5: Fixed power off failing due to WLAN GPIO
## 2022-10-14
- Fixed smart charger values for all boards
- Fixed keyboard backlight color with custom values
- lemp11: Removed RTD3 config for card reader to fix suspend
## 2022-09-26
- oryp8: Fixed brightness controls on Windows
- oryp10: Added initial release of open firmware with System76 EC
## 2022-09-07
- Updated CSME for TGL-H to 15.0.41.2158
- Updated CSME for TGL-U to 15.0.41.2158
- Changed build to use coreboot toolchain for edk2
- Fixed signal used to detect S0ix
- Fixed off-by-one for battery charging start/stop thresholds
## 2022-08-03
- Updated coreboot to upstream commit 37bf8c6dd590
- Updated TGL-U microcode to revision 0xa4 from Intel's public repo
- Updated TGL-H microcode to revision 0x3e from Intel's public repo
- Updated ADL microcode to revision 0x41c from Intel's public repo
- Updated ADL FSP to C.0.69.74 from Intel's public repo
- Updated CSME for ADL-P to 16.0.15.1810v8 (16.0.15.1829)
- Fixed uncommon I2C HID initialization failure on boot
- Fixed smart charger values for all boards
- galp6: Added initial release of open firmware with System76 EC
## 2022-07-27
- gaze17-3050: Added initial release of open firmware with System76 EC
- gaze17-3060: Fixed suspend with WD drives
## 2022-07-20
- oryp9: Added initial release of open firmware with System76 EC
## 2022-07-13
- darp8: Fixed power off under load while on battery power
## 2022-07-05
- lemp11: Fix power off under load while on battery power
## 2022-06-29
- lemp11: Release of open firmare with System76 EC
- lemp11: Added initial release of open firmare with System76 EC
## 2022-06-23
- darp8: Release of open firmware with System76 EC
- darp8: Added initial release of open firmware with System76 EC
## 2022-06-07
- Fixed building for QEMU
- Updated coreboot to upstream commit 670572ff6a
- Fixed NVIDIA subsystem ID being lost on suspend
- TGL: Fixed Device Manager warning about missing drivers for Tiger Lake IPC
Controller and System76 EC ACPI devices
- Improved NVIDIA Optimus support
- gaze17-3060-b: Release of open firmware with System76 EC
- tgl-u: Fixed suspend with certain drives
- gaze17-3060-b: Added initial release of open firmware with System76 EC
## 2022-02-15
- Update ME for all supported systems
- Ensure that system powers off S5 plane if it fails to reach S0
- Updated ME for all supported systems
- Ensured that system powers off S5 plane if it fails to reach S0
## 2022-01-06
@@ -34,7 +230,7 @@ date followed by an underscore and a short git revision.
- Enabled coreboot measured boot
- Updated Rust toolchain to nightly-2021-06-15
- Updated coreboot to 4.15
- Updated EDK2 to edk2-stabke202108
- Updated EDK2 to edk2-stable202108
- Updated TGL-U microcode blobs to revision 0x9a
- Updated TGL-H microcode blobs to revision 0x3c
- Updated all other boards to use microcode blobs from Intel's public repo
@@ -43,23 +239,23 @@ date followed by an underscore and a short git revision.
## 2021-09-30
- gaze16: Do not require unplugging the AC adapter after flashing
- gaze16: Fix using USB 2.0 devices in Type-C port
- gaze16: Removed need to unplug the AC adapter after flashing
- gaze16: Fixed using USB 2.0 devices in Type-C port
## 2021-09-23
- oryp8: Release of open firmware with System76 EC
- gaze16: Fix input current on 3050 variant
- gaze16: Fix power limit when booting on battery
- gaze16: Fix touchpad on newer Linux kernel and Windows
- Fix brightness controls on TGL platforms
- Fix PCIe subsystem IDs on TGL platforms
- Fix spurious clearing of boot options on Windows
- Provide battery cycle count
- oryp8: Added initial release of open firmware with System76 EC
- gaze16: Fixed input current on 3050 variant
- gaze16: Fixed power limit when booting on battery
- gaze16: Fixed touchpad on newer Linux kernel and Windows
- Fixed brightness controls on TGL platforms
- Fixed PCIe subsystem IDs on TGL platforms
- Fixed spurious clearing of boot options on Windows
- Added battery cycle count
## 2021-07-20
- gaze16: Release of open firmware with System76 EC
- gaze16: Added initial release of open firmware with System76 EC
- Improved thermals by syncing CPU and GPU fans
- Enabled fan speed interpolation
- Fixed ACPI timeout on S3 resume if a key is held
@@ -69,142 +265,148 @@ date followed by an underscore and a short git revision.
## 2021-04-07
- darp7, galp5, lemp10: Update microcode
- tgl-u: Updated microcode
## 2021-04-02
- Fix fan max keeping fan on when in S0iX
- Report all keys as released when lid is closed
- Fixed fan max keeping fan on when in S0iX
- Changed keyboard behavior to report all keys as released when lid is closed
## 2021-03-19
- gaze15: Release of open firmware with System76 EC
- gaze15: Add ELAN touchpad settings
- gaze15: Added initial release of open firmware with System76 EC
- gaze15: Added ELAN touchpad settings
## 2021-03-16
- oryp6, oryp7: Fix buzzing at lowest fan speed
- oryp6: Fixed buzzing at lowest fan speed
- oryp7: Fixed buzzing at lowest fan speed
## 2021-03-11
- lemp9: Fix backlight ACPI issues and TPM interrupt
- lemp9: Fixed backlight ACPI issues and TPM interrupt
## 2021-03-08
- oryp6, oryp7: Improved fan curve
- oryp6: Improved fan curve
- oryp7: Improved fan curve
## 2021-03-03
- oryp7: Release of open firmware with System76 EC
- oryp7: Added initial release of open firmware with System76 EC
## 2021-02-15
- darp7, galp5: Raise HDMI data rate to support 4K@60Hz
- darp7: Increased HDMI data rate to support 4K@60Hz
- galp5: Increased HDMI data rate to support 4K@60Hz
## 2021-02-09
- galp5: Fix GPU driver crash in compute graphics mode
- galp5: Fixed GPU driver crash in compute graphics mode
## 2021-02-05
- darp7: Fix keyboard scanning glitches
- darp7: Fixed keyboard scanning glitches
## 2021-01-21
- darp7: Release of open firmware with System76 EC
- darp7: Added initial release of open firmware with System76 EC
## 2021-01-19
- Update boot options on device hotplug
- Add fan toggle key (Fn+1)
- Clear NVRAM when CMOS battery is removed
- galp5, lemp10: Fix NVRAM compacting
- Added behavior to update boot options on device hotplug
- Added fan toggle key (Fn+1)
- Added behavior to clear NVRAM when CMOS battery is removed
- galp5: Fixed NVRAM compacting
- lemp10: Fixed NVRAM compacting
## 2021-12-15
- galp5: Support variant with NVIDIA GPU
- galp5: Added support for variant with NVIDIA GPU
## 2020-12-04
- galp5, lemp10: Release of open firmware with System76 EC
- galp5: Added initial release of open firmware with System76 EC
- lemp10: Added initial release of open firmware with System76 EC
## 2020-10-19
- Support customizing keyboard at runtime
- Add battery charging thresholds
- oryp6: Fix smart charger values
- Prevent wake when lid is closed
- Added support for customizing keyboard at runtime
- Added battery charging thresholds
- oryp6: Fixed smart charger values
- Prevented wake when lid is closed
## 2020-09-22
- darp6: Release of open firmware with System76 EC
- darp6: Fix allocation of memory type range registers
- darp6: Added initial release of open firmware with System76 EC
- darp6: Fixed allocation of memory type range registers
## 2020-09-17
- Enable Wake-on-Lan (on supported models)
- Add ACPI thermal interface
- Fix ESXi keyboard issue
- Enabled Wake-on-Lan (on supported models)
- Added ACPI thermal interface
- Fixed ESXi keyboard issue
## 2020-09-03
- addw2: Release of open firmware with System76 EC
- addw2: Added initial release of open firmware with System76 EC
## 2020-08-24
- bonw14: Release of open firmware with System76 EC
- bonw14: Added initial release of open firmware with System76 EC
## 2020-08-13
- Add UEFI TPM2 support
- Added UEFI TPM2 support
## 2020-08-06
- Enable ACPI backlight
- Add firmware configuration information
- Enabled ACPI backlight
- Added firmware configuration information
## 2020-07-06
- oryp6: Release of open firmware with System76 EC
- oryp6: Added initial release of open firmware with System76 EC
## 2020-05-20
- Warn if no bootable media is found
- Added warning if no bootable media is found
## 2020-05-15
- Enable i2c-hid touchpad interface
- Enabled i2c-hid touchpad interface
## 2020-05-07
- Fix ghost key debouncing
- Fixed ghost key debouncing
## 2020-05-04
- Improve ghost key handling and reduce key debounce
- Improved ghost key handling and reduce key debounce
## 2020-04-23
- Fix duplicate release of key after release of function key
- Fixed duplicate release of key after release of function key
## 2020-04-18
- lemp9: Update fan curve
- lemp9: Updated fan curve
## 2020-04-09
- lemp9: Release of open firmware with System76 EC
- lemp9: Added initial release of open firmware with System76 EC
## 2020-02-05
- Use descriptive device names
- Only show bootable devices
- Changed boot manager to use descriptive device names
- Changed boot manager to only show bootable devices
## 2020-01-13
- Fix NVIDIA eGPU issues
- Iimprove boot order editing
- Fixed NVIDIA eGPU issues
- Improved boot order editing
## 2019-10-31
- darp6, galp4: Release of open firmware with proprietary EC
- darp6: Added intial release of open firmware with proprietary EC
- galp4: Added intial release of open firmware with proprietary EC

1
FSP

Submodule FSP deleted from 10eae55b8e

134
Jenkinsfile vendored Normal file
View File

@@ -0,0 +1,134 @@
#!/usr/bin/env groovy
// Required plugins:
// - Jenkins Core
// - AnsiColor (https://plugins.jenkins.io/ansicolor/)
// - Git (https://plugins.jenkins.io/git/)
// - Pipeline (https://plugins.jenkins.io/workflow-aggregator/)
// - Slack Notification (https://plugins.jenkins.io/slack/)
def all_models = 'addw2 addw3 bonw14 bonw15 darp5 darp6 darp7 darp8 darp9 galp3-c galp4 galp5 galp6 galp7 gaze15 gaze16-3050 gaze16-3060 gaze16-3060-b gaze16-3050 gaze16-3060-b gaze17-3050 gaze17-3060-b gaze18 lemp9 lemp10 lemp11 lemp12 oryp5 oryp6 oryp7 oryp8 oryp9 oryp10 oryp11 serw13'
void setBuildStatus(String state, String message) {
// FIXME: https://www.jenkins.io/doc/book/pipeline/jenkinsfile/#string-interpolation
sh """
curl \
-X POST \
-H \'Accept: application/vnd.github+json\' \
-H \'Authorization: Bearer ${GITHUB_TOKEN}\' \
-H \'X-GitHub-Api-Version: 2022-11-28\' \
https://api.github.com/repos/system76/firmware-open/statuses/${GIT_COMMIT} \
-d \'{\"state\": \"${state}\", \"target_url\": \"${BUILD_URL}\", \"description\": \"${message}\"}\'
"""
}
pipeline {
agent {
label 'warp.pop-os.org'
}
environment {
GITHUB_TOKEN = credentials('github-commit-status')
}
options {
buildDiscarder(logRotator(numToKeepStr: '16', artifactNumToKeepStr: '1'))
disableConcurrentBuilds()
timeout(time: 1, unit: 'HOURS')
timestamps()
ansiColor('xterm')
}
parameters {
string(name: 'MODELS', defaultValue: "$all_models", description: 'Space separated list of models to build', trim: true)
string(name: 'SOURCE_BRANCH', defaultValue: 'master', description: 'Git branch or revision to build', trim: true)
}
triggers {
pollSCM('')
}
stages {
stage('Prepare') {
steps {
setBuildStatus("pending", "Pending")
slackSend(color: "good", message: "${env.JOB_NAME} - #${env.BUILD_ID} started (<${env.BUILD_URL}|Open>)")
sh """#!/bin/bash
# Update submodule URLs because of coreboot
git submodule sync --recursive
"""
// https://www.jenkins.io/doc/pipeline/steps/params/scmgit/
checkout scmGit(
branches: [[name: '${SOURCE_BRANCH}']],
extensions: [
lfs(),
pruneStaleBranch(),
pruneTags(true),
submodule(
parentCredentials: true,
recursiveSubmodules: true,
reference: ''
),
],
userRemoteConfigs: [[url: 'https://github.com/system76/firmware-open.git']]
)
sh """#!/bin/bash
# Install dependencies
#./scripts/install-deps.sh
. "${HOME}/.cargo/env"
# Reset
git submodule update --init --recursive --checkout
git reset --hard
git submodule foreach --recursive git reset --hard
# Clean
git clean -dffx
git submodule foreach --recursive git clean -dff
# EDK2 builds fail if file paths in INFs change from what's in the build cache
pushd edk2; git clean -dffx; popd
"""
}
}
stage('Build') {
steps {
// The workspace is reused, so must build models sequentially.
script {
def list = params.MODELS.tokenize()
list.each { model ->
stage(model) {
sh """#!/bin/bash
. "${HOME}/.cargo/env"
# WORSKSPACE is set by Jenkins, but EDK2 uses it
env --unset=WORKSPACE \
./scripts/build.sh "${model}"
"""
}
}
}
}
}
}
post {
always {
archiveArtifacts artifacts: 'build/*/*', allowEmptyArchive: true
}
success {
setBuildStatus("success", "Successful")
slackSend(color: "good", message: "${env.JOB_NAME} - #${env.BUILD_ID} successful after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
}
failure {
setBuildStatus("failure", "Failed")
slackSend(color: "danger", message: "${env.JOB_NAME} - #${env.BUILD_ID} failed after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
}
aborted {
setBuildStatus("failure", "Failed")
slackSend(color: "warning", message: "${env.JOB_NAME} - #${env.BUILD_ID} aborted after ${currentBuild.durationString} (<${env.BUILD_URL}|Open>)")
}
}
}

View File

@@ -33,7 +33,7 @@ The license for the embedded controller firmware depends on the binary used.
#### Intel binaries
Intel provides biniaries under a redistributable license, which may be
Intel provides binaries under a redistributable license, which may be
different per binary.
- `me.rom`: Intel CSME

View File

@@ -3,74 +3,10 @@
An open source distribution of firmware utilizing coreboot, EDK2, and System76
firmware applications.
## Supported models
## Resources
These models are supported and will receive updates through the firmware
manager:
- addw2
- bonw14
- darp6
- darp7
- galp4
- galp5
- gaze15
- gaze16-3050
- gaze16-3060
- gaze16-3060-b
- lemp9
- lemp10
- oryp6
- oryp7
- oryp8
Other models may be in development or available without support, and can be
seen in the `models/` directory.
If the device becomes bricked it will require restoring the current firmware
using an external programmer. See [flashing](./docs/flashing.md) for details.
### Schematics
System76 customers may request board schematics for their system by sending an
email to firmware@system76.com with the subject line "Schematics for _model_",
where _model_ is one of the supported models listed above. Please include the
serial number of your system for verification.
You may not share these without explicit permission from System76.
## Changelog
For a list of important changes please see the [changelog](./CHANGELOG.md).
## Building
Dependencies can be installed with the provided script.
```
./scripts/deps.sh
```
If rustup was installed for the first time, it will be required to source the
environment file it installed to use the correct Rust toolchain.
```
source ~/.cargo/env
```
A script is provided to build the firmware. The available targets for building
are the model folders in `models/`. For example, to build for QEMU:
```
./scripts/build.sh qemu
```
Once built, the firmware must be flashed to use. Several scripts are available
to flash the new firmware, depending on how it is going to be written.
- `scripts/qemu.sh`: [Run the firmware in QEMU](./docs/debugging.md#using-qemu) (specific to the QEMU model)
- `scripts/flash.sh`: Flash using the internal flasher
- `scripts/ch341a-flash.sh`: Flash using a CH341A programmer
- `scripts/spipi-flash.sh`: Flash using a Raspberry Pi
See [Flashing firmware](./docs/flashing.md) for more details.
- [Project site](https://github.com/system76/firmware-open)
- [Documentation](./docs/index.md)
- [Issue tracker](https://github.com/system76/firmware-open/issues/)
- [Changelog](./CHANGELOG.md)
- [Legal information](./LICENSE.md)

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@@ -3,6 +3,5 @@
## Contents
- [firmware-setup](https://github.com/system76/firmware-setup.git) - System76 Firmware Setup
- [firmware-smmstore](https://github.com/system76/firmware-smmstore.git) - System76 Firmware SMMSTORE
- [firmware-update](https://github.com/system76/firmware-update.git) - System76 Firmware Update
- [gop-policy](https://github.com/system76/gop-policy.git) - System76 Platform GOP Policy

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@@ -1 +0,0 @@
# System76 Open Firmware Documentation

11
docs/SUMMARY.md Normal file
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@@ -0,0 +1,11 @@
# Summary
- [Index](./index.md)
- [Firmware features](./features.md)
- [Building firmware](./building.md)
- [Flashing firmware](./flashing.md)
- [Debugging](./debugging.md)
- [Adding a new board](./adding-a-new-board.md)
- [Intel CSME](./intel-me.md)
- [UEFI](./uefi.md)
- [Schematics](./schematics.md)

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@@ -61,22 +61,33 @@ If the microcode blobs from coreboot will not be used, then `microcode.rom`
must be generated for the correct CPU set from the private [intel-microcode]
repo.
Other things that should be dumped before porting/flashing are:
- The kernel log (`dmesg`)
- DMI info (`dmidecode`)
- ACPI tables (`acpidump -b`)
## Porting coreboot
To port coreboot to a new board, see the coreboot documentation.
- [TAS5825M] smart amp
Add a `coreboot.config` file to the model directory. This can be copied from
another similar board as a reference, just updating the name. Typically, the
only special cases that need to be handled are when an FSP or microcode is
used that are not part of coreboot.
Once coreboot is ported, add its configuration.
### Smart amp
```
cp coreboot/.config models/<model>/coreboot.config
```
Boards may have a smart amp, which must be configured for speaker output to
work.
### devicetree
The initialization data for Realtek smart amps can be dumped from the module
that does the codec init in proprietary firmware. The correct module can be
found using UEFITool by searching for the vendor/device ID of the codec, such
as "10ec1220" for the ALC1220. This is the start of the `cim_verb_data` array
in coreboot.
`generate.sh` does not create `devicetree.cb`. Some values for this file can be
produced using the `devicetree.py` script.
For info on the TI TAS5825M smart amp, see the [smart-amp] repo.
## Configuring Intel CSME
@@ -100,4 +111,4 @@ READMEs.
[external-programmer]: ./flashing.md#external-programmer
[intel-microcode]: https://github.com/system76/intel-microcode
[mega2560]: https://github.com/system76/ec/blob/master/doc/mega2560.md
[TAS5825M]: https://github.com/system76/smart-amp
[smart-amp]: https://github.com/system76/smart-amp

18
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@@ -0,0 +1,18 @@
[book]
title = "System76 Open Firmware"
description = "System76 Open Firmware documentation"
language = "en"
src = "."
[build]
build-dir = "../build/docs"
create-missing = false
[output.html]
default-theme = "rust"
preferred-dark-theme = "coal"
no-section-label = true
git-repository-url = "https://github.com/system76/firmware-open"
[output.html.print]
enable = false

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@@ -0,0 +1,31 @@
# Building
Dependencies can be installed with the provided script.
```
./scripts/install-deps.sh
```
If rustup was installed for the first time, it will be required to source the
environment file it installed to use the correct Rust toolchain.
```
. ~/.cargo/env
```
A script is provided to build the firmware. The available targets for building
are the model folders in `models/`. For example, to build for QEMU:
```
./scripts/build.sh qemu
```
Once built, the firmware must be flashed to use. Several scripts are available
to flash the new firmware, depending on how it is going to be written.
- `scripts/qemu.sh`: [Run the firmware in QEMU](./debugging.md#using-qemu) (specific to the QEMU model)
- `scripts/flash.sh`: Flash using firmware-update
- `scripts/ch341a-flash.sh`: Flash using a CH341A programmer
- `scripts/spipi-flash.sh`: Flash using a Raspberry Pi
See [Flashing firmware](./flashing.md) for more details.

View File

@@ -52,8 +52,8 @@ A couple of methods can be used to get debug logging.
This method requires no soldering of board components.
See [Debugging the EC firmware](./ec/doc/debugging.md) for details on setting
up EC debugging over the parallel port.
See [Debugging the EC firmware](https://github.com/system76/ec/blob/master/docs/debugging.md)
for details on setting up EC debugging over the parallel port.
cbmem output can be passed through the EC by enabling the driver in coreboot.
Uncomment the config in `models/<model>/coreboot.config` to enable logging the

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@@ -0,0 +1,190 @@
# System76 Open Firmware Feature Matrix
This lists important features provided by System76 Open Firmware. Your system
must be updated to at least the firmware version specified in the following
[platform tables](#platforms) to include all specified [features](#features).
To see the changes in specific firmware versions, see the
[changelog](./../CHANGELOG.md).
## Platforms
- [Intel 13th Gen (Raptor Lake)](#intel-13th-gen-raptor-lake)
- [Intel 12th Gen (Alder Lake)](#intel-12th-gen-alder-lake)
- [Intel 11th Gen (Tiger Lake)](#intel-11th-gen-tiger-lake)
- [Intel 10th Gen (Comet Lake)](#intel-10th-gen-comet-lake)
### Intel 13th Gen (Raptor Lake)
This generation universally supports these features with up-to-date firmware:
- [Intel VT-x](#intel-vt-x)
- [Intel VT-d](#intel-vt-d)
- [Disabled Management Engine](#disabled-management-engine)
- [TPM 2.0 Support](#tpm-20-support)
- [Battery Charging Thresholds](#battery-charging-thresholds)
- [Keyboard Customization](#keyboard-customization)
- [Measured Boot](#measured-boot)
- [Firmware Security System](#firmware-security-system)
- [Secure Boot Support](#secure-boot-support)
| System76 Model (Version) | Firmware Version | SoC | [Windows 11 Support](#windows-11-support) | [NVIDIA Dynamic Boost](#nvidia-dynamic-boost) |
|--------------------------|---------------------|--------|-----|-----|
| Adder WS (addw3) | 2023-05-17\_9560b2e | RPL-HX | ✔ | ✔ |
| Bonobo WS (bonw15) | 2023-07-10\_0e4a64a | RPL-HX | ✔ | ✔ |
| Darter Pro (darp9) | 2023-06-08\_a8590a5 | RPL-P | ✔ | N/A |
| Galago Pro (galp7) | 2023-05-25\_5608a8d | RPL-H | ✔ | N/A |
| Gazelle (gaze18) | 2023-03-22\_799ed79 | RPL-H | ✔ | ✔ |
| Lemur Pro (lemp12) | 2023-05-16\_e9b9ea8 | RPL-U | ✔ | N/A |
| Oryx Pro (oryp11) | 2023-06-22\_e5c3632 | RPL-H | ✔ | ✔ |
| Serval WS (serw13) | 2023-05-17\_9560b2e | RPL-HX | ✔ | ✔ |
### Intel 12th Gen (Alder Lake)
This generation universally supports these features with up-to-date firmware:
- [Intel VT-x](#intel-vt-x)
- [Intel VT-d](#intel-vt-d)
- [TPM 2.0 Support](#tpm-20-support)
- [Battery Charging Thresholds](#battery-charging-thresholds)
- [Keyboard Customization](#keyboard-customization)
- [Measured Boot](#measured-boot)
| System76 Model (Version) | Firmware Version | SoC |
|--------------------------|---------------------|--------|
| Darter Pro (darp8) | 2022-11-21\_b337ac6 | ADL-P |
| Galago Pro (galp6) | 2022-11-21\_b337ac6 | ADL-P |
| Gazelle (gaze17-3050) | 2022-11-21\_b337ac6 | ADL-H |
| Gazelle (gaze17-3060-b) | 2022-06-07\_090f9e0 | ADL-H |
| Lemur Pro (lemp11) | 2022-11-21\_b337ac6 | ADL-U |
| Oryx Pro (oryp9) | 2022-07-20\_ae6aa72 | ADL-H |
| Oryx Pro (oryp10) | 2022-09-26\_aa797d2 | ADL-H |
### Intel 11th Gen (Tiger Lake)
This generation universally supports these features with up-to-date firmware:
- [Intel VT-x](#intel-vt-x)
- [Intel VT-d](#intel-vt-d)
- [TPM 2.0 Support](#tpm-20-support)
- [Battery Charging Thresholds](#battery-charging-thresholds)
- [Keyboard Customization](#keyboard-customization)
| System76 Model (Version) | Firmware Version | SoC | [Measured Boot](#measured-boot) |
|--------------------------|---------------------|--------|----|
| Darter Pro (darp7) | 2022-11-21\_b337ac6 | TGL-U | ✔️ |
| Galago Pro (galp5) | 2022-11-21\_b337ac6 | TGL-U | ✔️ |
| Gazelle (gaze16-3050) | 2022-11-21\_b337ac6 | TGL-H | ✔️ |
| Gazelle (gaze16-3060) | 2021-09-30\_14b8a6e | TGL-H | ❌ |
| Gazelle (gaze16-3060-b) | 2021-11-01\_fb9d759 | TGL-H | ❌ |
| Lemur Pro (lemp10) | 2022-11-21\_b337ac6 | TGL-U | ✔️ |
| Oryx Pro (oryp8) | 2022-10-14\_4136ef8 | TGL-H | ✔️ |
### Intel 10th Gen (Comet Lake)
This generation universally supports these features with up-to-date firmware:
- [Intel VT-x](#intel-vt-x)
- [Intel VT-d](#intel-vt-d)
- [Disabled Management Engine](#disabled-management-engine)
- [TPM 2.0 Support](#tpm-20-support)
- [Battery Charging Thresholds](#battery-charging-thresholds)
- [Keyboard Customization](#keyboard-customization)
| System76 Model (Version) | Firmware Version | SoC | [Measured Boot](#measured-boot) |
|--------------------------|---------------------|--------|----|
| Adder WS (addw2) | 2022-11-21\_b337ac6 | CML-H | ✔️ |
| Bonobo WS (bonw14) | 2021-07-20\_93c2809 | CML-S | ❌ |
| Darter Pro (darp6) | 2021-07-20\_93c2809 | CML-U | ❌ |
| Gazelle (gaze15) | 2022-11-21\_b337ac6 | CML-H | ✔️ |
| Lemur Pro (lemp9) | 2021-07-20\_93c2809 | CML-U | ❌ |
| Oryx Pro (oryp6) | 2021-07-20\_93c2809 | CML-H | ❌ |
| Oryx Pro (oryp7) | 2022-11-21\_b337ac6 | CML-H | ✔️ |
## Features
### Intel VT-x
Intel Virtualization Technology is enabled, which provides support for high
performance virtual machines.
### Intel VT-d
Intel Virtualization Technology for Directed I/O is enabled, which provides
support for passing PCIe devices to virtual machines, and for protecting against
PCIe device craches and DMA attacks.
### Disabled Management Engine
The Intel Management Engine is disabled at runtime to improve security.
### TPM 2.0 Support
**Introduced in firmware version 2020-08-13.**
A discrete TPM 2.0 is available for use.
### Battery Charging Thresholds
**Introduced in firmware version 2020-10-19.**
Battery charging thresholds extend the life of the battery by reducing the
maximum charge that the battery is charged to, as well as the minimum charge
when charging the battery begins.
### Keyboard Customization
**Introduced in firmware version 2020-10-19.**
Keyboard customization allows the keyboard layout to be modified at runtime
using the
[System76 Keyboard Configurator](https://github.com/pop-os/keyboard-configurator/).
### Measured Boot
**Introduced in firmware version 2022-01-06.**
Measured boot uses the TPM to maintain hashes of all binaries used in the boot
process. This allows for detecting changes to the firmware, which can be used
by a system such as TPM2-TOTP or BitLocker to improve security.
### Firmware Security System
**Introduced in firmware version 2023-04-03.**
The firmware security system ensures both SoC and EC firmware is read-only at
runtime. Unlocking the firmware requires the system to reboot and physical
presence is required. The user must enter in a secure, randomly generated number
before the system can boot any third-party code while unlocked. Both EC firmware
and system firmware are locked on any boots where the prompt is not shown. For
screenshots showing this prompt, see the pull request here:
https://github.com/system76/firmware-setup/pull/18
### Secure Boot Support
**Introduced in firmware version 2023-04-03.**
A new firmware setup menu allows enabling and disabling Secure Boot and also
allows for entering setup mode for custom key enrollment. Work is being done in
Pop!\_OS to enable the use of custom secure boot keys, in addition to adding
TPM2-TOTP authentication of the firmware boot path. For screenshots showing the
new menus, see the pull request here:
https://github.com/system76/edk2/pull/38
### Windows 11 Support
**Introduced in firmware version 2023-04-03.**
Windows 11 requires [TPM 2.0 Support](#tpm-20-support) and
[Secure Boot Support](#secure-boot-support). For users wanting to use Windows, the use of Windows 11 is
recommended for Intel 12th Generation (Alder Lake) and newer systems, as it
includes a new scheduler that supports the efficiency cores.
### NVIDIA Dynamic Boost
**Introduced in firmware version 2023-04-03.**
On new systems with the NVIDIA 4000 series GPUs, NVIDIA Dynamic Boost has been
enabled with new code in coreboot. This allows power to be shared between the
CPU and GPU, diverting power to the subsystem that needs it most. This can
provide an additional 25W boost split between the CPU and GPU depending on the
task, significantly improving throughput and framerates.

View File

@@ -31,8 +31,8 @@ Use one of these methods for first-time flashing or flashing a bricked system.
### Identifying the BIOS chip
The packaging and protocol can be determined by `board_info.txt` in coreboot.
Laptops use a SOIC-8 package for the SPI flash ROM. Pin 1 is marked by a small
dot indent and a white paint mark. The silkscreen may also indicate pin 1.
Pin 1 is marked by a small dot indent and a white paint mark. The silkscreen
may also indicate pin 1.
### CH341A USB programmer - slower, but easier to set up

9
docs/index.md Normal file
View File

@@ -0,0 +1,9 @@
# Documentation
This is the documentation for System76 Open Firmware. It is set up to be used
with [mdBook](https://github.com/rust-lang/mdBook), which can generate HTML
output for easy navigation.
```
mdbook build --open docs/
```

View File

@@ -27,6 +27,34 @@ A restart is required for the change to take effect. On the boot after changing
the value, the system will perform a global reset (power off again) to complete
the change and ensure the IME is operating in a valid state.
### Checking the state
coreboot will log some IME data to cbmem during startup. This can be used to
check if it is in the correct state.
```
make -C coreboot/util/cbmem
sudo ./coreboot/util/cbmem/cbmem -c
```
When disabled it will report:
```
ME: Current Working State : 4
ME: Current Operation State : 1
ME: Current Operation Mode : 3
ME: Error Code : 2
```
When enabled it will report:
```
ME: Current Working State : 5
ME: Current Operation State : 1
ME: Current Operation Mode : 0
ME: Error Code : 0
```
## Tiger Lake-U
Models using TGL-U processors default to having the IME enabled. TGL-U removes

18
docs/schematics.md Normal file
View File

@@ -0,0 +1,18 @@
# Schematics
## Systems using System76 Open Firmware
System76 customers may request board schematics for their system by sending an
email to `firmware@system76.com` with the subject line:
> Schematics for &lt;model&gt;
where `<model>` is a model that uses firmware-open. Include the serial number
of your system for verification.
You may not share these without explicit permission from System76.
## Other models and components
System76 cannot provide schematics for models not using firmware-open, nor
datasheets for any components that are not already publicly available.

View File

@@ -14,12 +14,15 @@ Network functionality is disabled. Native PXE booting is not supported.
### Secure Boot
Secure Boot support is currently disabled.
Secure Boot support is enabled since system76/firmware-open@105e74b14613
(2023-04-03).
The implementation from 9elements is in development. If building a custom
image, the edk2 config `SECURE_BOOT_ENABLE` can be set to enable support.
A minimal firmware UI is available to delete all keys and enroll the default
keys. It is intended that most management is done from the OS.
There is currently no firmware UI to view or configure Secure Boot.
Note that the Secure Boot support present is only intended for allowing
Microsoft Windows installation checks to pass. It should not be relied on for
system security due to limitations of the implementation.
## Shell

2
ec

Submodule ec updated: 60dfb62f90...01be30f107

2
edk2

Submodule edk2 updated: a2abc5e15f...88f5720e16

Submodule edk2-non-osi deleted from 88ec4bf04c

Submodule edk2-platforms deleted from 3176197844

View File

@@ -1,9 +0,0 @@
# Libraries
## Contents
- [coreboot-fs](https://gitlab.redox-os.org/redox-os/coreboot-fs.git) - coreboot-fs
- [coreboot-table](https://gitlab.redox-os.org/redox-os/coreboot-table.git) - coreboot-table
- [intelflash](https://gitlab.redox-os.org/redox-os/intelflash.git) - intelflash
- [intel-spi](https://github.com/system76/intel-spi.git) - intel-spi
- [uefi](https://gitlab.redox-os.org/redox-os/uefi.git) - Redox UEFI

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@@ -1 +0,0 @@
# Libraries

Submodule libs/coreboot-fs deleted from 514f88c960

Submodule libs/intel-spi deleted from 9519851e48

Submodule libs/intelflash deleted from 443adc01d3

Submodule libs/uefi deleted from fcdb04f90d

View File

@@ -4,17 +4,22 @@
- [addw1](./addw1) - System76 Adder Workstation (addw1)
- [addw2](./addw2) - System76 Adder WS (addw2)
- [addw3](./addw3) - System76 Adder WS (addw3)
- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
- [bonw15](./bonw15) - System76 Bonobo WS (bonw15)
- [darp5](./darp5) - System76 Darter Pro (darp5)
- [darp6](./darp6) - System76 Darter Pro (darp6)
- [darp7](./darp7) - System76 Darter Pro (darp7)
- [darp8](./darp8) - System76 Darter Pro (darp8)
- [darp9](./darp9) - System76 Darter Pro (darp9)
- [galp2](./galp2) - System76 Galago Pro (galp2)
- [galp3](./galp3) - System76 Galago Pro (galp3)
- [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
- [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
- [galp4](./galp4) - System76 Galago Pro (galp4)
- [galp5](./galp5) - System76 Galago Pro (galp5)
- [galp6](./galp6) - System76 Galago Pro (galp6)
- [galp7](./galp7) - System76 Galago Pro (galp7)
- [gaze14_1650](./gaze14_1650) - System76 Gazelle (gaze14)
- [gaze14_1660ti](./gaze14_1660ti) - System76 Gazelle (gaze14)
- [gaze15](./gaze15) - System76 Gazelle (gaze15)
@@ -23,12 +28,17 @@
- [gaze16-3060-b](./gaze16-3060-b) - System76 Gazelle (gaze16)
- [gaze17-3050](./gaze17-3050) - System76 Gazelle (gaze17)
- [gaze17-3060-b](./gaze17-3060-b) - System76 Gazelle (gaze17-3060-b)
- [gaze18](./gaze18) - System76 Gazelle (gaze18)
- [lemp10](./lemp10) - System76 Lemur Pro (lemp10)
- [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
- [lemp12](./lemp12) - System76 Lemur Pro (lemp12)
- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
- [oryp10](./oryp10) - System76 Oryx Pro (oryp10)
- [oryp11](./oryp11) - System76 Oryx Pro (oryp11)
- [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
- [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
- [oryp7](./oryp7) - System76 Oryx Pro (oryp7)
- [oryp8](./oryp8) - System76 Oryx Pro (oryp8)
- [oryp9](./oryp9) - System76 Oryx Pro (oryp9)
- [qemu](./qemu) - QEMU (Virtualization)
- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)
- [serw13](./serw13) - System76 Serval WS (serw13)

View File

@@ -12,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_RUN_FSP_GOP=y
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y

View File

@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

View File

@@ -1,245 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD7, NONE, PWROK),
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x0000),
PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_A0, 0, NONE, DEEP),
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A16, DN_20K, DEEP),
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_A20, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_B3, 0x80100100, 0x0000),
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
PAD_CFG_GPI(GPP_B7, NONE, DEEP),
PAD_CFG_GPI(GPP_B8, NONE, DEEP),
PAD_CFG_GPI(GPP_B9, NONE, DEEP),
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x0000),
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_C2, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
PAD_CFG_GPI(GPP_C10, NONE, DEEP),
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
PAD_CFG_GPI(GPP_C13, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_C15, NONE, DEEP),
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
PAD_CFG_GPI(GPP_D8, NONE, DEEP),
PAD_CFG_GPI(GPP_D9, NONE, DEEP),
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
PAD_CFG_GPI(GPP_D11, NONE, DEEP),
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
PAD_CFG_GPI(GPP_D16, NONE, DEEP),
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_E6, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
PAD_CFG_GPI(GPP_F0, NONE, DEEP),
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F3, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F4, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
PAD_CFG_GPI(GPP_F6, NONE, DEEP),
PAD_CFG_GPI(GPP_F7, NONE, DEEP),
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_F22, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H6, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H7, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_H16, 0x44000101, 0x0000),
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_H18, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H19, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_H23, 0x82880100, 0x0000),
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_I5, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_I6, NONE, DEEP),
PAD_CFG_GPI(GPP_I7, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I8, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_I10, NONE, DEEP),
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I12, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_I13, NONE, DEEP),
PAD_CFG_GPI(GPP_I14, NONE, DEEP),
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_J10, NONE, DEEP),
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K2, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_K4, NONE, DEEP),
PAD_CFG_GPI(GPP_K5, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_K7, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K8, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_K9, NONE, DEEP),
PAD_CFG_GPI(GPP_K10, NONE, DEEP),
PAD_CFG_GPI(GPP_K11, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K12, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_K13, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K15, 0x80100100, 0x0000),
PAD_CFG_GPI(GPP_K16, NONE, DEEP),
PAD_CFG_GPI(GPP_K17, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K19, 0x42800101, 0x0000),
PAD_CFG_GPI(GPP_K20, NONE, DEEP),
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K22, 0x44000101, 0x0000),
PAD_CFG_GPI(GPP_K23, NONE, DEEP),
};
#endif
#endif

View File

@@ -1,43 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
/* Realtek, ALC1220 */
0x10ec1220, /* Vendor ID */
0x155865d1, /* Subsystem ID */
12, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x155865d1),
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
AZALIA_PIN_CFG(0, 0x15, 0x40000000),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
/* Intel, KabylakeHDMI */
0x8086280b, /* Vendor ID */
0x80860101, /* Subsystem ID */
4, /* Number of entries */
AZALIA_SUBVENDOR(2, 0x80860101),
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
AZALIA_PIN_CFG(2, 0x07, 0x18560010),
/* Nvidia, GPU93HDMI/DP */
0x10de0093, /* Vendor ID */
0x155865d1, /* Subsystem ID */
5, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x155865d1),
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
};
const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;

View File

@@ -12,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_RUN_FSP_GOP=y
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y

View File

@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

View File

@@ -1,258 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2019 System76
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD7, NONE, PWROK),
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
_PAD_CFG_STRUCT(GPD10, 0x04000601, 0x0000),
PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A0, NONE, DEEP),
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_A14, 0x80800100, 0x0000),
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A16, DN_20K, DEEP),
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_A21, 0x46080100, 0x0000),
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_B0, 0x42080100, 0x3000),
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_B3, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_B7, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_B8, NONE, DEEP),
PAD_CFG_GPI(GPP_B9, NONE, DEEP),
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_B13, 0x44000601, 0x0000),
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_B20, 0x42840101, 0x0000),
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
PAD_CFG_GPI(GPP_C10, NONE, DEEP),
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
PAD_CFG_GPI(GPP_C12, NONE, DEEP),
PAD_CFG_GPI(GPP_C13, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C14, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_C15, NONE, DEEP),
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
PAD_CFG_GPI(GPP_C23, NONE, DEEP),
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
PAD_CFG_GPI(GPP_D8, NONE, DEEP),
PAD_CFG_GPI(GPP_D9, NONE, DEEP),
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
PAD_CFG_GPI(GPP_D11, NONE, DEEP),
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
PAD_CFG_GPI(GPP_D16, NONE, DEEP),
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_E6, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
PAD_CFG_GPI(GPP_F0, NONE, DEEP),
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F3, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_F4, NONE, DEEP),
PAD_CFG_GPI(GPP_F5, NONE, DEEP),
PAD_CFG_GPI(GPP_F6, NONE, DEEP),
PAD_CFG_GPI(GPP_F7, NONE, DEEP),
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F9, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_F22, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_F23, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H3, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H6, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H7, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_H9, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H16, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H17, 0, NONE, PLTRST),
PAD_CFG_GPI(GPP_H18, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H19, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H20, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_H23, 0x82880100, 0x0000),
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_I5, 0, UP_20K, PLTRST),
PAD_CFG_GPI(GPP_I6, NONE, DEEP),
PAD_CFG_GPI(GPP_I7, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I8, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_I10, NONE, DEEP),
PAD_CFG_GPI(GPP_I11, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I12, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_I13, NONE, DEEP),
PAD_CFG_GPI(GPP_I14, NONE, DEEP),
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_J1, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_J2, NONE, DEEP),
PAD_CFG_GPI(GPP_J3, NONE, DEEP),
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J9, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_J10, NONE, DEEP),
PAD_CFG_GPI(GPP_J11, DN_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K0, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K1, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K2, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K3, 0x40880100, 0x0000),
_PAD_CFG_STRUCT(GPP_K4, 0x44000101, 0x0000),
PAD_CFG_GPI(GPP_K5, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_K7, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K8, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K9, NONE, DEEP),
PAD_CFG_GPI(GPP_K10, NONE, DEEP),
PAD_CFG_GPI(GPP_K11, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K12, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K13, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K15, 0x80100100, 0x0000),
PAD_CFG_GPI(GPP_K16, NONE, DEEP),
PAD_CFG_GPI(GPP_K17, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_K19, NONE, DEEP),
PAD_CFG_GPI(GPP_K20, NONE, DEEP),
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K22, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K23, NONE, DEEP),
};
#endif
#endif

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@@ -1,43 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
/* Realtek, ALC1220 */
0x10ec1220, /* Vendor ID */
0x155865e1, /* Subsystem ID */
12, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x155865e1),
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
AZALIA_PIN_CFG(0, 0x15, 0x40000000),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
/* Intel, KabylakeHDMI */
0x8086280b, /* Vendor ID */
0x80860101, /* Subsystem ID */
4, /* Number of entries */
AZALIA_SUBVENDOR(2, 0x80860101),
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
AZALIA_PIN_CFG(2, 0x07, 0x18560010),
/* Nvidia, GPU92HDMI/DP */
0x10de0092, /* Vendor ID */
0x155865e1, /* Subsystem ID */
5, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x155865e1),
AZALIA_PIN_CFG(0, 0x04, 0x185600f0),
AZALIA_PIN_CFG(0, 0x05, 0x185600f0),
AZALIA_PIN_CFG(0, 0x06, 0x185600f0),
AZALIA_PIN_CFG(0, 0x07, 0x185600f0),
};
const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;

BIN
models/addw3/IntelGopDriver.efi (Stored with Git LFS) Normal file

Binary file not shown.

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@@ -1,6 +1,4 @@
# System76 Thelio (thelio-b1)
https://system76.com/guides/thelio/b1
# System76 Adder WS (addw3)
## Contents
@@ -10,5 +8,5 @@ https://system76.com/guides/thelio/b1
- Size: 4 KB
- HAP: false
- [ME](./me.rom)
- Size: 3060 KB
- Version: 12.0.0.1069
- Size: 3944 KB
- Version: 16.1.25.2091

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@@ -0,0 +1 @@
# System76 Adder WS (addw3)

1
models/addw3/chip.txt Normal file
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@@ -0,0 +1 @@
GD25Q256D

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@@ -0,0 +1,333 @@
## PCI ##
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
PCI Device: 0000:00:1b.0: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3C, Revision 0x11
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
PCI Device: 0000:00:1f.3: Class 0x00040100, Vendor 0x8086, Device 0x7A50, Revision 0x11
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
PCI Device: 0000:00:1f.6: Class 0x00020000, Vendor 0x8086, Device 0x0DC8, Revision 0x11
PCI Device: 0000:01:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x2820, Revision 0xA1
PCI Device: 0000:01:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BD, Revision 0xA1
PCI Device: 0000:02:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
PCI Device: 0000:03:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
PCI Device: 0000:03:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
PCI Device: 0000:03:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
PCI Device: 0000:03:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1133, Revision 0x02
PCI Device: 0000:04:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1134, Revision 0x00
PCI Device: 0000:39:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1135, Revision 0x00
PCI Device: 0000:6c:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
PCI Device: 10000:e0:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
PCI Device: 10000:e0:1d.4: Class 0x00060400, Vendor 0x8086, Device 0x7A34, Revision 0x11
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
## GPIO ##
600 Series PCH
GPP_I0 (0x6E,0x00) 0x44000100 0x00000018 0x00000000 0x00000000
GPP_I1 (0x6E,0x02) 0x44000500 0x00000019 0x00000000 0x00000000
GPP_I2 (0x6E,0x04) 0x86800100 0x0000001a 0x00000000 0x00000000
GPP_I3 (0x6E,0x06) 0x44000500 0x0000001b 0x00000000 0x00000000
GPP_I4 (0x6E,0x08) 0x86800100 0x0000001c 0x00000000 0x00000000
GPP_I5 (0x6E,0x0A) 0x84000201 0x0000001d 0x00000000 0x00000000
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
GPP_I7 (0x6E,0x0E) 0x44000300 0x00000020 0x00000000 0x00000000
GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
GPP_I9 (0x6E,0x12) 0x44000300 0x00000022 0x00000000 0x00000000
GPP_I10 (0x6E,0x14) 0x44000300 0x00000023 0x00000000 0x00000000
GPP_I11 (0x6E,0x16) 0x84000402 0x00000024 0x00000000 0x00000000
GPP_I12 (0x6E,0x18) 0x84000402 0x00000025 0x00000000 0x00000000
GPP_I13 (0x6E,0x1A) 0x84000402 0x00000026 0x00000000 0x00000000
GPP_I14 (0x6E,0x1C) 0x84000402 0x00000027 0x00000000 0x00000000
GPP_I15 (0x6E,0x1E) 0x44000300 0x00000028 0x00000000 0x00000000
GPP_I16 (0x6E,0x20) 0x44000300 0x00000029 0x00000000 0x00000000
GPP_I17 (0x6E,0x22) 0x44000300 0x0000002a 0x00000000 0x00000000
GPP_I18 (0x6E,0x24) 0x44000200 0x0000002b 0x00000000 0x00000000
GPP_I19 (0x6E,0x26) 0x44000300 0x0000002c 0x00000000 0x00000000
GPP_I20 (0x6E,0x28) 0x44000300 0x0000002d 0x00000000 0x00000000
GPP_I21 (0x6E,0x2A) 0x44000300 0x0000002e 0x00000000 0x00000000
GPP_I22 (0x6E,0x2C) 0x44000200 0x00000030 0x00000000 0x00000000
GPP_R0 (0x6E,0x32) 0x44000600 0x00000031 0x00000000 0x00000000
GPP_R1 (0x6E,0x34) 0x44000600 0x00003c32 0x00000000 0x00000000
GPP_R2 (0x6E,0x36) 0x44000600 0x00003c33 0x00000000 0x00000000
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
GPP_R4 (0x6E,0x3A) 0x44000600 0x00000035 0x00000000 0x00000000
GPP_R5 (0x6E,0x3C) 0x44000300 0x00000036 0x00000000 0x00000000
GPP_R6 (0x6E,0x3E) 0x44000300 0x00000037 0x00000000 0x00000000
GPP_R7 (0x6E,0x40) 0x44000300 0x00000038 0x00000000 0x00000000
GPP_R8 (0x6E,0x42) 0x84000102 0x00000039 0x00000000 0x00000000
GPP_R9 (0x6E,0x44) 0x44000502 0x0000003a 0x00000000 0x00000000
GPP_R10 (0x6E,0x46) 0x44000300 0x0000003b 0x00000000 0x00000000
GPP_R11 (0x6E,0x48) 0x44000300 0x0000003c 0x00000000 0x00000000
GPP_R12 (0x6E,0x4A) 0x44000300 0x0000003d 0x00000000 0x00000000
GPP_R13 (0x6E,0x4C) 0x44000300 0x0000003e 0x00000000 0x00000000
GPP_R14 (0x6E,0x4E) 0x44000300 0x0000003f 0x00000000 0x00000000
GPP_R15 (0x6E,0x50) 0x44000300 0x00000040 0x00000000 0x00000000
GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
GPP_R17 (0x6E,0x54) 0x44000300 0x00000042 0x00000000 0x00000000
GPP_R18 (0x6E,0x56) 0x44000300 0x00000043 0x00000000 0x00000000
GPP_R19 (0x6E,0x58) 0x44000300 0x00000044 0x00000000 0x00000000
GPP_R20 (0x6E,0x5A) 0x44000300 0x00000045 0x00000000 0x00000000
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
GPP_J0 (0x6E,0x60) 0x44000502 0x00000047 0x00000000 0x00000000
GPP_J1 (0x6E,0x62) 0x84000600 0x00000048 0x00000000 0x00000000
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
GPP_J5 (0x6E,0x6A) 0x44000502 0x0000304c 0x00000000 0x00000000
GPP_J6 (0x6E,0x6C) 0x44000502 0x0000004d 0x00000000 0x00000000
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
GPP_J8 (0x6E,0x70) 0x44000300 0x00000050 0x00000000 0x00000000
GPP_J9 (0x6E,0x72) 0x44000300 0x00000051 0x00000000 0x00000000
GPP_J10 (0x6E,0x74) 0x44000700 0x00001052 0x00000000 0x00000000
GPP_J11 (0x6E,0x76) 0x44000700 0x00001053 0x00000000 0x00000000
GPP_B0 (0x6D,0x00) 0x40100102 0x00000050 0x00000000 0x00000000
GPP_B1 (0x6D,0x02) 0x44000300 0x00000051 0x00000000 0x00000000
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
GPP_B4 (0x6D,0x08) 0x44000300 0x00000054 0x00000000 0x00000000
GPP_B5 (0x6D,0x0A) 0x44000300 0x00000055 0x00000000 0x00000000
GPP_B6 (0x6D,0x0C) 0x44000300 0x00000056 0x00000000 0x00000000
GPP_B7 (0x6D,0x0E) 0x44000300 0x00000057 0x00000000 0x00000000
GPP_B8 (0x6D,0x10) 0x44000300 0x00000058 0x00000000 0x00000000
GPP_B9 (0x6D,0x12) 0x44000300 0x00000059 0x00000000 0x00000000
GPP_B10 (0x6D,0x14) 0x44000300 0x0000005a 0x00000000 0x00000000
GPP_B11 (0x6D,0x16) 0x44000300 0x0000005b 0x00000000 0x00000000
GPP_B12 (0x6D,0x18) 0x44000600 0x0000005c 0x00000000 0x00000000
GPP_B13 (0x6D,0x1A) 0x44000600 0x0000005d 0x00000000 0x00000000
GPP_B14 (0x6D,0x1C) 0x44000200 0x0000005e 0x00000000 0x00000000
GPP_B15 (0x6D,0x1E) 0x44000102 0x0000005f 0x00000000 0x00000000
GPP_B16 (0x6D,0x20) 0x44000300 0x00000060 0x00000000 0x00000000
GPP_B17 (0x6D,0x22) 0x44000300 0x00000061 0x00000000 0x00000000
GPP_B18 (0x6D,0x24) 0x04000602 0x00000062 0x00000000 0x00000000
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
GPP_B20 (0x6D,0x28) 0x44000700 0x00001064 0x00000000 0x00000000
GPP_B21 (0x6D,0x2A) 0x42880102 0x00000065 0x00000000 0x00000000
GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
GPP_B23 (0x6D,0x2E) 0x44000200 0x00000067 0x00000800 0x00000000
GPP_G0 (0x6D,0x30) 0x44000100 0x00000068 0x00000000 0x00000000
GPP_G1 (0x6D,0x32) 0x44000102 0x00000069 0x00000000 0x00000000
GPP_G2 (0x6D,0x34) 0x44000700 0x0000106a 0x00000000 0x00000000
GPP_G3 (0x6D,0x36) 0x44000100 0x0000006b 0x00000000 0x00000000
GPP_G4 (0x6D,0x38) 0x44000102 0x0000006c 0x00000000 0x00000000
GPP_G5 (0x6D,0x3A) 0x44000600 0x0000006d 0x00000000 0x00000000
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
GPP_G7 (0x6D,0x3E) 0x44000100 0x0000006f 0x00000000 0x00000000
GPP_H0 (0x6D,0x40) 0x44000300 0x00000070 0x00000000 0x00000000
GPP_H1 (0x6D,0x42) 0x44000102 0x00000071 0x00000000 0x00000000
GPP_H2 (0x6D,0x44) 0x44000702 0x00000072 0x00000000 0x00000000
GPP_H3 (0x6D,0x46) 0x44000300 0x00000073 0x00000000 0x00000000
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
GPP_H6 (0x6D,0x4C) 0x44000702 0x00000076 0x00000000 0x00000000
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
GPP_H9 (0x6D,0x52) 0x44000700 0x00000019 0x00000000 0x00000000
GPP_H10 (0x6D,0x54) 0x84000402 0x00000020 0x00000000 0x00000000
GPP_H11 (0x6D,0x56) 0x84000402 0x00000021 0x00000000 0x00000000
GPP_H12 (0x6D,0x58) 0x44000200 0x00000022 0x00000000 0x00000000
GPP_H13 (0x6D,0x5A) 0x84000402 0x00000023 0x00000000 0x00000000
GPP_H14 (0x6D,0x5C) 0x84000402 0x00000024 0x00000000 0x00000000
GPP_H15 (0x6D,0x5E) 0x84000402 0x00000025 0x00000800 0x00000000
GPP_H16 (0x6D,0x60) 0x84000402 0x00000026 0x00000000 0x00000000
GPP_H17 (0x6D,0x62) 0x84000201 0x00000027 0x00000000 0x00000000
GPP_H18 (0x6D,0x64) 0x44000200 0x00000028 0x00000000 0x00000000
GPP_H19 (0x6D,0x66) 0x44000300 0x00000029 0x00000000 0x00000000
GPP_H20 (0x6D,0x68) 0x44000300 0x0000002a 0x00000000 0x00000000
GPP_H21 (0x6D,0x6A) 0x44000200 0x0000002b 0x00000000 0x00000000
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
GPP_H23 (0x6D,0x6E) 0x44000300 0x0000002d 0x00000000 0x00000000
GPD0 (0x6C,0x00) 0x04000502 0x00003060 0x00000000 0x00000000
GPD1 (0x6C,0x02) 0x04000502 0x00003c61 0x00000000 0x00000000
GPD2 (0x6C,0x04) 0x04000702 0x00000062 0x00000000 0x00000000
GPD3 (0x6C,0x06) 0x04000502 0x00003063 0x00000010 0x00000000
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
GPD7 (0x6C,0x0E) 0x04000200 0x00000067 0x00000000 0x00000000
GPD8 (0x6C,0x10) 0x04000600 0x00000068 0x00000000 0x00000000
GPD9 (0x6C,0x12) 0x04000600 0x00000069 0x00000000 0x00000000
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
GPD12 (0x6C,0x18) 0x04000300 0x0000006c 0x00000000 0x00000000
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
GPP_A7 (0x6B,0x20) 0x44000700 0x00003025 0x00000000 0x00000000
GPP_A8 (0x6B,0x22) 0x44000700 0x00003026 0x00000000 0x00000000
GPP_A9 (0x6B,0x24) 0x44000700 0x00003027 0x00000000 0x00000000
GPP_A10 (0x6B,0x26) 0x44000702 0x00003028 0x00000000 0x00000000
GPP_A11 (0x6B,0x28) 0x44000702 0x00003029 0x00000000 0x00000000
GPP_A12 (0x6B,0x2A) 0x44000702 0x0000302a 0x00000000 0x00000000
GPP_A13 (0x6B,0x2C) 0x44000702 0x0000302b 0x00000000 0x00000000
GPP_A14 (0x6B,0x2E) 0x44000300 0x0000002c 0x00000000 0x00000000
GPP_C0 (0x6B,0x32) 0x44000402 0x0000002d 0x00000000 0x00000000
GPP_C1 (0x6B,0x34) 0x44000402 0x0000002e 0x00000000 0x00000000
GPP_C2 (0x6B,0x36) 0x44000200 0x0000002f 0x00000800 0x00000000
GPP_C3 (0x6B,0x38) 0x44000c02 0x00000030 0x00000000 0x00000000
GPP_C4 (0x6B,0x3A) 0x44000c02 0x00000031 0x00000000 0x00000000
GPP_C5 (0x6B,0x3C) 0x44000200 0x00000032 0x00000000 0x00000000
GPP_C6 (0x6B,0x3E) 0x44000802 0x00000033 0x00000000 0x00000000
GPP_C7 (0x6B,0x40) 0x44000802 0x00000034 0x00000000 0x00000000
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
GPP_C9 (0x6B,0x44) 0x44000300 0x00000036 0x00000000 0x00000000
GPP_C10 (0x6B,0x46) 0x44000201 0x00000037 0x00000000 0x00000000
GPP_C11 (0x6B,0x48) 0x44000201 0x00000038 0x00000000 0x00000000
GPP_C12 (0x6B,0x4A) 0x44000300 0x00000039 0x00000000 0x00000000
GPP_C13 (0x6B,0x4C) 0x44000300 0x0000003a 0x00000000 0x00000000
GPP_C14 (0x6B,0x4E) 0x44000300 0x0000003b 0x00000000 0x00000000
GPP_C15 (0x6B,0x50) 0x44000300 0x0000003c 0x00000000 0x00000000
GPP_C16 (0x6B,0x52) 0x44000402 0x0000003d 0x00000000 0x00000000
GPP_C17 (0x6B,0x54) 0x44000402 0x0000003e 0x00000000 0x00000000
GPP_C18 (0x6B,0x56) 0x44000402 0x0000003f 0x00000000 0x00000000
GPP_C19 (0x6B,0x58) 0x44000402 0x00000040 0x00000000 0x00000000
GPP_C20 (0x6B,0x5A) 0x44000300 0x00000041 0x00000000 0x00000000
GPP_C21 (0x6B,0x5C) 0x44000300 0x00000042 0x00000000 0x00000000
GPP_C22 (0x6B,0x5E) 0x44000300 0x00000043 0x00000000 0x00000000
GPP_C23 (0x6B,0x60) 0x44000300 0x00000044 0x00000000 0x00000000
GPP_S0 (0x6A,0x00) 0x44000300 0x01800030 0x00000000 0x00000000
GPP_S1 (0x6A,0x02) 0x44000300 0x01800031 0x00000000 0x00000000
GPP_S2 (0x6A,0x04) 0x44000300 0x01800032 0x00000000 0x00000000
GPP_S3 (0x6A,0x06) 0x44000300 0x01800033 0x00000000 0x00000000
GPP_S4 (0x6A,0x08) 0x44000300 0x01800034 0x00000000 0x00000000
GPP_S5 (0x6A,0x0A) 0x44000300 0x01800035 0x00000000 0x00000000
GPP_S6 (0x6A,0x0C) 0x44000a00 0x01800036 0x00000000 0x00000000
GPP_S7 (0x6A,0x0E) 0x44000900 0x01800037 0x00000000 0x00000000
GPP_E0 (0x6A,0x10) 0x44000300 0x00000038 0x00000000 0x00000000
GPP_E1 (0x6A,0x12) 0x44000300 0x00000039 0x00000000 0x00000000
GPP_E2 (0x6A,0x14) 0x44000300 0x0000003a 0x00000000 0x00000000
GPP_E3 (0x6A,0x16) 0x42840103 0x0000003b 0x00000000 0x00000000
GPP_E4 (0x6A,0x18) 0x44000300 0x0000003c 0x00000000 0x00000000
GPP_E5 (0x6A,0x1A) 0x44000300 0x0000003d 0x00000000 0x00000000
GPP_E6 (0x6A,0x1C) 0x44000300 0x0000003e 0x00000000 0x00000000
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
GPP_E8 (0x6A,0x20) 0x44000600 0x00000040 0x00000000 0x00000000
GPP_E9 (0x6A,0x22) 0x44000602 0x00000041 0x00000800 0x00000000
GPP_E10 (0x6A,0x24) 0x44000602 0x00000042 0x00000800 0x00000000
GPP_E11 (0x6A,0x26) 0x44000602 0x00000043 0x00000800 0x00000000
GPP_E12 (0x6A,0x28) 0x44000602 0x00000044 0x00000000 0x00000000
GPP_E13 (0x6A,0x2A) 0x44000300 0x00000045 0x00000000 0x00000000
GPP_E14 (0x6A,0x2C) 0x44000300 0x00000046 0x00000000 0x00000000
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
GPP_E16 (0x6A,0x30) 0x44000300 0x00000048 0x00000000 0x00000000
GPP_E17 (0x6A,0x32) 0x44000102 0x00001049 0x00000000 0x00000000
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
GPP_E19 (0x6A,0x36) 0x44000300 0x0000004b 0x00000000 0x00000000
GPP_E20 (0x6A,0x38) 0x44000300 0x0000004c 0x00000000 0x00000000
GPP_E21 (0x6A,0x3A) 0x44000300 0x0000004d 0x00000000 0x00000000
GPP_K0 (0x6A,0x3E) 0x42800102 0x0000004e 0x00000000 0x00000000
GPP_K1 (0x6A,0x40) 0x44000300 0x00000050 0x00000000 0x00000000
GPP_K2 (0x6A,0x42) 0x44000300 0x00000051 0x00000000 0x00000000
GPP_K3 (0x6A,0x44) 0x84000201 0x00000052 0x00000000 0x00000000
GPP_K4 (0x6A,0x46) 0x04000200 0x00000053 0x00000000 0x00000000
GPP_K5 (0x6A,0x48) 0x44000300 0x00000054 0x00000000 0x00000000
GPP_K6 (0x6A,0x4A) 0x44000b02 0x00003055 0x00000000 0x00000000
GPP_K7 (0x6A,0x4C) 0x44000b00 0x00001056 0x00000000 0x00000000
GPP_K8 (0x6A,0x4E) 0x44000600 0x00000057 0x00000000 0x00000000
GPP_K9 (0x6A,0x50) 0x44000600 0x00000058 0x00000000 0x00000000
GPP_K10 (0x6A,0x52) 0x44000b02 0x00003059 0x00000000 0x00000000
GPP_K11 (0x6A,0x54) 0x44000300 0x0000005a 0x00000000 0x00000000
GPP_F0 (0x6A,0x5C) 0x44000a02 0x0000005b 0x00000000 0x00000000
GPP_F1 (0x6A,0x5E) 0x44000300 0x0000005c 0x00000000 0x00000000
GPP_F2 (0x6A,0x60) 0x84000201 0x0000005d 0x00000000 0x00000000
GPP_F3 (0x6A,0x62) 0x84000201 0x0000005e 0x00000000 0x00000000
GPP_F4 (0x6A,0x64) 0x84000201 0x00000060 0x00000000 0x00000000
GPP_F5 (0x6A,0x66) 0x44000600 0x00000061 0x00000000 0x00000000
GPP_F6 (0x6A,0x68) 0x44000300 0x00000062 0x00000000 0x00000000
GPP_F7 (0x6A,0x6A) 0x84000102 0x00000063 0x00000000 0x00000000
GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
GPP_F9 (0x6A,0x6E) 0x44000201 0x00000065 0x00000000 0x00000000
GPP_F10 (0x6A,0x70) 0x44000300 0x00000066 0x00000000 0x00000000
GPP_F11 (0x6A,0x72) 0x44000300 0x00000067 0x00000000 0x00000000
GPP_F12 (0x6A,0x74) 0x44000300 0x00000068 0x00000000 0x00000000
GPP_F13 (0x6A,0x76) 0x44000300 0x00000069 0x00000000 0x00000000
GPP_F14 (0x6A,0x78) 0x44000700 0x0000006a 0x00000000 0x00000000
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
GPP_F16 (0x6A,0x7C) 0x44000300 0x0000006c 0x00000000 0x00000000
GPP_F17 (0x6A,0x7E) 0x44000102 0x0000006d 0x00000000 0x00000000
GPP_F18 (0x6A,0x80) 0x84000200 0x0000006e 0x00000000 0x00000000
GPP_F19 (0x6A,0x82) 0x44000600 0x0000006f 0x00000000 0x00000000
GPP_F20 (0x6A,0x84) 0x44000600 0x00000070 0x00000000 0x00000000
GPP_F21 (0x6A,0x86) 0x44000600 0x00000071 0x00000000 0x00000000
GPP_F22 (0x6A,0x88) 0x44000300 0x00000072 0x00000000 0x00000000
GPP_F23 (0x6A,0x8A) 0x44000300 0x00000073 0x00000000 0x00000000
GPP_D0 (0x69,0x20) 0x44000300 0x00000026 0x00000000 0x00000000
GPP_D1 (0x69,0x22) 0x44000300 0x00000027 0x00000000 0x00000000
GPP_D2 (0x69,0x24) 0x44000300 0x00000028 0x00000000 0x00000000
GPP_D3 (0x69,0x26) 0x44000300 0x00000029 0x00000000 0x00000000
GPP_D4 (0x69,0x28) 0x44000300 0x0000002a 0x00000000 0x00000000
GPP_D5 (0x69,0x2A) 0x44000300 0x0000002b 0x00000000 0x00000000
GPP_D6 (0x69,0x2C) 0x44000300 0x0000002c 0x00000000 0x00000000
GPP_D7 (0x69,0x2E) 0x44000300 0x0000002d 0x00000000 0x00000000
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
GPP_D9 (0x69,0x32) 0x40000702 0x00003c00 0x00000000 0x00000000
GPP_D10 (0x69,0x34) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
GPP_D13 (0x69,0x3A) 0x40000702 0x00003c00 0x00000000 0x00000000
GPP_D14 (0x69,0x3C) 0x40000702 0x00003c00 0x00000000 0x00000000
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
GPP_D22 (0x69,0x4C) 0x40000700 0x00000000 0x00000000 0x00000000
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
## HDAUDIO ##
hdaudioC0D0
vendor_name: Realtek
chip_name: ALC256
vendor_id: 0x10ec0256
subsystem_id: 0x1558a671
revision_id: 0x100002
0x12: 0x90a60130
0x13: 0x40000000
0x14: 0x90170110
0x18: 0x411111f0
0x19: 0x411111f0
0x1a: 0x411111f0
0x1b: 0x02a11040
0x1d: 0x41700001
0x1e: 0x411111f0
0x21: 0x02211020
hdaudioC0D2
vendor_name: Intel
chip_name: Raptorlake HDMI
vendor_id: 0x80862818
subsystem_id: 0x80860101
revision_id: 0x100000
0x04: 0x18560010
0x06: 0x18560010
0x08: 0x18560010
0x0a: 0x18560010
0x0b: 0x18560010
0x0c: 0x18560010
0x0d: 0x18560010
0x0e: 0x18560010
0x0f: 0x18560010
hdaudioC1D0
vendor_name: Nvidia
chip_name: Generic HDMI
vendor_id: 0x10de00a6
subsystem_id: 0x10de0000
revision_id: 0x100100
0x04: 0x185600f0
0x05: 0x585600f0
0x06: 0x185600f0
0x07: 0x585600f0

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@@ -0,0 +1,21 @@
CONFIG_VENDOR_SYSTEM76=y
CONFIG_BOARD_SYSTEM76_ADDW3=y
CONFIG_CCACHE=y
CONFIG_CONSOLE_SERIAL=n
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
CONFIG_HAVE_GBE_BIN=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
CONFIG_GBE_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/gbe.rom"
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
CONFIG_PAYLOAD_ELF=y
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
#CONFIG_CONSOLE_SYSTEM76_EC=y

1
models/addw3/ec.config Normal file
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BOARD=system76/addw3

89
models/addw3/ecspy.txt Normal file
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@@ -0,0 +1,89 @@
id 5570 rev 6
A0: data 1 mirror 1 pot 0 control 00
A1: data 0 mirror 0 pot 0 control 00
A2: data 0 mirror 1 pot 0 control 00
A3: data 1 mirror 1 pot 0 control 80
A4: data 0 mirror 0 pot 0 control 00
A5: data 0 mirror 0 pot 0 control 00
A6: data 0 mirror 0 pot 0 control 00
A7: data 0 mirror 1 pot 0 control 00
B0: data 0 mirror 0 pot 0 control 84
B1: data 1 mirror 1 pot 0 control 84
B2: data 1 mirror 1 pot 0 control 80
B3: data 1 mirror 1 pot 0 control 80
B4: data 1 mirror 1 pot 0 control 40
B5: data 1 mirror 1 pot 0 control 40
B6: data 1 mirror 1 pot 0 control 44
B7: data 1 mirror 1 pot 0 control 80
C0: data 1 mirror 1 pot 0 control 80
C1: data 1 mirror 1 pot 0 control 04
C2: data 1 mirror 1 pot 0 control 04
C3: data 0 mirror 0 pot 0 control 04
C4: data 0 mirror 0 pot 0 control 84
C5: data 0 mirror 0 pot 0 control 04
C6: data 1 mirror 1 pot 0 control 40
C7: data 1 mirror 1 pot 0 control 44
D0: data 1 mirror 1 pot 0 control 44
D1: data 1 mirror 1 pot 0 control 44
D2: data 1 mirror 1 pot 0 control 00
D3: data 1 mirror 1 pot 0 control 44
D4: data 1 mirror 1 pot 0 control 40
D5: data 1 mirror 1 pot 0 control 44
D6: data 1 mirror 1 pot 0 control 02
D7: data 0 mirror 0 pot 0 control 02
E0: data 1 mirror 1 pot 0 control 04
E1: data 1 mirror 1 pot 0 control 44
E2: data 0 mirror 0 pot 0 control 84
E3: data 1 mirror 1 pot 0 control 40
E4: data 1 mirror 1 pot 0 control 42
E5: data 1 mirror 1 pot 0 control 40
E6: data 1 mirror 1 pot 0 control 80
E7: data 1 mirror 1 pot 0 control 04
F0: data 0 mirror 0 pot 0 control 44
F1: data 1 mirror 1 pot 0 control 44
F2: data 1 mirror 1 pot 0 control 44
F3: data 1 mirror 1 pot 0 control 40
F4: data 1 mirror 1 pot 0 control 04
F5: data 1 mirror 1 pot 0 control 04
F6: data 0 mirror 0 pot 0 control 00
F7: data 0 mirror 0 pot 0 control 80
G0: data 0 mirror 0 pot 0 control 80
G1: data 1 mirror 1 pot 0 control 80
G2: data 1 mirror 1 pot 0 control 80
G3: data 0 mirror 0 pot 0 control 00
G4: data 0 mirror 0 pot 0 control 00
G5: data 0 mirror 0 pot 0 control 00
G6: data 0 mirror 0 pot 0 control 44
G7: data 0 mirror 0 pot 0 control 00
H0: data 0 mirror 0 pot 0 control 80
H1: data 1 mirror 1 pot 0 control 80
H2: data 0 mirror 0 pot 0 control 44
H3: data 0 mirror 0 pot 0 control 40
H4: data 1 mirror 1 pot 0 control 80
H5: data 0 mirror 0 pot 0 control 44
H6: data 1 mirror 1 pot 0 control 80
H7: data 1 mirror 1 pot 0 control 80
I0: data 0 mirror 0 pot 0 control 00
I1: data 0 mirror 0 pot 0 control 00
I2: data 0 mirror 0 pot 0 control 00
I3: data 0 mirror 0 pot 0 control 00
I4: data 0 mirror 0 pot 0 control 00
I5: data 1 mirror 1 pot 0 control 80
I6: data 1 mirror 1 pot 0 control 80
I7: data 0 mirror 0 pot 0 control 00
J0: data 1 mirror 1 pot 0 control 44
J1: data 1 mirror 1 pot 0 control 40
J2: data 1 mirror 1 pot 0 control 80
J3: data 0 mirror 0 pot 0 control 80
J4: data 1 mirror 1 pot 0 control 40
J5: data 0 mirror 0 pot 0 control 40
J6: data 0 mirror 0 pot 0 control 44
J7: data 1 mirror 1 pot 0 control 80
M0: data 0 mirror 0 control 06
M1: data 1 mirror 0 control 06
M2: data 1 mirror 1 control 06
M3: data 1 mirror 1 control 06
M4: data 0 mirror 1 control 06
M5: data 0 mirror 0 control 00
M6: data 1 mirror 1 control 86
M7: data 0 mirror 0 control 00

9
models/addw3/edk2.config Normal file
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BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE
#SYSTEM76_EC_LOGGING=TRUE

BIN
models/addw3/fd.rom (Stored with Git LFS) Normal file

Binary file not shown.

BIN
models/addw3/gbe.rom (Stored with Git LFS) Normal file

Binary file not shown.

BIN
models/addw3/me.rom (Stored with Git LFS) Normal file

Binary file not shown.

BIN
models/addw3/vbt.rom (Stored with Git LFS) Normal file

Binary file not shown.

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@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

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@@ -1,245 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
PAD_CFG_NF(GPD6, UP_20K, PWROK, NF1),
PAD_CFG_GPI(GPD7, UP_20K, PWROK),
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD11, UP_20K, PWROK),
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_A11, 0x80100100, 0x0000),
PAD_CFG_GPI(GPP_A12, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A13, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A14, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A15, UP_20K, DEEP),
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A17, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_A18, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_A19, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_A20, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_A21, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A22, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A23, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_B0, 0x42080100, 0x3000),
PAD_CFG_GPI(GPP_B1, UP_20K, DEEP),
PAD_CFG_NF(GPP_B2, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_B3, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_B4, UP_20K, DEEP),
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B7, UP_20K, PLTRST),
PAD_CFG_GPI(GPP_B8, UP_20K, PLTRST),
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B10, UP_20K, PLTRST),
PAD_CFG_TERM_GPO(GPP_B11, 1, NONE, DEEP),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B15, UP_20K, DEEP),
PAD_CFG_GPI(GPP_B16, UP_20K, DEEP),
PAD_CFG_GPI(GPP_B17, UP_20K, DEEP),
PAD_CFG_GPI(GPP_B18, UP_20K, DEEP),
PAD_CFG_GPI(GPP_B19, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_B20, 0x42040100, 0x0000),
PAD_CFG_GPI(GPP_B21, UP_20K, DEEP),
PAD_CFG_GPI(GPP_B22, UP_20K, DEEP),
PAD_CFG_NF(GPP_B23, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C2, UP_20K, DEEP),
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C8, NONE, PLTRST),
PAD_CFG_GPI(GPP_C9, NONE, DEEP),
PAD_CFG_GPI(GPP_C10, DN_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_C11, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_C12, UP_20K, DEEP),
PAD_CFG_GPI(GPP_C13, UP_20K, DEEP),
PAD_CFG_GPI(GPP_C14, UP_20K, DEEP),
PAD_CFG_GPI(GPP_C15, UP_20K, DEEP),
PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C18, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C19, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C20, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_C21, NONE, PLTRST, NF1),
PAD_CFG_GPI(GPP_C22, UP_20K, DEEP),
PAD_CFG_GPI(GPP_C23, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D0, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D1, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D2, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D3, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D4, UP_20K, DEEP),
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF3),
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF3),
PAD_CFG_NF(GPP_D7, NONE, PLTRST, NF1),
PAD_CFG_NF(GPP_D8, NONE, PLTRST, NF1),
PAD_CFG_GPI(GPP_D9, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D10, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D12, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D13, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D14, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D15, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D16, UP_20K, DEEP),
PAD_CFG_NF(GPP_D17, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_D18, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_D19, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_D20, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_D21, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D22, UP_20K, DEEP),
PAD_CFG_GPI(GPP_D23, UP_20K, DEEP),
PAD_CFG_NF(GPP_E0, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E2, NONE, DEEP, NF2),
PAD_CFG_GPI(GPP_E3, UP_20K, DEEP),
PAD_CFG_GPI(GPP_E4, UP_20K, DEEP),
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
_PAD_CFG_STRUCT(GPP_E7, 0x80800100, 0x0000),
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E9, UP_20K, DEEP),
PAD_CFG_GPI(GPP_E10, UP_20K, DEEP),
PAD_CFG_GPI(GPP_E11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_E12, UP_20K, DEEP),
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_F2, 0, UP_20K, PLTRST),
PAD_CFG_NF(GPP_F3, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_F7, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F8, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F9, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F10, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_F11, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_F12, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F13, UP_20K, DEEP),
PAD_CFG_NF(GPP_F14, NONE, DEEP, NF2),
PAD_CFG_GPI(GPP_F15, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F16, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F17, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F18, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F19, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F20, UP_20K, DEEP),
PAD_CFG_GPI(GPP_F21, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_F22, 1, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_F23, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_G0, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G1, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G2, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G3, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G4, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G5, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G6, UP_20K, DEEP),
PAD_CFG_GPI(GPP_G7, UP_20K, DEEP),
PAD_CFG_NF(GPP_H0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H3, NONE, PLTRST),
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H5, NONE, PLTRST),
PAD_CFG_GPI(GPP_H6, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_H7, 0, NONE, DEEP),
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1),
PAD_CFG_TERM_GPO(GPP_H11, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_H12, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H13, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H14, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_H15, 0x40880100, 0x3000),
PAD_CFG_GPI(GPP_H16, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H17, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H18, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H19, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H20, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H21, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H22, UP_20K, DEEP),
PAD_CFG_GPI(GPP_H23, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_I0, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I1, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I2, 0x46080100, 0x0000),
_PAD_CFG_STRUCT(GPP_I3, 0x46080100, 0x0000),
PAD_CFG_NF(GPP_I4, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_I5, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_I6, UP_20K, DEEP),
PAD_CFG_GPI(GPP_I7, UP_20K, DEEP),
PAD_CFG_GPI(GPP_I8, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_I9, 1, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I10, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_I11, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_I12, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_I13, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_I14, UP_20K, DEEP),
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J1, NONE, DEEP, NF2),
PAD_CFG_GPI(GPP_J2, UP_20K, DEEP),
PAD_CFG_GPI(GPP_J3, UP_20K, DEEP),
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J7, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_J8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_J9, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_J10, UP_20K, DEEP),
PAD_CFG_GPI(GPP_J11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K0, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K1, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K2, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_K3, 0x80880100, 0x3000),
PAD_CFG_GPI(GPP_K4, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K5, 0, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_K6, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_K7, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K8, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K9, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K10, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K11, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_K12, 0x82880100, 0x3000),
PAD_CFG_GPI(GPP_K13, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K14, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_K15, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K16, 0, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K17, UP_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_K18, 1, NONE, DEEP),
PAD_CFG_GPI(GPP_K19, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K20, UP_20K, DEEP),
PAD_CFG_GPI(GPP_K21, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_K22, 0, TODO_0x2800, DEEP),
PAD_CFG_TERM_GPO(GPP_K23, 0, NONE, PLTRST),
};
#endif
#endif

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../addw3/AlderLakeFspBinPkg

BIN
models/bonw15/IntelGopDriver.efi (Stored with Git LFS) Normal file

Binary file not shown.

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[Defines]
INF_VERSION = 0x00010005
BASE_NAME = IntelGopDriver
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
[Binaries.X64]
PE32|IntelGopDriver.efi|*

12
models/bonw15/README.md Normal file
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# System76 Bonobo WS (bonw15)
## Contents
- [EC](./ec.rom)
- *Read Error: No such file or directory (os error 2)*
- [FD](./fd.rom)
- Size: 4 KB
- HAP: false
- [ME](./me.rom)
- Size: 3944 KB
- Version: 16.1.25.2091

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# System76 Bonobo WS (bonw15)

1
models/bonw15/chip.txt Normal file
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GD25Q256D

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## PCI ##
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0xA702, Revision 0x01
PCI Device: 0000:00:01.0: Class 0x00060400, Vendor 0x8086, Device 0xA70D, Revision 0x01
PCI Device: 0000:00:01.1: Class 0x00060400, Vendor 0x8086, Device 0xA72D, Revision 0x01
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0xA788, Revision 0x04
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0xA71D, Revision 0x01
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0xA74F, Revision 0x01
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0xA77D, Revision 0x01
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0xA77F, Revision 0x00
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x7A60, Revision 0x11
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x7A27, Revision 0x11
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x7A70, Revision 0x11
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x7A4C, Revision 0x11
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x7A4D, Revision 0x11
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x7A68, Revision 0x11
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x7A3E, Revision 0x11
PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x7A30, Revision 0x11
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x7A0C, Revision 0x11
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x7A50, Revision 0x11
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x7A23, Revision 0x11
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x7A24, Revision 0x11
PCI Device: 0000:02:00.0: Class 0x00030000, Vendor 0x10DE, Device 0x27E0, Revision 0xA1
PCI Device: 0000:02:00.1: Class 0x00040300, Vendor 0x10DE, Device 0x22BC, Revision 0xA1
PCI Device: 0000:03:00.0: Class 0x00020000, Vendor 0x8086, Device 0x3101, Revision 0x03
PCI Device: 0000:04:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
PCI Device: 0000:05:00.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
PCI Device: 0000:05:01.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
PCI Device: 0000:05:02.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
PCI Device: 0000:05:03.0: Class 0x00060400, Vendor 0x8086, Device 0x1136, Revision 0x02
PCI Device: 0000:06:00.0: Class 0x000C0340, Vendor 0x8086, Device 0x1137, Revision 0x00
PCI Device: 0000:3a:00.0: Class 0x000C0330, Vendor 0x8086, Device 0x1138, Revision 0x00
PCI Device: 10000:e0:1b.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
PCI Device: 10000:e0:1b.4: Class 0x00060400, Vendor 0x8086, Device 0x7A44, Revision 0x11
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
## GPIO ##
600 Series PCH
GPP_I0 (0x6E,0x00) 0x44000200 0x00000018 0x00000000 0x00000000
GPP_I1 (0x6E,0x02) 0x86880100 0x00000019 0x00000000 0x00000000
GPP_I2 (0x6E,0x04) 0x86880100 0x0000001a 0x00000000 0x00000000
GPP_I3 (0x6E,0x06) 0x86880100 0x0000001b 0x00000000 0x00000000
GPP_I4 (0x6E,0x08) 0x86880100 0x0000001c 0x00000000 0x00000000
GPP_I5 (0x6E,0x0A) 0x44000200 0x0000001d 0x00000000 0x00000000
GPP_I6 (0x6E,0x0C) 0x44000200 0x0000001e 0x00000000 0x00000000
GPP_I7 (0x6E,0x0E) 0x44000200 0x00000020 0x00000000 0x00000000
GPP_I8 (0x6E,0x10) 0x44000200 0x00000021 0x00000000 0x00000000
GPP_I9 (0x6E,0x12) 0x44000200 0x00000022 0x00000000 0x00000000
GPP_I10 (0x6E,0x14) 0x44000200 0x00000023 0x00000000 0x00000000
GPP_I11 (0x6E,0x16) 0x44000300 0x00000024 0x00000000 0x00000000
GPP_I12 (0x6E,0x18) 0x44000300 0x00000025 0x00000000 0x00000000
GPP_I13 (0x6E,0x1A) 0x44000300 0x00000026 0x00000000 0x00000000
GPP_I14 (0x6E,0x1C) 0x44000300 0x00000027 0x00000000 0x00000000
GPP_I15 (0x6E,0x1E) 0x44000200 0x00000028 0x00000000 0x00000000
GPP_I16 (0x6E,0x20) 0x44000200 0x00000029 0x00000000 0x00000000
GPP_I17 (0x6E,0x22) 0x44000200 0x0000002a 0x00000000 0x00000000
GPP_I18 (0x6E,0x24) 0x44000102 0x0000002b 0x00000000 0x00000000
GPP_I19 (0x6E,0x26) 0x44000200 0x0000002c 0x00000000 0x00000000
GPP_I20 (0x6E,0x28) 0x44000200 0x0000002d 0x00000000 0x00000000
GPP_I21 (0x6E,0x2A) 0x44000200 0x0000002e 0x00000000 0x00000000
GPP_I22 (0x6E,0x2C) 0x44000102 0x00000030 0x00000000 0x00000000
GPP_R0 (0x6E,0x32) 0x44000500 0x00000031 0x00000000 0x00000000
GPP_R1 (0x6E,0x34) 0x44000500 0x00003c32 0x00000000 0x00000000
GPP_R2 (0x6E,0x36) 0x44000500 0x00003c33 0x00000000 0x00000000
GPP_R3 (0x6E,0x38) 0x44000500 0x00003c34 0x00000000 0x00000000
GPP_R4 (0x6E,0x3A) 0x44000500 0x00000035 0x00000000 0x00000000
GPP_R5 (0x6E,0x3C) 0x44000200 0x00000036 0x00000000 0x00000000
GPP_R6 (0x6E,0x3E) 0x44000200 0x00000037 0x00000000 0x00000000
GPP_R7 (0x6E,0x40) 0x44000200 0x00000038 0x00000000 0x00000000
GPP_R8 (0x6E,0x42) 0x44000102 0x00000039 0x00000000 0x00000000
GPP_R9 (0x6E,0x44) 0x44000702 0x0000003a 0x00000000 0x00000000
GPP_R10 (0x6E,0x46) 0x44000200 0x0000003b 0x00000000 0x00000000
GPP_R11 (0x6E,0x48) 0x44000200 0x0000003c 0x00000000 0x00000000
GPP_R12 (0x6E,0x4A) 0x44000200 0x0000003d 0x00000000 0x00000000
GPP_R13 (0x6E,0x4C) 0x44000200 0x0000003e 0x00000000 0x00000000
GPP_R14 (0x6E,0x4E) 0x44000200 0x0000003f 0x00000000 0x00000000
GPP_R15 (0x6E,0x50) 0x44000200 0x00000040 0x00000000 0x00000000
GPP_R16 (0x6E,0x52) 0x44000201 0x00000041 0x00000000 0x00000000
GPP_R17 (0x6E,0x54) 0x44000200 0x00000042 0x00000000 0x00000000
GPP_R18 (0x6E,0x56) 0x44000200 0x00000043 0x00000000 0x00000000
GPP_R19 (0x6E,0x58) 0x44000200 0x00000044 0x00000000 0x00000000
GPP_R20 (0x6E,0x5A) 0x44000200 0x00000045 0x00000000 0x00000000
GPP_R21 (0x6E,0x5C) 0x44000200 0x00000046 0x00000000 0x00000000
GPP_J0 (0x6E,0x60) 0x44000500 0x00000047 0x00000000 0x00000000
GPP_J1 (0x6E,0x62) 0x44000700 0x00000048 0x00000000 0x00000000
GPP_J2 (0x6E,0x64) 0x44000500 0x00000049 0x00000000 0x00000000
GPP_J3 (0x6E,0x66) 0x44000502 0x0000304a 0x00000000 0x00000000
GPP_J4 (0x6E,0x68) 0x44000500 0x0000004b 0x00000000 0x00000000
GPP_J5 (0x6E,0x6A) 0x44000500 0x0000304c 0x00000000 0x00000000
GPP_J6 (0x6E,0x6C) 0x44000500 0x0000004d 0x00000000 0x00000000
GPP_J7 (0x6E,0x6E) 0x44000500 0x0000004e 0x00000000 0x00000000
GPP_J8 (0x6E,0x70) 0x44000102 0x00000050 0x00000000 0x00000000
GPP_J9 (0x6E,0x72) 0x44000200 0x00000051 0x00000000 0x00000000
GPP_J10 (0x6E,0x74) 0x44000200 0x00000052 0x00000000 0x00000000
GPP_J11 (0x6E,0x76) 0x44000200 0x00000053 0x00000000 0x00000000
GPP_B0 (0x6D,0x00) 0x82900102 0x00000050 0x00000000 0x00000000
GPP_B1 (0x6D,0x02) 0x44000200 0x00000051 0x00000000 0x00000000
GPP_B2 (0x6D,0x04) 0x44000102 0x00000052 0x00000000 0x00000000
GPP_B3 (0x6D,0x06) 0x44000201 0x00000053 0x00000000 0x00000000
GPP_B4 (0x6D,0x08) 0x44000200 0x00000054 0x00000000 0x00000000
GPP_B5 (0x6D,0x0A) 0x44000200 0x00000055 0x00000000 0x00000000
GPP_B6 (0x6D,0x0C) 0x44000200 0x00000056 0x00000000 0x00000000
GPP_B7 (0x6D,0x0E) 0x44000200 0x00000057 0x00000000 0x00000000
GPP_B8 (0x6D,0x10) 0x44000200 0x00000058 0x00000000 0x00000000
GPP_B9 (0x6D,0x12) 0x44000200 0x00000059 0x00000000 0x00000000
GPP_B10 (0x6D,0x14) 0x44000200 0x0000005a 0x00000000 0x00000000
GPP_B11 (0x6D,0x16) 0x44000200 0x0000005b 0x00000000 0x00000000
GPP_B12 (0x6D,0x18) 0x44000700 0x0000005c 0x00000000 0x00000000
GPP_B13 (0x6D,0x1A) 0x44000700 0x0000005d 0x00000000 0x00000000
GPP_B14 (0x6D,0x1C) 0x44000600 0x0000005e 0x00000000 0x00000000
GPP_B15 (0x6D,0x1E) 0x44000200 0x0000005f 0x00000000 0x00000000
GPP_B16 (0x6D,0x20) 0x44000200 0x00000060 0x00000000 0x00000000
GPP_B17 (0x6D,0x22) 0x04000201 0x00000061 0x00000000 0x00000000
GPP_B18 (0x6D,0x24) 0x04000702 0x00000062 0x00000000 0x00000000
GPP_B19 (0x6D,0x26) 0x44000201 0x00000063 0x00000000 0x00000000
GPP_B20 (0x6D,0x28) 0x44000200 0x00000064 0x00000000 0x00000000
GPP_B21 (0x6D,0x2A) 0x44000200 0x00000065 0x00000000 0x00000000
GPP_B22 (0x6D,0x2C) 0x44000201 0x00000066 0x00000000 0x00000000
GPP_B23 (0x6D,0x2E) 0x44000102 0x00000067 0x00000800 0x00000000
GPP_G0 (0x6D,0x30) 0x04000200 0x00000068 0x00000000 0x00000000
GPP_G1 (0x6D,0x32) 0x44000100 0x00000069 0x00000000 0x00000000
GPP_G2 (0x6D,0x34) 0x44000100 0x0000106a 0x00000000 0x00000000
GPP_G3 (0x6D,0x36) 0x44000102 0x0000006b 0x00000000 0x00000000
GPP_G4 (0x6D,0x38) 0x44000100 0x0000006c 0x00000000 0x00000000
GPP_G5 (0x6D,0x3A) 0x44000700 0x0000006d 0x00000000 0x00000000
GPP_G6 (0x6D,0x3C) 0x44000100 0x0000006e 0x00000000 0x00000000
GPP_G7 (0x6D,0x3E) 0x42800102 0x0000006f 0x00000000 0x00000000
GPP_H0 (0x6D,0x40) 0x44000102 0x00000070 0x00000000 0x00000000
GPP_H1 (0x6D,0x42) 0x44000200 0x00000071 0x00000000 0x00000000
GPP_H2 (0x6D,0x44) 0x44000100 0x00000072 0x00000000 0x00000000
GPP_H3 (0x6D,0x46) 0x44000702 0x00000073 0x00000000 0x00000000
GPP_H4 (0x6D,0x48) 0x44000700 0x00000074 0x00000000 0x00000000
GPP_H5 (0x6D,0x4A) 0x44000702 0x00000075 0x00000000 0x00000000
GPP_H6 (0x6D,0x4C) 0x44000300 0x00000076 0x00000000 0x00000000
GPP_H7 (0x6D,0x4E) 0x44000700 0x00000077 0x00000000 0x00000000
GPP_H8 (0x6D,0x50) 0x44000700 0x00000018 0x00000000 0x00000000
GPP_H9 (0x6D,0x52) 0x44000702 0x00000019 0x00000000 0x00000000
GPP_H10 (0x6D,0x54) 0x44000502 0x00000020 0x00000000 0x00000000
GPP_H11 (0x6D,0x56) 0x44000502 0x00000021 0x00000000 0x00000000
GPP_H12 (0x6D,0x58) 0x44000102 0x00000022 0x00000000 0x00000000
GPP_H13 (0x6D,0x5A) 0x44000502 0x00000023 0x00000000 0x00000000
GPP_H14 (0x6D,0x5C) 0x44000500 0x00000024 0x00000000 0x00000000
GPP_H15 (0x6D,0x5E) 0x44000102 0x00000025 0x00000800 0x00000000
GPP_H16 (0x6D,0x60) 0x44000102 0x00000026 0x00000000 0x00000000
GPP_H17 (0x6D,0x62) 0x44000201 0x00000027 0x00000000 0x00000000
GPP_H18 (0x6D,0x64) 0x44000102 0x00000028 0x00000000 0x00000000
GPP_H19 (0x6D,0x66) 0x44000200 0x00000029 0x00000000 0x00000000
GPP_H20 (0x6D,0x68) 0x44000200 0x0000002a 0x00000000 0x00000000
GPP_H21 (0x6D,0x6A) 0x44000201 0x0000002b 0x00000000 0x00000000
GPP_H22 (0x6D,0x6C) 0x44000200 0x0000002c 0x00000000 0x00000000
GPP_H23 (0x6D,0x6E) 0x44000102 0x0000002d 0x00000000 0x00000000
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
GPD2 (0x6C,0x04) 0x42880102 0x00000062 0x00000000 0x00000000
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
GPD7 (0x6C,0x0E) 0x04000100 0x00000067 0x00000000 0x00000000
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
GPD11 (0x6C,0x16) 0x44000200 0x0000006b 0x00000000 0x00000000
GPD12 (0x6C,0x18) 0x44000200 0x0000006c 0x00000000 0x00000000
GPP_A0 (0x6B,0x12) 0x44000700 0x00003018 0x00000000 0x00000000
GPP_A1 (0x6B,0x14) 0x44000702 0x00003019 0x00000000 0x00000000
GPP_A2 (0x6B,0x16) 0x44000700 0x00003020 0x00000000 0x00000000
GPP_A3 (0x6B,0x18) 0x44000700 0x00003021 0x00000000 0x00000000
GPP_A4 (0x6B,0x1A) 0x44000700 0x00003022 0x00000000 0x00000000
GPP_A5 (0x6B,0x1C) 0x44000700 0x00001023 0x00000000 0x00000000
GPP_A6 (0x6B,0x1E) 0x44000700 0x00000024 0x00000000 0x00000000
GPP_A7 (0x6B,0x20) 0x44000200 0x00000025 0x00000000 0x00000000
GPP_A8 (0x6B,0x22) 0x44000200 0x00000026 0x00000000 0x00000000
GPP_A9 (0x6B,0x24) 0x44000200 0x00000027 0x00000000 0x00000000
GPP_A10 (0x6B,0x26) 0x44000500 0x00000028 0x00000000 0x00000000
GPP_A11 (0x6B,0x28) 0x44000102 0x00003029 0x00000000 0x00000000
GPP_A12 (0x6B,0x2A) 0x44000200 0x0000002a 0x00000000 0x00000000
GPP_A13 (0x6B,0x2C) 0x44000200 0x0000002b 0x00000000 0x00000000
GPP_A14 (0x6B,0x2E) 0x44000200 0x0000002c 0x00000000 0x00000000
GPP_C0 (0x6B,0x32) 0x44000502 0x0000002d 0x00000000 0x00000000
GPP_C1 (0x6B,0x34) 0x44000502 0x0000002e 0x00000000 0x00000000
GPP_C2 (0x6B,0x36) 0x84000102 0x0000002f 0x00000800 0x00000000
GPP_C3 (0x6B,0x38) 0x44000200 0x00000030 0x00000000 0x00000000
GPP_C4 (0x6B,0x3A) 0x44000200 0x00000031 0x00000000 0x00000000
GPP_C5 (0x6B,0x3C) 0x44000502 0x00000032 0x00000000 0x00000000
GPP_C6 (0x6B,0x3E) 0x44000200 0x00000033 0x00000000 0x00000000
GPP_C7 (0x6B,0x40) 0x44000200 0x00000034 0x00000000 0x00000000
GPP_C8 (0x6B,0x42) 0x44000102 0x00000035 0x00000000 0x00000000
GPP_C9 (0x6B,0x44) 0x44000200 0x00000036 0x00000000 0x00000000
GPP_C10 (0x6B,0x46) 0x44000200 0x00000037 0x00000000 0x00000000
GPP_C11 (0x6B,0x48) 0x44000200 0x00000038 0x00000000 0x00000000
GPP_C12 (0x6B,0x4A) 0x44000200 0x00000039 0x00000000 0x00000000
GPP_C13 (0x6B,0x4C) 0x44000200 0x0000003a 0x00000000 0x00000000
GPP_C14 (0x6B,0x4E) 0x44000200 0x0000003b 0x00000000 0x00000000
GPP_C15 (0x6B,0x50) 0x44000200 0x0000003c 0x00000000 0x00000000
GPP_C16 (0x6B,0x52) 0x44000502 0x0000003d 0x00000000 0x00000000
GPP_C17 (0x6B,0x54) 0x44000502 0x0000003e 0x00000000 0x00000000
GPP_C18 (0x6B,0x56) 0x44000502 0x0000003f 0x00000000 0x00000000
GPP_C19 (0x6B,0x58) 0x44000502 0x00000040 0x00000000 0x00000000
GPP_C20 (0x6B,0x5A) 0x44000102 0x00000041 0x00000000 0x00000000
GPP_C21 (0x6B,0x5C) 0x44000102 0x00000042 0x00000000 0x00000000
GPP_C22 (0x6B,0x5E) 0x44000200 0x00000043 0x00000000 0x00000000
GPP_C23 (0x6B,0x60) 0x44000200 0x00000044 0x00000000 0x00000000
GPP_S0 (0x6A,0x00) 0x44000200 0x01800030 0x00000000 0x00000000
GPP_S1 (0x6A,0x02) 0x44000200 0x01800031 0x00000000 0x00000000
GPP_S2 (0x6A,0x04) 0x44000200 0x01800032 0x00000000 0x00000000
GPP_S3 (0x6A,0x06) 0x44000200 0x01800033 0x00000000 0x00000000
GPP_S4 (0x6A,0x08) 0x44000200 0x01800034 0x00000000 0x00000000
GPP_S5 (0x6A,0x0A) 0x44000200 0x01800035 0x00000000 0x00000000
GPP_S6 (0x6A,0x0C) 0x44000200 0x01800036 0x00000000 0x00000000
GPP_S7 (0x6A,0x0E) 0x44000200 0x01800037 0x00000000 0x00000000
GPP_E0 (0x6A,0x10) 0x44000200 0x00000038 0x00000000 0x00000000
GPP_E1 (0x6A,0x12) 0x44000200 0x00000039 0x00000000 0x00000000
GPP_E2 (0x6A,0x14) 0x44000200 0x0000003a 0x00000000 0x00000000
GPP_E3 (0x6A,0x16) 0x44000200 0x0000003b 0x00000000 0x00000000
GPP_E4 (0x6A,0x18) 0x44000200 0x0000003c 0x00000000 0x00000000
GPP_E5 (0x6A,0x1A) 0x44000200 0x0000003d 0x00000000 0x00000000
GPP_E6 (0x6A,0x1C) 0x44000200 0x0000003e 0x00000000 0x00000000
GPP_E7 (0x6A,0x1E) 0x80100102 0x0000003f 0x00000000 0x00000000
GPP_E8 (0x6A,0x20) 0x44000500 0x00000040 0x00000000 0x00000000
GPP_E9 (0x6A,0x22) 0x44000300 0x00000041 0x00000800 0x00000000
GPP_E10 (0x6A,0x24) 0x44000300 0x00000042 0x00000800 0x00000000
GPP_E11 (0x6A,0x26) 0x44000300 0x00000043 0x00000800 0x00000000
GPP_E12 (0x6A,0x28) 0x44000300 0x00000044 0x00000000 0x00000000
GPP_E13 (0x6A,0x2A) 0x44000200 0x00000045 0x00000000 0x00000000
GPP_E14 (0x6A,0x2C) 0x44000200 0x00000046 0x00000000 0x00000000
GPP_E15 (0x6A,0x2E) 0x44000200 0x00000047 0x00000000 0x00000000
GPP_E16 (0x6A,0x30) 0x44000200 0x00000048 0x00000000 0x00000000
GPP_E17 (0x6A,0x32) 0x44000200 0x00000049 0x00000000 0x00000000
GPP_E18 (0x6A,0x34) 0x44000201 0x0000004a 0x00000000 0x00000000
GPP_E19 (0x6A,0x36) 0x44000200 0x0000004b 0x00000000 0x00000000
GPP_E20 (0x6A,0x38) 0x44000200 0x0000004c 0x00000000 0x00000000
GPP_E21 (0x6A,0x3A) 0x44000200 0x0000004d 0x00000000 0x00000000
GPP_K0 (0x6A,0x3E) 0x44000200 0x0000004e 0x00000000 0x00000000
GPP_K1 (0x6A,0x40) 0x44000200 0x00000050 0x00000000 0x00000000
GPP_K2 (0x6A,0x42) 0x44000200 0x00000051 0x00000000 0x00000000
GPP_K3 (0x6A,0x44) 0x44000200 0x00000052 0x00000000 0x00000000
GPP_K4 (0x6A,0x46) 0x44000200 0x00000053 0x00000000 0x00000000
GPP_K5 (0x6A,0x48) 0x44000200 0x00000054 0x00000000 0x00000000
GPP_K6 (0x6A,0x4A) 0x44000a02 0x00000055 0x00000000 0x00000000
GPP_K7 (0x6A,0x4C) 0x44000a02 0x00000056 0x00000000 0x00000000
GPP_K8 (0x6A,0x4E) 0x44000700 0x00000057 0x00000000 0x00000000
GPP_K9 (0x6A,0x50) 0x44000700 0x00000058 0x00000000 0x00000000
GPP_K10 (0x6A,0x52) 0x44000a02 0x00000059 0x00000000 0x00000000
GPP_K11 (0x6A,0x54) 0x44000200 0x0000005a 0x00000000 0x00000000
GPP_F0 (0x6A,0x5C) 0x44000200 0x0000005b 0x00000000 0x00000000
GPP_F1 (0x6A,0x5E) 0x44000200 0x0000005c 0x00000000 0x00000000
GPP_F2 (0x6A,0x60) 0x44000200 0x0000005d 0x00000000 0x00000000
GPP_F3 (0x6A,0x62) 0x44000200 0x0000005e 0x00000000 0x00000000
GPP_F4 (0x6A,0x64) 0x44000200 0x00000060 0x00000000 0x00000000
GPP_F5 (0x6A,0x66) 0x84000200 0x00000061 0x00000000 0x00000000
GPP_F6 (0x6A,0x68) 0x44000200 0x00000062 0x00000000 0x00000000
GPP_F7 (0x6A,0x6A) 0x44000200 0x00000063 0x00000000 0x00000000
GPP_F8 (0x6A,0x6C) 0x44000100 0x00000064 0x00000000 0x00000000
GPP_F9 (0x6A,0x6E) 0x42880102 0x00000065 0x00000000 0x00000000
GPP_F10 (0x6A,0x70) 0x44000200 0x00000066 0x00000000 0x00000000
GPP_F11 (0x6A,0x72) 0x44000200 0x00000067 0x00000000 0x00000000
GPP_F12 (0x6A,0x74) 0x44000200 0x00000068 0x00000000 0x00000000
GPP_F13 (0x6A,0x76) 0x44000200 0x00000069 0x00000000 0x00000000
GPP_F14 (0x6A,0x78) 0x44000200 0x0000006a 0x00000000 0x00000000
GPP_F15 (0x6A,0x7A) 0x44000100 0x0000006b 0x00000000 0x00000000
GPP_F16 (0x6A,0x7C) 0x44000200 0x0000006c 0x00000000 0x00000000
GPP_F17 (0x6A,0x7E) 0x44000200 0x0000006d 0x00000000 0x00000000
GPP_F18 (0x6A,0x80) 0x44000200 0x0000006e 0x00000000 0x00000000
GPP_F19 (0x6A,0x82) 0x44000700 0x0000006f 0x00000000 0x00000000
GPP_F20 (0x6A,0x84) 0x44000700 0x00000070 0x00000000 0x00000000
GPP_F21 (0x6A,0x86) 0x44000700 0x00000071 0x00000000 0x00000000
GPP_F22 (0x6A,0x88) 0x44000201 0x00000072 0x00000000 0x00000000
GPP_F23 (0x6A,0x8A) 0x44000200 0x00000073 0x00000000 0x00000000
GPP_D0 (0x69,0x20) 0x44000200 0x00000026 0x00000000 0x00000000
GPP_D1 (0x69,0x22) 0x44000200 0x00000027 0x00000000 0x00000000
GPP_D2 (0x69,0x24) 0x44000200 0x00000028 0x00000000 0x00000000
GPP_D3 (0x69,0x26) 0x44000200 0x00000029 0x00000000 0x00000000
GPP_D4 (0x69,0x28) 0x44000200 0x0000002a 0x00000000 0x00000000
GPP_D5 (0x69,0x2A) 0x44000200 0x0000002b 0x00000000 0x00000000
GPP_D6 (0x69,0x2C) 0x44000200 0x0000002c 0x00000000 0x00000000
GPP_D7 (0x69,0x2E) 0x44000200 0x0000002d 0x00000000 0x00000000
GPP_D8 (0x69,0x30) 0x40000300 0x00000000 0x00000000 0x00000000
GPP_D9 (0x69,0x32) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D10 (0x69,0x34) 0x40000702 0x00003c00 0x00000000 0x00000000
GPP_D11 (0x69,0x36) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D12 (0x69,0x38) 0x40000702 0x00003c00 0x00000000 0x00000000
GPP_D13 (0x69,0x3A) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D14 (0x69,0x3C) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D15 (0x69,0x3E) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D16 (0x69,0x40) 0x40000700 0x00003c00 0x00000800 0x00000000
GPP_D17 (0x69,0x42) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D18 (0x69,0x44) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D19 (0x69,0x46) 0x40000700 0x00003c00 0x00000000 0x00000000
GPP_D20 (0x69,0x48) 0x40000700 0x00000000 0x00000000 0x00000000
GPP_D21 (0x69,0x4A) 0x40000700 0x00000000 0x00000000 0x00000000
GPP_D22 (0x69,0x4C) 0x40000702 0x00000000 0x00000000 0x00000000
GPP_D23 (0x69,0x4E) 0x40000700 0x00000000 0x00000000 0x00000000
## HDAUDIO ##
hdaudioC0D0
vendor_name: Realtek
chip_name: ALC1220
vendor_id: 0x10ec1220
subsystem_id: 0x15583702
revision_id: 0x100101
0x12: 0x90a60130
0x14: 0x0421101f
0x15: 0x40000000
0x16: 0x411111f0
0x17: 0x411111f0
0x18: 0x04a11040
0x19: 0x411111f0
0x1a: 0x411111f0
0x1b: 0x90170110
0x1d: 0x40b7952d
0x1e: 0x04451150
hdaudioC0D2
vendor_name: Intel
chip_name: Raptorlake HDMI
vendor_id: 0x80862818
subsystem_id: 0x80860101
revision_id: 0x100000
0x04: 0x18560010
0x06: 0x18560010
0x08: 0x18560010
0x0a: 0x18560010
0x0b: 0x18560010
0x0c: 0x18560010
0x0d: 0x18560010
0x0e: 0x18560010
0x0f: 0x18560010
hdaudioC1D0
vendor_name: Nvidia
chip_name: Generic HDMI
vendor_id: 0x10de00a5
subsystem_id: 0x10de0000
revision_id: 0x100100
0x04: 0x585600f0
0x05: 0x185600f0
0x06: 0x185600f0
0x07: 0x185600f0

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CONFIG_VENDOR_SYSTEM76=y
CONFIG_BOARD_SYSTEM76_BONW15=y
CONFIG_CCACHE=y
CONFIG_CONSOLE_SERIAL=n
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
CONFIG_PAYLOAD_ELF=y
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
#CONFIG_CONSOLE_SYSTEM76_EC=y

1
models/bonw15/ec.config Normal file
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BOARD=system76/bonw15

89
models/bonw15/ecspy.txt Normal file
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id 5570 rev 6
A0: data 1 mirror 1 pot 0 control 80
A1: data 0 mirror 0 pot 0 control 00
A2: data 1 mirror 0 pot 0 control 00
A3: data 0 mirror 0 pot 0 control 00
A4: data 0 mirror 1 pot 0 control 00
A5: data 0 mirror 0 pot 0 control 00
A6: data 0 mirror 0 pot 0 control 00
A7: data 0 mirror 0 pot 0 control 00
B0: data 0 mirror 0 pot 0 control 84
B1: data 1 mirror 1 pot 0 control 84
B2: data 1 mirror 1 pot 0 control 84
B3: data 1 mirror 1 pot 0 control 80
B4: data 1 mirror 1 pot 0 control 40
B5: data 1 mirror 1 pot 0 control 40
B6: data 1 mirror 1 pot 0 control 44
B7: data 1 mirror 1 pot 0 control 80
C0: data 1 mirror 1 pot 0 control 80
C1: data 1 mirror 1 pot 0 control 04
C2: data 1 mirror 1 pot 0 control 04
C3: data 0 mirror 0 pot 0 control 04
C4: data 0 mirror 0 pot 0 control 84
C5: data 0 mirror 0 pot 0 control 04
C6: data 1 mirror 1 pot 0 control 40
C7: data 1 mirror 1 pot 0 control 44
D0: data 1 mirror 1 pot 0 control 40
D1: data 1 mirror 1 pot 0 control 44
D2: data 1 mirror 1 pot 0 control 00
D3: data 0 mirror 0 pot 0 control 40
D4: data 0 mirror 0 pot 0 control 40
D5: data 1 mirror 1 pot 0 control 44
D6: data 0 mirror 0 pot 0 control 02
D7: data 1 mirror 1 pot 0 control 02
E0: data 1 mirror 1 pot 0 control 04
E1: data 1 mirror 1 pot 0 control 44
E2: data 1 mirror 1 pot 0 control 84
E3: data 1 mirror 1 pot 0 control 40
E4: data 1 mirror 1 pot 0 control 42
E5: data 1 mirror 1 pot 0 control 40
E6: data 0 mirror 0 pot 0 control 80
E7: data 1 mirror 1 pot 0 control 04
F0: data 0 mirror 0 pot 0 control 44
F1: data 1 mirror 1 pot 0 control 44
F2: data 1 mirror 1 pot 0 control 44
F3: data 1 mirror 1 pot 0 control 40
F4: data 1 mirror 1 pot 0 control 04
F5: data 1 mirror 1 pot 0 control 04
F6: data 1 mirror 1 pot 0 control 40
F7: data 1 mirror 1 pot 0 control 80
G0: data 1 mirror 1 pot 0 control 80
G1: data 1 mirror 1 pot 0 control 40
G2: data 1 mirror 1 pot 0 control 80
G3: data 0 mirror 0 pot 0 control 00
G4: data 0 mirror 0 pot 0 control 00
G5: data 0 mirror 0 pot 0 control 00
G6: data 0 mirror 0 pot 0 control 44
G7: data 0 mirror 0 pot 0 control 00
H0: data 0 mirror 0 pot 0 control 80
H1: data 1 mirror 1 pot 0 control 80
H2: data 0 mirror 0 pot 0 control 44
H3: data 1 mirror 1 pot 0 control 80
H4: data 0 mirror 0 pot 0 control 80
H5: data 0 mirror 0 pot 0 control 44
H6: data 1 mirror 1 pot 0 control 40
H7: data 1 mirror 1 pot 0 control 80
I0: data 0 mirror 0 pot 0 control 00
I1: data 0 mirror 0 pot 0 control 00
I2: data 0 mirror 0 pot 0 control 80
I3: data 0 mirror 0 pot 0 control 00
I4: data 0 mirror 0 pot 0 control 00
I5: data 1 mirror 1 pot 0 control 40
I6: data 0 mirror 0 pot 0 control 00
I7: data 0 mirror 0 pot 0 control 00
J0: data 1 mirror 1 pot 0 control 44
J1: data 1 mirror 1 pot 0 control 40
J2: data 1 mirror 1 pot 0 control 80
J3: data 0 mirror 0 pot 0 control 80
J4: data 1 mirror 1 pot 0 control 40
J5: data 1 mirror 1 pot 0 control 80
J6: data 0 mirror 0 pot 0 control 44
J7: data 0 mirror 0 pot 0 control 84
M0: data 0 mirror 0 control 06
M1: data 0 mirror 0 control 06
M2: data 1 mirror 1 control 06
M3: data 1 mirror 1 control 06
M4: data 0 mirror 1 control 06
M5: data 0 mirror 0 control 00
M6: data 0 mirror 0 control 86
M7: data 0 mirror 0 control 00

View File

@@ -0,0 +1,9 @@
BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE
#SYSTEM76_EC_LOGGING=TRUE

BIN
models/bonw15/fd.rom (Stored with Git LFS) Normal file

Binary file not shown.

BIN
models/bonw15/me.rom (Stored with Git LFS) Normal file

Binary file not shown.

BIN
models/bonw15/vbt.rom (Stored with Git LFS) Normal file

Binary file not shown.

View File

@@ -12,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_RUN_FSP_GOP=y
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y

View File

@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

View File

@@ -1,218 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2019 System76
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPD0, NONE, PWROK),
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD7, NONE, PWROK),
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD9, NONE, PWROK),
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD11, NONE, PWROK),
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A16, NONE, DEEP),
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
PAD_CFG_GPI(GPP_A18, NONE, DEEP),
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
PAD_CFG_GPI(GPP_B5, NONE, DEEP),
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_C9, 0x84800100, 0x3000),
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, PLTRST),
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_C12, 1, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C13, 1, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C15, 1, UP_20K, PLTRST),
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C18, NONE, DEEP),
PAD_CFG_GPI(GPP_C19, NONE, DEEP),
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_C23, 0x80100100, 0x0000),
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
PAD_CFG_GPI(GPP_D5, NONE, DEEP),
PAD_CFG_GPI(GPP_D6, NONE, DEEP),
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_D8, 1, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_D9, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_D11, 0x40880100, 0x3000),
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_D16, 1, NONE, PWROK),
PAD_CFG_GPI(GPP_D17, NONE, DEEP),
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
PAD_CFG_GPI(GPP_E1, NONE, DEEP),
PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
PAD_CFG_GPI(GPP_E5, NONE, DEEP),
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_E16, 0x80880100, 0x0000),
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E22, NONE, DEEP),
PAD_CFG_GPI(GPP_E23, NONE, DEEP),
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
PAD_CFG_GPI(GPP_F3, NONE, DEEP),
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
PAD_CFG_GPI(GPP_F19, NONE, DEEP),
PAD_CFG_GPI(GPP_F20, NONE, DEEP),
PAD_CFG_GPI(GPP_F21, NONE, DEEP),
PAD_CFG_GPI(GPP_F22, NONE, DEEP),
PAD_CFG_GPI(GPP_F23, DN_20K, DEEP),
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
PAD_CFG_GPI(GPP_H0, NONE, DEEP),
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
PAD_CFG_GPI(GPP_H6, NONE, DEEP),
PAD_CFG_GPI(GPP_H7, NONE, DEEP),
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
PAD_CFG_GPI(GPP_H17, NONE, DEEP),
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_H22, 1, NONE, PLTRST),
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
};
#endif
#endif

View File

@@ -12,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_RUN_FSP_GOP=y
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y

View File

@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

View File

@@ -1,218 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2019 System76
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPD0, NONE, PWROK),
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD7, NONE, PWROK),
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD9, NONE, PWROK),
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPD11, NONE, PWROK),
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A16, NONE, DEEP),
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
PAD_CFG_GPI(GPP_A18, NONE, DEEP),
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_A22, 0, NONE, DEEP),
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
PAD_CFG_GPI(GPP_B5, NONE, DEEP),
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_C9, 0x84800100, 0x3000),
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, PLTRST),
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_C12, 1, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C13, 1, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_C15, 0, UP_20K, PLTRST),
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C18, NONE, DEEP),
PAD_CFG_GPI(GPP_C19, NONE, DEEP),
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_C23, 0x80100100, 0x0000),
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
PAD_CFG_GPI(GPP_D5, NONE, DEEP),
PAD_CFG_GPI(GPP_D6, NONE, DEEP),
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_D8, 1, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_D9, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_D11, 0x40880100, 0x3000),
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
PAD_CFG_GPI(GPP_D14, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_D15, 0, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_D16, 1, NONE, PWROK),
PAD_CFG_GPI(GPP_D17, NONE, DEEP),
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
PAD_CFG_GPI(GPP_E1, NONE, DEEP),
PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
PAD_CFG_GPI(GPP_E5, NONE, DEEP),
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_E16, 0x80880100, 0x0000),
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E22, NONE, DEEP),
PAD_CFG_GPI(GPP_E23, NONE, DEEP),
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
PAD_CFG_GPI(GPP_F3, NONE, DEEP),
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
PAD_CFG_GPI(GPP_F19, NONE, DEEP),
PAD_CFG_GPI(GPP_F20, NONE, DEEP),
PAD_CFG_GPI(GPP_F21, NONE, DEEP),
PAD_CFG_GPI(GPP_F22, NONE, DEEP),
PAD_CFG_GPI(GPP_F23, DN_20K, DEEP),
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
PAD_CFG_GPI(GPP_H0, NONE, DEEP),
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
PAD_CFG_GPI(GPP_H4, NONE, DEEP),
PAD_CFG_GPI(GPP_H5, NONE, DEEP),
PAD_CFG_GPI(GPP_H6, NONE, DEEP),
PAD_CFG_GPI(GPP_H7, NONE, DEEP),
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
PAD_CFG_GPI(GPP_H17, NONE, DEEP),
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
PAD_NC(GPP_H22, NONE),
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
};
#endif
#endif

View File

@@ -9,4 +9,4 @@
- HAP: false
- [ME](./me.rom)
- Size: 5116 KB
- Version: 15.0.35.2039
- Version: 15.0.41.2158

View File

@@ -2,8 +2,7 @@ CONFIG_VENDOR_SYSTEM76=y
CONFIG_BOARD_SYSTEM76_DARP7=y
CONFIG_CCACHE=y
CONFIG_CONSOLE_SERIAL=n
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
@@ -13,7 +12,6 @@ CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
CONFIG_POST_IO=n
CONFIG_RUN_FSP_GOP=y
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y

View File

@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

View File

@@ -1,213 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
PAD_CFG_GPI(GPD2, NONE, PWROK),
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPD7, 1, NONE, PWROK),
PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
PAD_CFG_TERM_GPO(GPD9, 0, NONE, PWROK),
PAD_CFG_NF(GPD10, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPD11, UP_20K, DEEP),
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
PAD_NC(GPP_A7, NONE),
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_A9, NONE, DEEP, NF3),
PAD_NC(GPP_A10, NONE),
PAD_NC(GPP_A11, NONE),
PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_A13, 1, NONE, PLTRST),
PAD_NC(GPP_A14, NONE),
PAD_NC(GPP_A15, NONE),
PAD_NC(GPP_A16, NONE),
PAD_NC(GPP_A17, NONE),
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
PAD_NC(GPP_A19, NONE),
PAD_NC(GPP_A20, NONE),
PAD_NC(GPP_A21, NONE),
PAD_NC(GPP_A22, NONE),
PAD_CFG_TERM_GPO(GPP_A23, 0, NONE, PLTRST),
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B2, UP_20K, DEEP),
_PAD_CFG_STRUCT(GPP_B3, 0x80800100, 0x0000),
PAD_NC(GPP_B4, NONE),
PAD_NC(GPP_B5, NONE),
PAD_NC(GPP_B6, NONE),
PAD_NC(GPP_B7, NONE),
PAD_CFG_TERM_GPO(GPP_B8, 1, NONE, DEEP),
PAD_NC(GPP_B9, NONE),
PAD_NC(GPP_B10, NONE),
PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_B14, 0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_B15, 1, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_B16, 0x44000301, 0x0000),
PAD_NC(GPP_B17, NONE),
PAD_NC(GPP_B18, NONE),
PAD_NC(GPP_B19, NONE),
PAD_NC(GPP_B20, NONE),
PAD_NC(GPP_B21, NONE),
PAD_NC(GPP_B22, NONE),
PAD_CFG_TERM_GPO(GPP_B23, 0, NONE, DEEP),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
PAD_NC(GPP_C2, NONE),
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
PAD_NC(GPP_C5, NONE),
PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1),
PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1),
PAD_NC(GPP_C8, NONE),
PAD_NC(GPP_C9, NONE),
PAD_NC(GPP_C10, NONE),
PAD_NC(GPP_C11, NONE),
PAD_NC(GPP_C12, NONE),
PAD_NC(GPP_C13, NONE),
_PAD_CFG_STRUCT(GPP_C14, 0x40100100, 0x3000),
PAD_NC(GPP_C15, NONE),
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
PAD_NC(GPP_C20, NONE),
PAD_NC(GPP_C21, NONE),
PAD_CFG_TERM_GPO(GPP_C22, 1, NONE, PLTRST),
_PAD_CFG_STRUCT(GPP_C23, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
PAD_CFG_TERM_GPO(GPP_D1, 1, NONE, PLTRST),
PAD_CFG_GPI(GPP_D2, NONE, PLTRST),
PAD_CFG_GPI(GPP_D3, NONE, PLTRST),
PAD_NC(GPP_D4, NONE),
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
PAD_NC(GPP_D9, NONE),
PAD_NC(GPP_D10, NONE),
PAD_CFG_GPI(GPP_D11, DN_20K, DEEP),
PAD_CFG_GPI(GPP_D12, DN_20K, DEEP),
PAD_CFG_TERM_GPO(GPP_D13, 1, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_D14, 1, NONE, PLTRST),
PAD_NC(GPP_D15, NONE),
PAD_NC(GPP_D16, NONE),
PAD_NC(GPP_D17, NONE),
PAD_NC(GPP_D18, NONE),
PAD_NC(GPP_D19, NONE),
PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1),
PAD_CFG_TERM_GPO(GPP_E1, 0, NONE, PLTRST),
_PAD_CFG_STRUCT(GPP_E2, 0x40880100, 0x0000),
PAD_CFG_GPI(GPP_E3, DN_20K, DEEP),
PAD_NC(GPP_E4, NONE),
PAD_NC(GPP_E5, NONE),
PAD_NC(GPP_E6, NONE),
_PAD_CFG_STRUCT(GPP_E7, 0x82840100, 0x0000),
PAD_NC(GPP_E8, NONE),
PAD_NC(GPP_E9, NONE),
PAD_NC(GPP_E10, NONE),
PAD_NC(GPP_E11, NONE),
PAD_NC(GPP_E12, NONE),
PAD_NC(GPP_E13, NONE),
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
PAD_NC(GPP_E15, NONE),
PAD_CFG_GPI(GPP_E16, DN_20K, DEEP),
PAD_NC(GPP_E17, NONE),
PAD_NC(GPP_E18, NATIVE),
PAD_NC(GPP_E19, NATIVE),
PAD_NC(GPP_E20, NONE),
PAD_NC(GPP_E21, NONE),
PAD_NC(GPP_E22, NONE),
PAD_NC(GPP_E23, NONE),
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
PAD_NC(GPP_F4, NONE),
PAD_NC(GPP_F5, NONE),
PAD_NC(GPP_F6, NONE),
PAD_CFG_TERM_GPO(GPP_F7, 1, NONE, DEEP),
PAD_NC(GPP_F8, NONE),
PAD_CFG_TERM_GPO(GPP_F9, 1, NONE, DEEP),
PAD_NC(GPP_F10, NONE),
PAD_NC(GPP_F11, NONE),
PAD_NC(GPP_F12, NONE),
PAD_NC(GPP_F13, NONE),
PAD_NC(GPP_F14, NONE),
PAD_NC(GPP_F15, NONE),
PAD_NC(GPP_F16, NONE),
PAD_CFG_GPI(GPP_F17, NONE, PLTRST),
PAD_NC(GPP_F18, NONE),
PAD_NC(GPP_F19, NONE),
PAD_NC(GPP_F20, NONE),
PAD_CFG_GPI(GPP_F21, DN_20K, DEEP),
PAD_NC(GPP_F22, NONE),
PAD_NC(GPP_F23, NONE),
PAD_CFG_TERM_GPO(GPP_H0, 1, NONE, PLTRST),
PAD_NC(GPP_H1, NONE),
PAD_NC(GPP_H2, NONE),
PAD_CFG_GPI(GPP_H3, DN_20K, DEEP),
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
PAD_NC(GPP_H6, NONE),
PAD_NC(GPP_H7, NONE),
PAD_CFG_GPI(GPP_H8, DN_20K, DEEP),
PAD_CFG_GPI(GPP_H9, DN_20K, DEEP),
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1),
PAD_NC(GPP_H11, NONE),
PAD_NC(GPP_H12, NONE),
PAD_NC(GPP_H13, NONE),
PAD_NC(GPP_H14, NONE),
PAD_NC(GPP_H15, NONE),
PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
PAD_NC(GPP_H19, NONE),
PAD_NC(GPP_H20, NONE),
PAD_NC(GPP_H21, NONE),
PAD_NC(GPP_H22, NONE),
PAD_NC(GPP_H23, NONE),
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
PAD_NC(GPP_R5, NONE),
PAD_NC(GPP_R6, NONE),
PAD_NC(GPP_R7, NONE),
PAD_NC(GPP_S0, NONE),
PAD_NC(GPP_S1, NONE),
PAD_NC(GPP_S2, NONE),
PAD_NC(GPP_S3, NONE),
PAD_NC(GPP_S4, NONE),
PAD_NC(GPP_S5, NONE),
PAD_NC(GPP_S6, NONE),
PAD_NC(GPP_S7, NONE),
PAD_NC(GPP_T2, NONE),
PAD_NC(GPP_T3, NONE),
PAD_CFG_TERM_GPO(GPP_U4, 0, NONE, PLTRST),
PAD_CFG_TERM_GPO(GPP_U5, 1, NONE, PLTRST),
};
#endif
#endif

View File

@@ -1,40 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
/* Realtek, ALC293 */
0x10ec0293, /* Vendor ID */
0x155851a1, /* Subsystem ID */
12, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x155851a1),
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
AZALIA_PIN_CFG(0, 0x15, 0x02211020),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1d, 0x40738205),
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
/* Intel, TigerlakeHDMI */
0x80862812, /* Vendor ID */
0x80860101, /* Subsystem ID */
10, /* Number of entries */
AZALIA_SUBVENDOR(2, 0x80860101),
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
};
const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;

BIN
models/darp7/me.rom (Stored with Git LFS)

Binary file not shown.

BIN
models/darp7/microcode.rom (Stored with Git LFS)

Binary file not shown.

View File

@@ -1 +0,0 @@
../gaze17-3050/FSP

View File

@@ -9,4 +9,4 @@
- HAP: false
- [ME](./me.rom)
- Size: 4824 KB
- Version: 16.0.15.1810
- Version: 16.1.25.2124

View File

@@ -1,13 +1,8 @@
CONFIG_VENDOR_SYSTEM76=y
CONFIG_BOARD_SYSTEM76_DARP8=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_CCACHE=y
CONFIG_CONSOLE_SERIAL=n
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include"
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp.fd"
CONFIG_FSP_FULL_FD=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
@@ -15,7 +10,6 @@ CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
CONFIG_PAYLOAD_ELF=y
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
CONFIG_POST_IO=n
CONFIG_RUN_FSP_GOP=y
CONFIG_SMMSTORE=y
CONFIG_SMMSTORE_V2=y
CONFIG_USE_OPTION_TABLE=y

View File

@@ -2,7 +2,7 @@ BOOTLOADER=COREBOOT
DISABLE_SERIAL_TERMINAL=TRUE
PLATFORM_BOOT_TIMEOUT=2
PS2_KEYBOARD_ENABLE=TRUE
#SECURE_BOOT_ENABLE=TRUE
SECURE_BOOT_ENABLE=TRUE
SERIAL_DRIVER_ENABLE=FALSE
SHELL_TYPE=NONE
TPM_ENABLE=TRUE

BIN
models/darp8/fd.rom (Stored with Git LFS)

Binary file not shown.

View File

@@ -1,211 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef MAINBOARD_GPIO_H
#define MAINBOARD_GPIO_H
#include <soc/gpe.h>
#include <soc/gpio.h>
#ifndef __ACPI__
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
PAD_CFG_GPI(GPD7, NONE, PWROK),
PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
PAD_CFG_GPO(GPD9, 0, PWROK),
PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1),
PAD_CFG_GPI(GPP_A6, UP_20K, DEEP),
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
PAD_CFG_GPO(GPP_A8, 1, PLTRST),
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A11, NONE, DEEP),
PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
PAD_CFG_GPO(GPP_A13, 1, PLTRST),
PAD_CFG_GPI(GPP_A14, NONE, DEEP),
PAD_CFG_GPI(GPP_A15, NONE, DEEP),
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
PAD_CFG_GPI(GPP_A20, NONE, DEEP),
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
PAD_CFG_GPI(GPP_A22, NONE, DEEP),
PAD_CFG_NF(GPP_A23, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
PAD_CFG_GPI(GPP_B3, NONE, DEEP),
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
PAD_CFG_GPI(GPP_B5, NONE, DEEP),
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
PAD_CFG_GPI(GPP_B7, NONE, DEEP),
PAD_CFG_GPI(GPP_B8, NONE, DEEP),
PAD_CFG_GPI(GPP_B9, NONE, DEEP),
PAD_CFG_GPI(GPP_B10, NONE, DEEP),
PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
PAD_CFG_GPO(GPP_B16, 1, PLTRST),
PAD_CFG_GPO(GPP_B17, 1, PLTRST),
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_C2, 1, PLTRST),
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
PAD_NC(GPP_C8, NONE),
PAD_NC(GPP_C9, NONE),
PAD_NC(GPP_C10, NONE),
PAD_NC(GPP_C11, NONE),
PAD_NC(GPP_C12, NONE),
PAD_NC(GPP_C13, NONE),
PAD_NC(GPP_C14, NONE),
PAD_NC(GPP_C15, NONE),
PAD_NC(GPP_C16, NONE),
PAD_NC(GPP_C17, NONE),
PAD_NC(GPP_C18, NONE),
PAD_NC(GPP_C19, NONE),
PAD_NC(GPP_C20, NONE),
PAD_NC(GPP_C21, NONE),
PAD_NC(GPP_C22, NONE),
PAD_NC(GPP_C23, NONE),
PAD_CFG_GPO(GPP_D0, 1, DEEP),
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
PAD_CFG_GPO(GPP_D2, 0, DEEP),
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
PAD_CFG_GPO(GPP_D4, 1, DEEP),
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_D6, 1, DEEP),
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_D8, NONE, DEEP),
PAD_CFG_GPI(GPP_D9, NATIVE, DEEP),
PAD_CFG_GPI(GPP_D10, NATIVE, DEEP),
PAD_CFG_GPI(GPP_D11, NATIVE, DEEP),
PAD_CFG_GPI(GPP_D12, NATIVE, DEEP),
PAD_CFG_GPI(GPP_D13, NONE, DEEP),
PAD_CFG_GPO(GPP_D14, 1, PLTRST),
PAD_CFG_GPO(GPP_D15, 1, DEEP),
PAD_CFG_GPO(GPP_D16, 1, DEEP),
PAD_CFG_GPI(GPP_D17, NONE, DEEP),
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
PAD_CFG_GPI(GPP_D19, NONE, DEEP),
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000),
PAD_CFG_GPI(GPP_E2, NONE, DEEP),
PAD_CFG_GPO(GPP_E3, 1, PLTRST),
PAD_CFG_GPO(GPP_E4, 0, PLTRST),
PAD_CFG_GPI(GPP_E5, NONE, DEEP),
PAD_CFG_GPI(GPP_E6, NONE, DEEP),
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
PAD_CFG_GPI(GPP_E8, NONE, DEEP),
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_E12, 0x40100100, 0x0000),
PAD_CFG_GPI(GPP_E13, NONE, DEEP),
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
PAD_CFG_GPI(GPP_E16, NONE, DEEP),
PAD_CFG_GPI(GPP_E17, NONE, DEEP),
PAD_NC(GPP_E18, NATIVE),
PAD_NC(GPP_E19, NATIVE),
PAD_CFG_GPI(GPP_E20, NATIVE, DEEP),
PAD_CFG_GPI(GPP_E21, NATIVE, DEEP),
PAD_CFG_GPI(GPP_E22, DN_20K, DEEP),
PAD_CFG_GPI(GPP_E23, NONE, DEEP),
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_F7, NONE, DEEP),
PAD_CFG_GPI(GPP_F8, NONE, DEEP),
PAD_CFG_GPI(GPP_F9, NONE, DEEP),
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
PAD_CFG_GPO(GPP_F17, 1, PLTRST),
PAD_CFG_GPO(GPP_F18, 0, DEEP),
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_F20, 1, PLTRST),
PAD_CFG_GPI(GPP_F21, NONE, DEEP),
PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_F23, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_H0, 1, PLTRST),
PAD_CFG_GPO(GPP_H1, 1, PLTRST),
PAD_CFG_GPO(GPP_H2, 1, PLTRST),
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF2),
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
_PAD_CFG_STRUCT(GPP_H12, 0x44001500, 0x0000),
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
PAD_CFG_GPI(GPP_H22, NONE, DEEP),
PAD_CFG_NF(GPP_H23, NONE, DEEP, NF2),
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
PAD_CFG_GPI(GPP_R5, NONE, DEEP),
PAD_CFG_GPI(GPP_R6, NONE, DEEP),
PAD_CFG_GPI(GPP_R7, NONE, DEEP),
PAD_CFG_GPI(GPP_S0, NONE, DEEP),
PAD_CFG_GPI(GPP_S1, NONE, DEEP),
PAD_CFG_GPI(GPP_S2, NONE, DEEP),
PAD_CFG_GPI(GPP_S3, NONE, DEEP),
PAD_CFG_GPI(GPP_S4, NONE, DEEP),
PAD_CFG_GPI(GPP_S5, NONE, DEEP),
PAD_CFG_GPI(GPP_S6, NONE, DEEP),
PAD_CFG_GPI(GPP_S7, NONE, DEEP),
PAD_CFG_NF(GPP_T2, DN_20K, DEEP, NF2),
PAD_CFG_NF(GPP_T3, DN_20K, DEEP, NF2),
};
#endif
#endif

View File

@@ -1,39 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
/* Realtek, ALC256 */
0x10ec0256, /* Vendor ID */
0x15587716, /* Subsystem ID */
11, /* Number of entries */
AZALIA_SUBVENDOR(0, 0x15587716),
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1d, 0x41700001),
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
AZALIA_PIN_CFG(0, 0x21, 0x02211020),
/* Intel, Alderlake-PHDMI */
0x8086281c, /* Vendor ID */
0x80860101, /* Subsystem ID */
10, /* Number of entries */
AZALIA_SUBVENDOR(2, 0x80860101),
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
};
const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;

BIN
models/darp8/me.rom (Stored with Git LFS)

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BIN
models/darp8/microcode.rom (Stored with Git LFS)

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@@ -0,0 +1 @@
../oryp11/AlderLakeFspBinPkg

BIN
models/darp9/IntelGopDriver.efi (Stored with Git LFS) Normal file

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@@ -0,0 +1,9 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = IntelGopDriver
FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
[Binaries.X64]
PE32|IntelGopDriver.efi|*

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