Commit Graph

47264 Commits

Author SHA1 Message Date
Tim Crawford
a7a7428a76 mb/system76/adl-p: Add Oryx Pro 9 as a variant
Change-Id: I2018d5e75ffbcf78a94cca58bcfd6b5e41ac9864
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-12 15:34:32 -06:00
Bora Guvendik
a986888a74 soc/intel: Add Raptor Lake device IDs
Add Raptor Lake specific CPU, System Agent, PCH, IGD device IDs.

References:
RaptorLake External Design Specification Volume 1 (640555)
600/700 Series PCH External Design Specification Volume 1 (626817)

Change-Id: I39e655dec2314a672ea63ba90d8bb3fc53bf77ba
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
2022-07-12 15:34:32 -06:00
Tim Crawford
f33cf4bcd3 mb/system76/adl-p: darp8: HACK: Limit PL4 to PL2
Fixes system powering off under load when booting on battery.

Change-Id: Id9e74a9e91b3475fcf1b82198571139a43e98779
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-11 18:39:22 -06:00
Tim Crawford
d725961114 mb/system76/adl-p: lemp11: Fix power config
lemp11 is ADL-U, not ADL-P. Use the correct ID to override the values
and reduce PL1 to the TDP of 15W.

Change-Id: I285c906dc08d2882e6e84b463a63b69966b3c9f5
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-07-05 14:29:12 -06:00
Tim Crawford
6f71845692 soc/intel/adl: Set memory-down to CH0
lemp11 uses channel 0 for on-board RAM.

Change-Id: I6bc45af3b06af641a39ccd2f0eb7e4ad8fe83be5
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-06-29 15:06:41 -06:00
Tim Crawford
68d9b42b26 mb/system76/adl-p: Fix booting FSP debug build
Fix assertions for SATA and I2C1 devices GPIOs.

TODO: Test on darp8.

Change-Id: I89dbd212a7dbd55c84d8ebbb7420b960da8175af
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-06-29 15:06:41 -06:00
Tim Crawford
f56daffffc mb/system76/adl-p: Add Lemur Pro 11 as a variant
Change-Id: Ib17041a891917cd4659004aba6a9a55b591865ae
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-06-29 15:06:41 -06:00
Tim Crawford
b3d3fc9a87 mb/system76/adl-p: Fix SATA detection
Change the FSP index for the SATA device to fix detection.

Drop the internal pull-up as there is already an external pull-up.

Change-Id: I5c97b3ee1f6208ca4e454647c8d19d7e7f025047
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-06-23 10:59:28 -06:00
Tim Crawford
8d72084349 mb/system76/adl-p: Add Darter Pro 8
Change-Id: If337b7ad3a4433890d847b77614c0130511610a7
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-06-22 09:17:43 -06:00
Michał Żygowski
89d2235e0f soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters
Code taken from TGL base.

TEST=Boot MSI PRO Z690-A WIFI DDR4 and see all devices have SSID
applied

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I3a6d299ec40bac8e29d06926572e375d7d835e29
2022-06-07 07:06:36 -06:00
Jeremy Soller
ed6990802a mb/system76/gaze17: Enable DisplayPort audio
Change-Id: I373035a39c75297b58c1638ea3ee1684188aa812
2022-06-06 11:42:40 -06:00
Tim Crawford
0278090e68 soc/intel/tgl: Add PEG devices to IRQ constraints
Fixes IRQ errors on oryp8 that cause conflicts with the PCH HDA device.

Change-Id: If0020d9bb6585f7b0fb2dabd3d8b2a3efdd86de2
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-06-01 14:08:27 -06:00
Jeremy Soller
80fb39363b ec/system76: Hide ACPI device
Change-Id: I895d7b7bec9ea7ac7839d8fa0f6938719c34b6b5
2022-05-27 12:54:34 -06:00
Jeremy Soller
ac2f8121cd soc/intel/alderlake: Set FSP-S GnaEnable based on devicetree
Change-Id: Ifd25416c55c4dba1709f74cdedc0c58e881d6266
2022-05-27 12:54:34 -06:00
Jeremy Soller
09b395bee6 mb/system76/gaze17: Do not enable GNA
Change-Id: Icabb825128b45ec43df952b0f24f1d2c44ba04b2
2022-05-27 12:54:34 -06:00
Jeremy Soller
9a7984f839 soc/intel/alderlake: Hide PMC and IOM devices
Change-Id: Ib1181812eaf8517a2eb4485f01e8ca2486dfb99f
2022-05-27 12:54:34 -06:00
Jeremy Soller
6d20bf4a9f soc/intel/alderlake: Add SLP_S0 residency register and enable LPIT support
Change-Id: I45e1fc9df3e782cdaac810af3189c5797b1fe413
2022-05-27 12:54:34 -06:00
Jeremy Soller
d9a9796150 mb/system76/gaze17: Disable S3 suspend
Change-Id: I83a3932f1f7eee5680820882e9bce1a9a7b05e35
2022-05-27 12:54:34 -06:00
Jeremy Soller
221796fa23 mb/system76/gaze17: Enable ME by default
Change-Id: I6cb3adecfd9a808c9c6dcddedd906b208c5f56fb
2022-05-27 12:54:34 -06:00
Jeremy Soller
9798b1f3fd mb/system76/gaze17: Enable SATA DEVSLP
Change-Id: If7dfbf7816b0487fd03d11fbd60649de71b3e654
2022-05-27 12:54:34 -06:00
Tim Crawford
7d38db7d49 mb/system76/gaze17: WIP: S0ix
Change-Id: If03f92549ac76e2e0d04bdfe919048879b691f7d
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-27 12:54:34 -06:00
Jeremy Soller
1522e01426 mb/system76/gaze17: Let FSP set TPM IRQ
Change-Id: If15cc71d808cb1327be68da203d4cc408143068e
2022-05-27 12:54:34 -06:00
Jeremy Soller
01e11ae288 mb/system76/gaze17: Add pin muxing
Change-Id: I82b94c0e30471af65b0a6e58001c18edfe88e923
2022-05-27 12:54:34 -06:00
Jeremy Soller
e19c39eb59 mb/system76/gaze17: Add new mainboard
Change-Id: Ie4c5297088b06c4e4b9c111f798cb17638fa8592
2022-05-16 11:41:27 -06:00
Jeremy Soller
48e7ffc9cd Refactor GC6 support for all boards
Change-Id: Id9191c76e0055d5f02a1de8c25a35cf05718c092
2022-05-16 11:41:07 -06:00
Jeremy Soller
8c4eeafcfe mb/system76/addw1: Disable SaOcSupport to eliminate hangs with 3200MT/s memory
Change-Id: I586e8cf97a52b2fa8386ce3742a4f4ae9465bbcf
2022-05-16 11:38:25 -06:00
Michał Żygowski
6b56932606 soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading
BIOS must send the IP_LOAD HECI command to fetch the firmware for CPU
PCIe Gen5 and upload it via CPU REG BAR prior FSP Silicon Init.
Implementation based on Slimbootloader's
"Silicon/AlderlakePkg/Library/CpuPcieHsPhyInitLib" and FSP source.

TEST=Boot MSI PRO Z690-A and see the HSPHY FW is loaded and its recipe
and version is printed.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080
2022-05-16 11:38:24 -06:00
Michał Żygowski
28cc4183c8 soc/alderlake: Add ADL-S PCIe support
Extend the code to support ADL-S PCIe Root Ports.
Based on DOC #619362 and #619501.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ibb57ad5b11684c0079e384d9a6ba5c10905c1a23
2022-05-16 11:38:23 -06:00
Michał Żygowski
ffb97ba314 include/smbios.h: Add PCIe Gen5 slot type definitions
Add PCI Express Gen5 slot type definitions from DMTF SMBIOS
specification 3.5.0.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I46e07feb23bdd6ac9f145a649b77a88db1c08624
2022-05-16 11:38:22 -06:00
Tim Crawford
b47923d714 soc/intel/adl: Don't send EOP early
Early EOP prevents disabling CSME.

Disabling CSME now occurs, but checking the result fails:

    [DEBUG]  HECI: ME state change send success!
    [DEBUG]  HECI: ME state change result failure!

CSME is disabled on subsequent boots.

Change-Id: I1c1416bb6537774f4bf09820c551b3b4ca7d1a38
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:38:21 -06:00
Tim Crawford
5783ad7a65 mb/system76: TGL-U: Disable AER for CPU PCIe RP
Fixes suspend with certain SSDs installed in the PCIe 4 slot.

Change-Id: Ib91b154963aeafe96c8118cbab89f0e70634e8bc
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:38:20 -06:00
Tim Crawford
090448674d mb/system76: Configure I2C HID IRQs as level triggered
Per Microsoft's spec for HID over I2C [1], interrupts must be level
triggered. Switch GPIOs and the devicetree config to conform to this.

[1]: http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx

Change-Id: I485e616ae00e10bc3620ff3fa1fc1e903653c5cc
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:18 -06:00
Tim Crawford
7f1b3fa98c mb/system76/bonw14: Enable TAS5825M smart amp
The Bonobo has 2 AMPs: one for the speakers and one for the subwoofer.

Smart AMP data was collected using a logic analyzer connected to the IC
during system start on proprietary firmware. This data is then used to
generate a C file [1].

[1]: https://github.com/system76/smart-amp

Change-Id: I5389a9890563ebd3adb20096b6225f474bc006f9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:17 -06:00
Tim Crawford
0004ff6f28 mb/system76/addw1: Increase max CPUs to 16
The addw1 supports an i9-9980HK and the addw2 uses an i7-10875H.
These CPUs have 8 cores and 16 threads. Fixes booting on addw2.

Change-Id: I4639b40c3ab9c6d6ad5abbbb3618c750c7d40695
Fixes: 6a93a45242 ("mb/system76/addw1: Add System76 Adder Workstation 1")
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:16 -06:00
Tim Crawford
f55ab41430 src/mb/system76/*: Shrink CMOS option table 1 byte
The option table is shrunk 1 byte to force coreboot to invalid the table
and write the new defaults. This will ensure the IME is in the correct
mode on the next update.

Change-Id: I805c53fee55fea69fa3363fea0609858cc88f2d3
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:15 -06:00
Tim Crawford
912122d95f mb/system76: TGL-H: Disable D3cold for TCSS
Change-Id: Ib4362783546aa01f0f8f5baaad817ee76be9c39c
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:14 -06:00
Jeremy Soller
8933418194 mb/system76/lemp9: Fix TPM error message
Change-Id: Id5456c0d6abee6d79761fae0bed78cc6def351f3
2022-05-16 11:36:13 -06:00
Jeremy Soller
25eb9c20a8 mb/system76: select TPM_RDRESP_NEED_DELAY
Change-Id: I7909b05e9203ce9ad07c8e87a847bc46cf281b34
2022-05-16 11:36:12 -06:00
Jeremy Soller
9b0cf73235 soc/intel: Add Cometlake-H/S Q0 (10+2) CPU
Change-Id: Id1da42aa93ab3440ae743d943a00713b7df3f453
2022-05-16 11:36:11 -06:00
Jeremy Soller
7727cc504b intel/block/pcie/rtd3: Also implement _PR3
Change-Id: Id7f4373989dffe8c3bc68a034f59a94d2160dd15
Signed-off-by: Jeremy Soller <jeremy@system76.com>
2022-05-16 11:36:10 -06:00
Jeremy Soller
9c0913d5c2 intel/block/pcie/rtd3: ACPI debug messages
Change-Id: Icc4a882ff73f62a134b92f1afb0dc298ea809189
2022-05-16 11:36:09 -06:00
Jeremy Soller
c7998fda31 soc/intel/tigerlake: Remove write to IOP TCSS_IN_D3
Change-Id: Ibbf6b5e0bf627536d10c8dee2f632e66da427151
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:08 -06:00
Tim Crawford
2fae43f36a mb/system76/*: Enable dGPUs
Change-Id: Ib5bab02801407c8bf05e6028bf8f9fa7ccc5ecd0
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:36:01 -06:00
Tim Crawford
fa92d159d4 drivers/gfx/nvidia: Add driver for NVIDIA Optimus
Add a driver for systems with NVIDIA Optimus (hybrid) graphics using
GC6 3.0. The driver provides ACPI support for dynamically powering on
and off the GPU, and a function for enabling the GPU power in romstage.

Tested on system76/gaze15.

Change-Id: I2dec7aa2c8db7994f78a7cc1220502676e248465
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:35:13 -06:00
Tim Crawford
243b89b15c mb/system76/*: Apply custom backlight levels
Change-Id: Ibea37f19acca0d718211fc41706019a92a240c70
Signed-off-by: Tim Crawford <tcrawford@system76.com>
2022-05-16 11:35:12 -06:00
Tim Crawford
832fd34cf5 submodules: Use absolute paths
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Change-Id: If03415f80a6028e263e76a9e3cc10df0cde5cc3c
2022-05-16 11:35:11 -06:00
Subrata Banik
670572ff6a soc/intel/cmn/cse: Enforce CSE disabling
This patch enforces disabling of the CSE device if CSE stays in
SOFT TEMP DISABLE state. The recommendation is to make CSE function
disable to avoid receiving any CSE commands from the OS layer.

BUG=b:228789015
TEST=None

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I77c254195895a93a5606adee8b6f43d8b7100848
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63822
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-04-29 15:13:47 +00:00
Subrata Banik
4b1f4e3a99 soc/intel/cmn/cse: Drop redundant macro check for heci1_disable()
This patch removes redundant DISABLE_HECI1_AT_PRE_BOOT config check for
heci1_disable(), once by caller (from various SoC) and again inside the
callee (heci1_disable) function.

As all callers of heci1_disable() function are doing
DISABLE_HECI1_AT_PRE_BOOT config enabled check, hence, the second check
inside the callee can be dropped.

BUG=b:228789015
TEST=Able to build and boot google/redrix with this change. CSE PCI
device is getting function disabled upon selecting
DISABLE_HECI1_AT_PRE_BOOT from SoC config.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I47d7a9989e355987618d089f79c3340fcf4953ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63821
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-04-29 15:13:27 +00:00
Subrata Banik
c176fc2dfb soc/intel: Decouple HECI disabling interface from HECI disable Kconfig
This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC
IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG
recommends to disable the CSE PCI device while CSE is in
software temporary disable state.

BUG=b:228789015
TEST=Able to build google/redrix.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I66abc04d5e195515165a77b0166d004f17d029e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-04-29 15:12:52 +00:00
Elyes Haouas
09106f75f1 sb/intel/i82801dx/pci.c: Use pci_or_config16() and macros
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I658fa9cee4517b9f68102b74949d32d7ab0309f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-04-29 14:41:09 +00:00