Fixes system powering off under load when booting on battery.
Change-Id: Id9e74a9e91b3475fcf1b82198571139a43e98779
Signed-off-by: Tim Crawford <tcrawford@system76.com>
lemp11 is ADL-U, not ADL-P. Use the correct ID to override the values
and reduce PL1 to the TDP of 15W.
Change-Id: I285c906dc08d2882e6e84b463a63b69966b3c9f5
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Fix assertions for SATA and I2C1 devices GPIOs.
TODO: Test on darp8.
Change-Id: I89dbd212a7dbd55c84d8ebbb7420b960da8175af
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Change the FSP index for the SATA device to fix detection.
Drop the internal pull-up as there is already an external pull-up.
Change-Id: I5c97b3ee1f6208ca4e454647c8d19d7e7f025047
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Code taken from TGL base.
TEST=Boot MSI PRO Z690-A WIFI DDR4 and see all devices have SSID
applied
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I3a6d299ec40bac8e29d06926572e375d7d835e29
Fixes IRQ errors on oryp8 that cause conflicts with the PCH HDA device.
Change-Id: If0020d9bb6585f7b0fb2dabd3d8b2a3efdd86de2
Signed-off-by: Tim Crawford <tcrawford@system76.com>
BIOS must send the IP_LOAD HECI command to fetch the firmware for CPU
PCIe Gen5 and upload it via CPU REG BAR prior FSP Silicon Init.
Implementation based on Slimbootloader's
"Silicon/AlderlakePkg/Library/CpuPcieHsPhyInitLib" and FSP source.
TEST=Boot MSI PRO Z690-A and see the HSPHY FW is loaded and its recipe
and version is printed.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080
Extend the code to support ADL-S PCIe Root Ports.
Based on DOC #619362 and #619501.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ibb57ad5b11684c0079e384d9a6ba5c10905c1a23
Early EOP prevents disabling CSME.
Disabling CSME now occurs, but checking the result fails:
[DEBUG] HECI: ME state change send success!
[DEBUG] HECI: ME state change result failure!
CSME is disabled on subsequent boots.
Change-Id: I1c1416bb6537774f4bf09820c551b3b4ca7d1a38
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Fixes suspend with certain SSDs installed in the PCIe 4 slot.
Change-Id: Ib91b154963aeafe96c8118cbab89f0e70634e8bc
Signed-off-by: Tim Crawford <tcrawford@system76.com>
The Bonobo has 2 AMPs: one for the speakers and one for the subwoofer.
Smart AMP data was collected using a logic analyzer connected to the IC
during system start on proprietary firmware. This data is then used to
generate a C file [1].
[1]: https://github.com/system76/smart-amp
Change-Id: I5389a9890563ebd3adb20096b6225f474bc006f9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
The addw1 supports an i9-9980HK and the addw2 uses an i7-10875H.
These CPUs have 8 cores and 16 threads. Fixes booting on addw2.
Change-Id: I4639b40c3ab9c6d6ad5abbbb3618c750c7d40695
Fixes: 6a93a45242 ("mb/system76/addw1: Add System76 Adder Workstation 1")
Signed-off-by: Tim Crawford <tcrawford@system76.com>
The option table is shrunk 1 byte to force coreboot to invalid the table
and write the new defaults. This will ensure the IME is in the correct
mode on the next update.
Change-Id: I805c53fee55fea69fa3363fea0609858cc88f2d3
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Add a driver for systems with NVIDIA Optimus (hybrid) graphics using
GC6 3.0. The driver provides ACPI support for dynamically powering on
and off the GPU, and a function for enabling the GPU power in romstage.
Tested on system76/gaze15.
Change-Id: I2dec7aa2c8db7994f78a7cc1220502676e248465
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This patch removes redundant DISABLE_HECI1_AT_PRE_BOOT config check for
heci1_disable(), once by caller (from various SoC) and again inside the
callee (heci1_disable) function.
As all callers of heci1_disable() function are doing
DISABLE_HECI1_AT_PRE_BOOT config enabled check, hence, the second check
inside the callee can be dropped.
BUG=b:228789015
TEST=Able to build and boot google/redrix with this change. CSE PCI
device is getting function disabled upon selecting
DISABLE_HECI1_AT_PRE_BOOT from SoC config.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I47d7a9989e355987618d089f79c3340fcf4953ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63821
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC
IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG
recommends to disable the CSE PCI device while CSE is in
software temporary disable state.
BUG=b:228789015
TEST=Able to build google/redrix.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I66abc04d5e195515165a77b0166d004f17d029e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
