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Author SHA1 Message Date
Tim Crawford
81c36a2ca3 smmstore: Add option to clear store on CMOS reset 
Change-Id: I78e63c0a4c6b5c9c18a1e0016409c61201b2b941
 2020-12-14 15:04:44 -07:00
Tim Crawford
f5a012e482 mb/system76/gaze15: Correct registers for USB ports 
Based on the updated schematics, ports 7 (previously annotated as 3G)
and 9 (previously Per-key RGB) are not connected, and port 10 is
connected to the fingerprint reader.

Change-Id: Iac23c68f0fd6d5dafb6bc4c8751dd7d7109109e5
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-10-15 19:27:21 -06:00
Tim Crawford
8be09c0c61 mb/system76/oryp5: Use VBT from oryp6 
Change-Id: I0c2c9fd90ad9b54ce7af3c67c747f7c7e299632a
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-10-07 06:32:56 -07:00
Tim Crawford
a88ed3f87a mb/system76/oryp5: gpio: Convert raw pads to macros 
Tested with BUILD_TIMELESS=1

Change-Id: I5e9c2eae1245690e1efccf1211dcaee831067436
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-10-07 06:32:56 -07:00
Tim Crawford
32a9c2f786 mb/system76/oryp5: Add Oryx Pro 5 
Change-Id: I0bbbddbb46c1a4a70146e7384ce1fbc9448c9269
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-10-07 06:32:56 -07:00
Jeremy Soller
5a710b2387 Add PCI_DEVICE_ID_INTEL_CNP_H_SMBUS to soc/intel/common/block/smbus/smbus.c 
Change-Id: I9fd425b199c17d11c49add504c645d9aa1aae122
 2020-10-05 13:58:14 -07:00
Jeremy Soller
a4a356011b Sync addw1 with addw2 
Change-Id: Ie4bf24567eb3da046e6b2102e61db697e7c0f932
 2020-10-05 13:58:14 -07:00
Jeremy Soller
84bb9befff addw1 
Change-Id: Iae42a750dce4d93d1dea75eef6c47f08160f3fe1
 2020-10-05 13:58:14 -07:00
Jeremy Soller
caf3ce984c Save and restore ECOS during suspend/resume 
Change-Id: I137ef6c574a372601bc51f6e815158767acd0e1b
 2020-09-29 19:42:54 -06:00
Tim Crawford
35d6693a27 mb/system76: Enable battery charging thresholds 
Change-Id: Icdd0d67c4d054fdbbb726db4827ca6164753c477
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-09-22 16:08:13 -06:00
Tim Crawford
1f24cd4271 ec/system76/ec: Add battery charging thresholds 
Change-Id: I3d656291c096f320d469274677e9fe6c74819d25
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-09-22 16:08:13 -06:00
Jeremy Soller
2ee83f8df4 cml-u,whl-u: Disable above 4G allocation to fix running out of MTRRs 
Change-Id: Icfee8750ad225e5b4f2fd1118230b7c0b8d0f850
 2020-09-22 11:21:38 -06:00
Jeremy Soller
64004943b4 cml-u: Remove unused TBT ACPI code 
Change-Id: Iade0316d76f2bd1fb037fcdb18e7d81f3b6fdbb0
 2020-09-22 06:23:05 -06:00
Jeremy Soller
c97a435978 cml-u: Sync devicetree changes from lemp9 
Change-Id: I69855d082708b185815343b2d92807f3028b2478
 2020-09-22 06:23:01 -06:00
Jeremy Soller
e13bade2dd cml-u: Remove hacks no longer required for thunderbolt and camera toggle 
Change-Id: I17e293f524253a14d7a07842f7abf8e75ad472a8
 2020-09-22 06:22:55 -06:00
Tim Crawford
1853d8737b mb/system76: Convert to devicetree subsystemid 
Upstream has converted all uses of SUBSYSTEM_{VENDOR,DEVICE}_ID in
Kconfig to subsystemid in devicetree. It will soon produce a lint error
from Jenkins [1].

[1]: https://review.coreboot.org/c/coreboot/+/45513/

Change-Id: I66d5d5f23d3c8ab6ed79dad432a0773841147eea
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-09-21 08:12:25 -06:00
Tim Crawford
7ba5665046 mb/system76/thelio-b1: Fix devicetree formatting 
Change-Id: I35b238aaea49b6213c1b4094d0ac153ab9a76c8c
Signed-off-by: Tim Crawford <tcrawford@system76.com>
 2020-09-21 08:12:25 -06:00
Tim Crawford
1ff8f316f4 ec/system76/ec: Sync changes from upstream 
Change-Id: I277324a731548fd9d30e790922834172ac86c2a3
 2020-09-18 11:52:27 -06:00
Tim Crawford
3dd5bc6550 mb/system76: Remove FSP_M_XIP 
FSP_M_XIP is already selected by the soc.

Ref: 48833363da ("mb/system76/lemp9: drop FSP_M_XIP")
Change-Id: I4bb33208119e27d036e8a0bcb63a99dec9cf3bce
 2020-09-17 09:56:28 -06:00
Jeremy Soller
1a8107d238 Add OLED screen toggle 2020-09-03 12:13:31 -06:00
Jeremy Soller
b39c286f31 Add ACPI thermal interface to S76D 
Change-Id: I1ada73d5a255074a2f628e18cc605e8dc6109c0e
 2020-09-03 12:13:31 -06:00
Jeremy Soller
f338b238da gaze15: fix touchpad interrupt 
Change-Id: I535fa847d791aa2d7c805ce616163d7582b689b0
 2020-09-02 08:40:50 -06:00
Jeremy Soller
fa5896209f ec/system76/ec: Clean up and document ACPI EC registers 
Change-Id: I8d60b1826fd5402978fb7092fe807da0c4dd5179
 2020-09-02 08:40:50 -06:00
Jeremy Soller
fbf0bd5b7e soc/intel/cannonlake: Allow setting of PCIe subsystem IDs after FSP SiliconInit 
Change-Id: Ie5c7d497e4a64a2f5e2960a2cdca8e5780dc07ea
 2020-08-24 14:49:06 -06:00
Patrick Rudolph
264a0fee22 soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices 
On PCH-H the I2C4 0:19.0 device isn't usable and thus 0:19.1 and
0:19.2 can't be detected using standard PCI probing.

Remove I2C4, I2C5 and UART2 from generic ASL code on PCH-H platforms
that advertise its PCI conformance by the _ADR attribute.

Change-Id: I89f9ab7d4afb2e7d1b1e24d072adf99e0da6fecf
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44198
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
 2020-08-24 10:22:08 -06:00
Patrick Rudolph
fbd57b1dac soc/intel/cannonlake: Fix DMAR when no iGPU is present 
Don't emit RMRR for the iGPU if it's not present. This is done on
other platforms as well.

Fixes an DMAR error seen in dmesg on platforms without iGPU.

Change-Id: Iafe86e6938a120b707aaae935cb8168f790bb22f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43994
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-08-24 10:22:05 -06:00
Jeremy Soller
f6268a00d4 soc/intel/cannonlake: Add PCIe RP 17-24 ACPI information 
Change-Id: I119b9cd6dbaa8f2d17d6132dbd9d44a778ff8111
 2020-08-20 14:06:32 -06:00
Gaggery Tsai
4f1c9f486a soc/intel/cannonlake: Add Iccmax and loadlines for CML-S 
Following up 3ccae2b7, this patch adds Iccmax and AC/DC
loadlines and iPL2 for CML-S CPUs. The information is from
CML EDS volume 1, doc #606599 and pdg #610244.

Change-Id: Id2797a979a8b6a52a34baae66f95c7136ed1dc72
Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com>
 2020-08-19 14:20:55 -06:00
Jeremy Soller
fa580ac218 bonw14: set TBT reset GPIOs to RSMRST reset group 2020-08-19 13:01:14 -06:00
Jeremy Soller
0cdfae9d40 gaze15: fix display GPIOs 
Change-Id: I3273f8bf668d16c4ede81695e2676db77047df42
 2020-08-19 11:49:41 -06:00
Jeremy Soller
eb1110c8d0 bonw14: fix TBT 2020-08-19 11:38:23 -06:00
Jeremy Soller
d928cd856b addw2: add annotations for LAN and TBT reset lines 2020-08-19 11:38:23 -06:00
Jeremy Soller
729a256348 soc/intel/cannonlake: Allow PCIe root port #1 to use clockreq 2020-08-19 11:38:22 -06:00
Jeremy Soller
a9d462e94f Add Cometlake-H/S Q0 (10+2) CPU 2020-08-19 11:38:22 -06:00
Tim Crawford
376945c45f mb/system76/gaze15: Add NB_ENAVDD to early_gpio_table 
Fixes FSP not finding a valid framebuffer on reboots, which resulted in
a black screen when running the edk2 payload.

Change-Id: I946adb0657c07cf6c5a9aeb369e4fdfd8826abb2
 2020-08-14 12:15:33 -06:00
Tim Crawford
25e164c5e2 mb/system76/gaze15: Annotate GPIOs 
This was done using the schematics for the 15" GTX 1660 Ti variant.

Change-Id: I2f7628d68bd5491438b6d71556b5cb73873b9b89
 2020-08-14 11:34:44 -06:00
Jeremy Soller
df0ecca51d select TPM_RDRESP_NEED_DELAY for system76 laptops 
Change-Id: I7909b05e9203ce9ad07c8e87a847bc46cf281b34
 2020-08-13 13:12:15 -06:00
Jeremy Soller
e4bfd5b28a Merge pull request #23 from system76/bonw14 
bonw14
 2020-08-13 12:20:24 -06:00
Jeremy Soller
fe9ea17423 bonw14 
Change-Id: I533acb5e835de97c1ac52a201bca95671f53d932
 2020-08-13 12:18:59 -06:00
Tim Crawford
efe04c82e0 mb/system76: Fix left USB3 port on gaze14/gaze15 
The USB table in the manuals incorrectly list the USB3 port as 5.
The labeled pins show it correctly as port 2.

Change-Id: I9a6a96af847ca66ad667738d83cfca7c3166956a
 2020-08-13 08:01:00 -06:00
Jeremy Soller
011439cb91 Sync addw2 devicetree with oryp6 
Change-Id: Id32845c96479ce124a6bb55c2434e78e6f96b519
 2020-08-06 08:24:46 -06:00
Jeremy Soller
599ca05c8c Update devicetree.cb 2020-08-04 10:42:15 -06:00
Jeremy Soller
d563135d4b Sync changes from upstream PRs 
Change-Id: If65cd6262ab625047edb8d242d00f520e4ff8d14
 2020-07-21 09:09:38 -06:00
Jeremy Soller
bccef94545 Quote MAINBOARD_DIR 
Change-Id: Ida3ca099fd8ab6d7b1112e5f203b791e6c46dd0d
 2020-07-20 12:09:30 -06:00
Jeremy Soller
dca083da74 Absolute path for qc_blobs in gitmodules 
Change-Id: I5bab7ace1503f54fafff9073b35f9b3e0952c0b7
 2020-07-20 11:55:13 -06:00
Jeremy Soller
94612338ef Merge remote-tracking branch 'upstream/master' into system76 
Change-Id: Idceb013b3495324b8d84a388ea5ee5b5ea4b69db
 2020-07-20 11:54:36 -06:00
Jeremy Soller
9e729e44a8 Refactor DGPU support code into drivers/system76/dgpu 
Change-Id: Id29d6ade82b7212a3a68f6f3c27769e17d3fdcdc
 2020-07-20 11:52:44 -06:00
Pandya, Varshit B
65e5b100e2 mb/google/dedede: Update link frequency and end point structure for OV9734 
1. Update Link frequency to 180 Mhz
2. Set data-lanes to 1 and
3. Update the clock-lane used by sensor

BUG=b:155285666
BRANCH=None
TEST=Build and able to capture image using user facing camera.

Signed-off-by: Pandya, Varshit B <varshit.b.pandya@intel.com>
Change-Id: I164cb6af1003de561be8ce640e7653b7bcb3a22f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
 2020-07-20 15:18:23 +00:00
Raul E Rangel
500eb450b5 mb/amd/mandolin: Delete sleep.asl 
These methods are empty and the kernel treats these as optional.

BUG=b:153001807, b:154756391
TEST=none

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ic8ee8fb6b6bcd04c653ab77cdc5e746a8cbd0c4a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43466
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-07-20 14:01:24 +00:00
Raul E Rangel
030bace562 mb/google/zork: Delete sleep.asl 
These methods are empty and the kernel treats these as optional.

BUG=b:153001807, b:154756391
TEST=Suspend and resume trembyle

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5f2b375c1186951f95b7ac44dc7158a0299013a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43465
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 2020-07-20 14:01:09 +00:00